1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "rv1106g-evb1-rgb-display-v11.dts" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Rockchip RV1106G EVB1 V11 Board For Facial Gate"; 12*4882a593Smuzhiyun compatible = "rockchip,rv1106g-evb1-v11-spi-nor-facial-gate", "rockchip,rv1106"; 13*4882a593Smuzhiyun}; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun&emmc { 16*4882a593Smuzhiyun status = "disabled"; 17*4882a593Smuzhiyun}; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun&sfc { 20*4882a593Smuzhiyun status = "okay"; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun flash@0 { 23*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 24*4882a593Smuzhiyun reg = <0>; 25*4882a593Smuzhiyun spi-max-frequency = <80000000>; 26*4882a593Smuzhiyun spi-rx-bus-width = <4>; 27*4882a593Smuzhiyun spi-tx-bus-width = <1>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun}; 30