1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "rv1106-uvc.dtsi" 7*4882a593Smuzhiyun#include "rv1106-evb-cam.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun chosen { 11*4882a593Smuzhiyun bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk0p5 rootfstype=ext4 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16"; 12*4882a593Smuzhiyun }; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun acodec_sound: acodec-sound { 15*4882a593Smuzhiyun compatible = "simple-audio-card"; 16*4882a593Smuzhiyun simple-audio-card,name = "rv1106-acodec"; 17*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 18*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 19*4882a593Smuzhiyun simple-audio-card,cpu { 20*4882a593Smuzhiyun sound-dai = <&i2s0_8ch>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun simple-audio-card,codec { 23*4882a593Smuzhiyun sound-dai = <&acodec>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun vdd_arm: vdd-arm { 28*4882a593Smuzhiyun compatible = "pwm-regulator"; 29*4882a593Smuzhiyun pwms = <&pwm0 0 5000 1>; 30*4882a593Smuzhiyun regulator-name = "vdd_arm"; 31*4882a593Smuzhiyun regulator-min-microvolt = <724000>; 32*4882a593Smuzhiyun regulator-max-microvolt = <1078000>; 33*4882a593Smuzhiyun regulator-init-microvolt = <950000>; 34*4882a593Smuzhiyun regulator-always-on; 35*4882a593Smuzhiyun regulator-boot-on; 36*4882a593Smuzhiyun regulator-settling-time-up-us = <250>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&acodec { 41*4882a593Smuzhiyun #sound-dai-cells = <0>; 42*4882a593Smuzhiyun //pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; 43*4882a593Smuzhiyun status = "okay"; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&cpu0 { 47*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&emmc { 51*4882a593Smuzhiyun bus-width = <8>; 52*4882a593Smuzhiyun cap-mmc-highspeed; 53*4882a593Smuzhiyun non-removable; 54*4882a593Smuzhiyun mmc-hs200-1_8v; 55*4882a593Smuzhiyun rockchip,default-sample-phase = <90>; 56*4882a593Smuzhiyun no-sdio; 57*4882a593Smuzhiyun no-sd; 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun&pwm0 { 62*4882a593Smuzhiyun status = "okay"; 63*4882a593Smuzhiyun}; 64*4882a593Smuzhiyun 65