1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun&csi2_dphy_hw { 8*4882a593Smuzhiyun status = "okay"; 9*4882a593Smuzhiyun}; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun&csi2_dphy0 { 12*4882a593Smuzhiyun status = "okay"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun ports { 15*4882a593Smuzhiyun #address-cells = <1>; 16*4882a593Smuzhiyun #size-cells = <0>; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun port@0 { 19*4882a593Smuzhiyun reg = <0>; 20*4882a593Smuzhiyun #address-cells = <1>; 21*4882a593Smuzhiyun #size-cells = <0>; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun csi_dphy_input0: endpoint@0 { 24*4882a593Smuzhiyun reg = <0>; 25*4882a593Smuzhiyun remote-endpoint = <&sc530ai_out>; 26*4882a593Smuzhiyun data-lanes = <1 2>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun csi_dphy_input1: endpoint@1 { 29*4882a593Smuzhiyun reg = <1>; 30*4882a593Smuzhiyun remote-endpoint = <&sc3336_out>; 31*4882a593Smuzhiyun data-lanes = <1 2>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun csi_dphy_input2: endpoint@2 { 34*4882a593Smuzhiyun reg = <2>; 35*4882a593Smuzhiyun remote-endpoint = <&sc4336_out>; 36*4882a593Smuzhiyun data-lanes = <1 2>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun csi_dphy_input3: endpoint@3 { 39*4882a593Smuzhiyun reg = <3>; 40*4882a593Smuzhiyun remote-endpoint = <&os04a10_out>; 41*4882a593Smuzhiyun data-lanes = <1 2>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun csi_dphy_input4: endpoint@4 { 44*4882a593Smuzhiyun reg = <4>; 45*4882a593Smuzhiyun remote-endpoint = <&jx_k17_out>; 46*4882a593Smuzhiyun data-lanes = <1 2>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun port@1 { 51*4882a593Smuzhiyun reg = <1>; 52*4882a593Smuzhiyun #address-cells = <1>; 53*4882a593Smuzhiyun #size-cells = <0>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun csi_dphy_output: endpoint@0 { 56*4882a593Smuzhiyun reg = <0>; 57*4882a593Smuzhiyun remote-endpoint = <&mipi_csi2_input>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun&i2c4 { 64*4882a593Smuzhiyun status = "okay"; 65*4882a593Smuzhiyun clock-frequency = <400000>; 66*4882a593Smuzhiyun pinctrl-names = "default"; 67*4882a593Smuzhiyun pinctrl-0 = <&i2c4m2_xfer>; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun sc530ai: sc530ai@30 { 70*4882a593Smuzhiyun compatible = "smartsens,sc530ai"; 71*4882a593Smuzhiyun status = "okay"; 72*4882a593Smuzhiyun reg = <0x30>; 73*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI0>; 74*4882a593Smuzhiyun clock-names = "xvclk"; 75*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 76*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; 77*4882a593Smuzhiyun pinctrl-names = "default"; 78*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out0>; 79*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 80*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 81*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-OT2115-PC1"; 82*4882a593Smuzhiyun rockchip,camera-module-lens-name = "30IRC-F16"; 83*4882a593Smuzhiyun port { 84*4882a593Smuzhiyun sc530ai_out: endpoint { 85*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input0>; 86*4882a593Smuzhiyun data-lanes = <1 2>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun sc3336: sc3336@30 { 92*4882a593Smuzhiyun compatible = "smartsens,sc3336"; 93*4882a593Smuzhiyun status = "okay"; 94*4882a593Smuzhiyun reg = <0x30>; 95*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI0>; 96*4882a593Smuzhiyun clock-names = "xvclk"; 97*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 98*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; 99*4882a593Smuzhiyun pinctrl-names = "default"; 100*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out0>; 101*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 102*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 103*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-OT2119-PC1"; 104*4882a593Smuzhiyun rockchip,camera-module-lens-name = "30IRC-F16"; 105*4882a593Smuzhiyun port { 106*4882a593Smuzhiyun sc3336_out: endpoint { 107*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input1>; 108*4882a593Smuzhiyun data-lanes = <1 2>; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun sc4336: sc4336@30 { 114*4882a593Smuzhiyun compatible = "smartsens,sc4336"; 115*4882a593Smuzhiyun status = "okay"; 116*4882a593Smuzhiyun reg = <0x30>; 117*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI0>; 118*4882a593Smuzhiyun clock-names = "xvclk"; 119*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 120*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; 121*4882a593Smuzhiyun pinctrl-names = "default"; 122*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out0>; 123*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 124*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 125*4882a593Smuzhiyun rockchip,camera-module-name = "OT01"; 126*4882a593Smuzhiyun rockchip,camera-module-lens-name = "40IRC_F16"; 127*4882a593Smuzhiyun port { 128*4882a593Smuzhiyun sc4336_out: endpoint { 129*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input2>; 130*4882a593Smuzhiyun data-lanes = <1 2>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun os04a10: os04a10@36 { 136*4882a593Smuzhiyun compatible = "ovti,os04a10"; 137*4882a593Smuzhiyun status = "okay"; 138*4882a593Smuzhiyun reg = <0x36>; 139*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI0>; 140*4882a593Smuzhiyun clock-names = "xvclk"; 141*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>; 142*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; 143*4882a593Smuzhiyun pinctrl-names = "default"; 144*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out0>; 145*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 146*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 147*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-OT1607-PV1"; 148*4882a593Smuzhiyun rockchip,camera-module-lens-name = "50IRC-F16"; 149*4882a593Smuzhiyun port { 150*4882a593Smuzhiyun os04a10_out: endpoint { 151*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input3>; 152*4882a593Smuzhiyun data-lanes = <1 2>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun jx_k17: jx_k17@40 { 158*4882a593Smuzhiyun compatible = "soi,jx_k17"; 159*4882a593Smuzhiyun status = "okay"; 160*4882a593Smuzhiyun reg = <0x40>; 161*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI0>; 162*4882a593Smuzhiyun clock-names = "xvclk"; 163*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 164*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; 165*4882a593Smuzhiyun pinctrl-names = "default"; 166*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out0>; 167*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 168*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 169*4882a593Smuzhiyun rockchip,camera-module-name = "T3801-A"; 170*4882a593Smuzhiyun rockchip,camera-module-lens-name = "22IRC-5M-F18"; 171*4882a593Smuzhiyun port { 172*4882a593Smuzhiyun jx_k17_out: endpoint { 173*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input4>; 174*4882a593Smuzhiyun data-lanes = <1 2>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun}; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun&mipi0_csi2 { 181*4882a593Smuzhiyun status = "okay"; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun ports { 184*4882a593Smuzhiyun #address-cells = <1>; 185*4882a593Smuzhiyun #size-cells = <0>; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun port@0 { 188*4882a593Smuzhiyun reg = <0>; 189*4882a593Smuzhiyun #address-cells = <1>; 190*4882a593Smuzhiyun #size-cells = <0>; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun mipi_csi2_input: endpoint@1 { 193*4882a593Smuzhiyun reg = <1>; 194*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_output>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun port@1 { 199*4882a593Smuzhiyun reg = <1>; 200*4882a593Smuzhiyun #address-cells = <1>; 201*4882a593Smuzhiyun #size-cells = <0>; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun mipi_csi2_output: endpoint@0 { 204*4882a593Smuzhiyun reg = <0>; 205*4882a593Smuzhiyun remote-endpoint = <&cif_mipi_in>; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun}; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun&rkcif { 212*4882a593Smuzhiyun status = "okay"; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&rkcif_mipi_lvds { 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun pinctrl-names = "default"; 219*4882a593Smuzhiyun pinctrl-0 = <&mipi_pins>; 220*4882a593Smuzhiyun port { 221*4882a593Smuzhiyun /* MIPI CSI-2 endpoint */ 222*4882a593Smuzhiyun cif_mipi_in: endpoint { 223*4882a593Smuzhiyun remote-endpoint = <&mipi_csi2_output>; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun}; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun&rkcif_mipi_lvds_sditf { 229*4882a593Smuzhiyun status = "okay"; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun port { 232*4882a593Smuzhiyun /* MIPI CSI-2 endpoint */ 233*4882a593Smuzhiyun mipi_lvds_sditf: endpoint { 234*4882a593Smuzhiyun remote-endpoint = <&isp_in>; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun}; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun&rkisp { 240*4882a593Smuzhiyun status = "okay"; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&rkisp_vir0 { 244*4882a593Smuzhiyun status = "okay"; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun port@0 { 247*4882a593Smuzhiyun isp_in: endpoint { 248*4882a593Smuzhiyun remote-endpoint = <&mipi_lvds_sditf>; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun}; 252*4882a593Smuzhiyun 253