xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1103g-battery-ipc-v11.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include "rv1103.dtsi"
9*4882a593Smuzhiyun#include "rv1106-evb.dtsi"
10*4882a593Smuzhiyun#include "rv1106-thunder-boot-spi-nor.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Rockchip RV1103G Battery IPC V11 Board";
14*4882a593Smuzhiyun	compatible = "rockchip,rv1103g-battery-ipc-v11", "rockchip,rv1103";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	aliases {
17*4882a593Smuzhiyun		/delete-property/ csi2dphy1;
18*4882a593Smuzhiyun		/delete-property/ csi2dphy2;
19*4882a593Smuzhiyun		/delete-property/ ethernet0;
20*4882a593Smuzhiyun		/delete-property/ i2c0;
21*4882a593Smuzhiyun		/delete-property/ i2c1;
22*4882a593Smuzhiyun		/delete-property/ i2c2;
23*4882a593Smuzhiyun		/delete-property/ i2c3;
24*4882a593Smuzhiyun		/delete-property/ mmc0;
25*4882a593Smuzhiyun		/delete-property/ mmc1;
26*4882a593Smuzhiyun		/delete-property/ pwm0;
27*4882a593Smuzhiyun		/delete-property/ pwm1;
28*4882a593Smuzhiyun		/delete-property/ pwm2;
29*4882a593Smuzhiyun		/delete-property/ pwm3;
30*4882a593Smuzhiyun		/delete-property/ pwm4;
31*4882a593Smuzhiyun		/delete-property/ pwm5;
32*4882a593Smuzhiyun		/delete-property/ pwm6;
33*4882a593Smuzhiyun		/delete-property/ pwm7;
34*4882a593Smuzhiyun		/delete-property/ pwm8;
35*4882a593Smuzhiyun		/delete-property/ pwm9;
36*4882a593Smuzhiyun		/delete-property/ rkcif_mipi_lvds1;
37*4882a593Smuzhiyun		/delete-property/ serial0;
38*4882a593Smuzhiyun		/delete-property/ serial1;
39*4882a593Smuzhiyun		/delete-property/ serial3;
40*4882a593Smuzhiyun		/delete-property/ serial4;
41*4882a593Smuzhiyun		/delete-property/ serial5;
42*4882a593Smuzhiyun		/delete-property/ spi0;
43*4882a593Smuzhiyun		/delete-property/ spi1;
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	chosen {
47*4882a593Smuzhiyun		bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip storagemedia=mtd androidboot.storagemedia=mtd androidboot.mode=normal";
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	acodec_sound: acodec-sound {
51*4882a593Smuzhiyun		compatible = "simple-audio-card";
52*4882a593Smuzhiyun		simple-audio-card,name = "rv1103-acodec";
53*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
54*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
55*4882a593Smuzhiyun		simple-audio-card,cpu {
56*4882a593Smuzhiyun			sound-dai = <&i2s0_8ch>;
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun		simple-audio-card,codec {
59*4882a593Smuzhiyun			sound-dai = <&acodec>;
60*4882a593Smuzhiyun		};
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	vcc_1v8: vcc-1v8 {
64*4882a593Smuzhiyun		compatible = "regulator-fixed";
65*4882a593Smuzhiyun		regulator-name = "vcc_1v8";
66*4882a593Smuzhiyun		regulator-always-on;
67*4882a593Smuzhiyun		regulator-boot-on;
68*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
69*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
70*4882a593Smuzhiyun	};
71*4882a593Smuzhiyun};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun/delete-node/ &dsm;
74*4882a593Smuzhiyun/delete-node/ &i2c0;
75*4882a593Smuzhiyun/delete-node/ &i2c1;
76*4882a593Smuzhiyun/delete-node/ &i2c2;
77*4882a593Smuzhiyun/delete-node/ &i2c3;
78*4882a593Smuzhiyun/delete-node/ &emmc;
79*4882a593Smuzhiyun/delete-node/ &gmac;
80*4882a593Smuzhiyun/delete-node/ &pwm0;
81*4882a593Smuzhiyun/delete-node/ &pwm1;
82*4882a593Smuzhiyun/delete-node/ &pwm2;
83*4882a593Smuzhiyun/delete-node/ &pwm3;
84*4882a593Smuzhiyun/delete-node/ &pwm4;
85*4882a593Smuzhiyun/delete-node/ &pwm5;
86*4882a593Smuzhiyun/delete-node/ &pwm6;
87*4882a593Smuzhiyun/delete-node/ &pwm7;
88*4882a593Smuzhiyun/delete-node/ &pwm8;
89*4882a593Smuzhiyun/delete-node/ &pwm9;
90*4882a593Smuzhiyun/delete-node/ &rkcif_dvp;
91*4882a593Smuzhiyun/delete-node/ &rkcif_dvp_sditf;
92*4882a593Smuzhiyun/delete-node/ &rkcif_mipi_lvds1;
93*4882a593Smuzhiyun/delete-node/ &rkcif_mipi_lvds1_sditf;
94*4882a593Smuzhiyun/delete-node/ &sdmmc;
95*4882a593Smuzhiyun/delete-node/ &spi0;
96*4882a593Smuzhiyun/delete-node/ &spi1;
97*4882a593Smuzhiyun/delete-node/ &uart0;
98*4882a593Smuzhiyun/delete-node/ &uart1;
99*4882a593Smuzhiyun/delete-node/ &uart3;
100*4882a593Smuzhiyun/delete-node/ &uart4;
101*4882a593Smuzhiyun/delete-node/ &uart5;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun&acodec {
104*4882a593Smuzhiyun	#sound-dai-cells = <0>;
105*4882a593Smuzhiyun	pa-ctl-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
106*4882a593Smuzhiyun	status = "okay";
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&csi2_dphy_hw {
110*4882a593Smuzhiyun	status = "okay";
111*4882a593Smuzhiyun};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun&csi2_dphy0 {
114*4882a593Smuzhiyun	status = "okay";
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun	ports {
117*4882a593Smuzhiyun		#address-cells = <1>;
118*4882a593Smuzhiyun		#size-cells = <0>;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		port@0 {
121*4882a593Smuzhiyun			reg = <0>;
122*4882a593Smuzhiyun			#address-cells = <1>;
123*4882a593Smuzhiyun			#size-cells = <0>;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun			csi_dphy_input0: endpoint@0 {
126*4882a593Smuzhiyun				reg = <0>;
127*4882a593Smuzhiyun				remote-endpoint = <&sc3338_out>;
128*4882a593Smuzhiyun				data-lanes = <1 2>;
129*4882a593Smuzhiyun			};
130*4882a593Smuzhiyun		};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun		port@1 {
133*4882a593Smuzhiyun			reg = <1>;
134*4882a593Smuzhiyun			#address-cells = <1>;
135*4882a593Smuzhiyun			#size-cells = <0>;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun			csi_dphy_output: endpoint@0 {
138*4882a593Smuzhiyun				reg = <0>;
139*4882a593Smuzhiyun				remote-endpoint = <&mipi_csi2_input>;
140*4882a593Smuzhiyun			};
141*4882a593Smuzhiyun		};
142*4882a593Smuzhiyun	};
143*4882a593Smuzhiyun};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun&fiq_debugger {
146*4882a593Smuzhiyun	rockchip,baudrate = <1500000>;
147*4882a593Smuzhiyun	pinctrl-names = "default";
148*4882a593Smuzhiyun	pinctrl-0 = <&uart2m1_xfer>;
149*4882a593Smuzhiyun};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun&i2c4 {
152*4882a593Smuzhiyun	rockchip,amp-shared;
153*4882a593Smuzhiyun	clock-frequency = <400000>;
154*4882a593Smuzhiyun	pinctrl-names = "default";
155*4882a593Smuzhiyun	pinctrl-0 = <&i2c4m2_xfer>;
156*4882a593Smuzhiyun	status = "okay";
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun	sc3338: sc3338@30 {
159*4882a593Smuzhiyun		compatible = "smartsens,sc3338";
160*4882a593Smuzhiyun		status = "okay";
161*4882a593Smuzhiyun		reg = <0x30>;
162*4882a593Smuzhiyun		clocks = <&cru MCLK_REF_MIPI0>;
163*4882a593Smuzhiyun		clock-names = "xvclk";
164*4882a593Smuzhiyun		pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
165*4882a593Smuzhiyun		pinctrl-names = "default";
166*4882a593Smuzhiyun		pinctrl-0 = <&mipi_refclk_out0>;
167*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
168*4882a593Smuzhiyun		rockchip,camera-module-facing = "back";
169*4882a593Smuzhiyun		rockchip,camera-module-name = "FKO1";
170*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "30IRC-F16";
171*4882a593Smuzhiyun		port {
172*4882a593Smuzhiyun			sc3338_out: endpoint {
173*4882a593Smuzhiyun				remote-endpoint = <&csi_dphy_input0>;
174*4882a593Smuzhiyun				data-lanes = <1 2>;
175*4882a593Smuzhiyun			};
176*4882a593Smuzhiyun		};
177*4882a593Smuzhiyun	};
178*4882a593Smuzhiyun};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun&i2s0_8ch {
181*4882a593Smuzhiyun	#sound-dai-cells = <0>;
182*4882a593Smuzhiyun	status = "okay";
183*4882a593Smuzhiyun};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun&mailbox {
186*4882a593Smuzhiyun	status = "okay";
187*4882a593Smuzhiyun};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun&memory {
190*4882a593Smuzhiyun	reg = <0x00000000 0x04000000>;
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&mipi0_csi2 {
194*4882a593Smuzhiyun	status = "okay";
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun	ports {
197*4882a593Smuzhiyun		#address-cells = <1>;
198*4882a593Smuzhiyun		#size-cells = <0>;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun		port@0 {
201*4882a593Smuzhiyun			reg = <0>;
202*4882a593Smuzhiyun			#address-cells = <1>;
203*4882a593Smuzhiyun			#size-cells = <0>;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun			mipi_csi2_input: endpoint@1 {
206*4882a593Smuzhiyun				reg = <1>;
207*4882a593Smuzhiyun				remote-endpoint = <&csi_dphy_output>;
208*4882a593Smuzhiyun			};
209*4882a593Smuzhiyun		};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun		port@1 {
212*4882a593Smuzhiyun			reg = <1>;
213*4882a593Smuzhiyun			#address-cells = <1>;
214*4882a593Smuzhiyun			#size-cells = <0>;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun			mipi_csi2_output: endpoint@0 {
217*4882a593Smuzhiyun				reg = <0>;
218*4882a593Smuzhiyun				remote-endpoint = <&cif_mipi_in>;
219*4882a593Smuzhiyun			};
220*4882a593Smuzhiyun		};
221*4882a593Smuzhiyun	};
222*4882a593Smuzhiyun};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun&pwm10 {
225*4882a593Smuzhiyun	status = "okay";
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&pwm11 {
229*4882a593Smuzhiyun	status = "okay";
230*4882a593Smuzhiyun	pinctrl-0 = <&pwm11m1_pins>;
231*4882a593Smuzhiyun};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun&rkcif {
234*4882a593Smuzhiyun	status = "okay";
235*4882a593Smuzhiyun};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun&rkcif_mipi_lvds {
238*4882a593Smuzhiyun	status = "okay";
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun	memory-region-thunderboot = <&rkisp_thunderboot>;
241*4882a593Smuzhiyun	pinctrl-names = "default";
242*4882a593Smuzhiyun	pinctrl-0 = <&mipi_pins>;
243*4882a593Smuzhiyun	port {
244*4882a593Smuzhiyun		/* MIPI CSI-2 endpoint */
245*4882a593Smuzhiyun		cif_mipi_in: endpoint {
246*4882a593Smuzhiyun			remote-endpoint = <&mipi_csi2_output>;
247*4882a593Smuzhiyun		};
248*4882a593Smuzhiyun	};
249*4882a593Smuzhiyun};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun&rkcif_mipi_lvds_sditf {
252*4882a593Smuzhiyun	status = "okay";
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun	port {
255*4882a593Smuzhiyun		/* MIPI CSI-2 endpoint */
256*4882a593Smuzhiyun		mipi_lvds_sditf: endpoint {
257*4882a593Smuzhiyun			remote-endpoint = <&isp_in>;
258*4882a593Smuzhiyun		};
259*4882a593Smuzhiyun	};
260*4882a593Smuzhiyun};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun&rkisp {
263*4882a593Smuzhiyun	status = "okay";
264*4882a593Smuzhiyun};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun&rkisp_vir0 {
267*4882a593Smuzhiyun	status = "okay";
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun	port@0 {
270*4882a593Smuzhiyun		isp_in: endpoint {
271*4882a593Smuzhiyun			remote-endpoint = <&mipi_lvds_sditf>;
272*4882a593Smuzhiyun		};
273*4882a593Smuzhiyun	};
274*4882a593Smuzhiyun};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun&saradc {
277*4882a593Smuzhiyun	status = "okay";
278*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
279*4882a593Smuzhiyun};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun&sdio {
282*4882a593Smuzhiyun	max-frequency = <30000000>;
283*4882a593Smuzhiyun	no-sd;
284*4882a593Smuzhiyun	no-mmc;
285*4882a593Smuzhiyun	bus-width = <4>;
286*4882a593Smuzhiyun	cap-sd-highspeed;
287*4882a593Smuzhiyun	cap-sdio-irq;
288*4882a593Smuzhiyun	keep-power-in-suspend;
289*4882a593Smuzhiyun	non-removable;
290*4882a593Smuzhiyun	pinctrl-names = "normal", "idle";
291*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc1m1_cmd &sdmmc1m1_clk &sdmmc1m1_bus4>;
292*4882a593Smuzhiyun	pinctrl-1 = <&sdmmc1m1_idle_pins>;
293*4882a593Smuzhiyun	no-prescan-powerup;
294*4882a593Smuzhiyun	post-power-on-delay-ms = <0>;
295*4882a593Smuzhiyun	status = "okay";
296*4882a593Smuzhiyun};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun&sfc {
299*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_SFC>;
300*4882a593Smuzhiyun	assigned-clock-rates = <125000000>;
301*4882a593Smuzhiyun	status = "okay";
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun	flash@0 {
304*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
305*4882a593Smuzhiyun		reg = <0>;
306*4882a593Smuzhiyun		spi-max-frequency = <125000000>;
307*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
308*4882a593Smuzhiyun		spi-tx-bus-width = <1>;
309*4882a593Smuzhiyun	};
310*4882a593Smuzhiyun};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun&thunder_boot_service {
313*4882a593Smuzhiyun	status = "okay";
314*4882a593Smuzhiyun};
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun&rkisp_thunderboot {
317*4882a593Smuzhiyun	/* reg's offset MUST match with RTOS */
318*4882a593Smuzhiyun	/*
319*4882a593Smuzhiyun	 * vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
320*4882a593Smuzhiyun	 * e.g. 2304x1296: 0xf30000
321*4882a593Smuzhiyun	 */
322*4882a593Smuzhiyun	reg = <0x00860000 0xf30000>;
323*4882a593Smuzhiyun};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun&ramdisk_r {
326*4882a593Smuzhiyun	reg = <0x1790000 (10 * 0x00100000)>;
327*4882a593Smuzhiyun};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun&ramdisk_c {
330*4882a593Smuzhiyun	reg = <0x2190000 (5 * 0x00100000)>;
331*4882a593Smuzhiyun};
332