1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 12*4882a593Smuzhiyun * License, or (at your option) any later version. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun/dts-v1/; 44*4882a593Smuzhiyun#include "rk3288-evb.dtsi" 45*4882a593Smuzhiyun#include "rk3288-android.dtsi" 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun/ { 48*4882a593Smuzhiyun compatible = "rockchip,rk3288-evb-rk818", "rockchip,rk3288"; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 51*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 52*4882a593Smuzhiyun clocks = <&rk818 1>; 53*4882a593Smuzhiyun clock-names = "ext_clock"; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* 56*4882a593Smuzhiyun * On the module itself this is one of these (depending 57*4882a593Smuzhiyun * on the actual card populated): 58*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 59*4882a593Smuzhiyun * - PDN (power down when low) 60*4882a593Smuzhiyun */ 61*4882a593Smuzhiyun reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun wireless-bluetooth { 65*4882a593Smuzhiyun clocks = <&rk818 1>; 66*4882a593Smuzhiyun clock-names = "ext_clock"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /delete-node/ sdmmc-regulator; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun vibrator { 72*4882a593Smuzhiyun compatible = "rk-vibrator-gpio"; 73*4882a593Smuzhiyun vibrator-gpio = <&gpio7 21 GPIO_ACTIVE_LOW>; 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun xin32k: xin32k { 78*4882a593Smuzhiyun compatible = "fixed-clock"; 79*4882a593Smuzhiyun clock-frequency = <32768>; 80*4882a593Smuzhiyun clock-output-names = "xin32k"; 81*4882a593Smuzhiyun #clock-cells = <0>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun}; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun&cpu0 { 87*4882a593Smuzhiyun cpu0-supply = <&vdd_cpu>; 88*4882a593Smuzhiyun}; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun&gpu { 91*4882a593Smuzhiyun status = "okay"; 92*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun&i2c0 { 96*4882a593Smuzhiyun clock-frequency = <400000>; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun vdd_cpu: syr827@40 { 99*4882a593Smuzhiyun compatible = "silergy,syr827"; 100*4882a593Smuzhiyun reg = <0x40>; 101*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 102*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 103*4882a593Smuzhiyun pinctrl-0 = <&vsel1_gpio>; 104*4882a593Smuzhiyun vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 105*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 106*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 107*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 108*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 109*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 110*4882a593Smuzhiyun regulator-always-on; 111*4882a593Smuzhiyun regulator-boot-on; 112*4882a593Smuzhiyun regulator-initial-state = <3>; 113*4882a593Smuzhiyun regulator-state-mem { 114*4882a593Smuzhiyun regulator-off-in-suspend; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun rk818: pmic@1c { 119*4882a593Smuzhiyun compatible = "rockchip,rk818"; 120*4882a593Smuzhiyun reg = <0x1c>; 121*4882a593Smuzhiyun status = "okay"; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun clock-output-names = "rk818-clkout1", "wifibt_32kin"; 124*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 125*4882a593Smuzhiyun interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 126*4882a593Smuzhiyun pinctrl-names = "default"; 127*4882a593Smuzhiyun pinctrl-0 = <&pmic_int>; 128*4882a593Smuzhiyun rockchip,system-power-controller; 129*4882a593Smuzhiyun wakeup-source; 130*4882a593Smuzhiyun #clock-cells = <1>; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 133*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 134*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 135*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 136*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 137*4882a593Smuzhiyun vcc7-supply = <&vcc_sys>; 138*4882a593Smuzhiyun vcc8-supply = <&vcc_sys>; 139*4882a593Smuzhiyun vcc9-supply = <&vcc_io>; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun regulators { 142*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 143*4882a593Smuzhiyun regulator-name = "vdd_logic"; 144*4882a593Smuzhiyun regulator-always-on; 145*4882a593Smuzhiyun regulator-boot-on; 146*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 147*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 148*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 149*4882a593Smuzhiyun regulator-state-mem { 150*4882a593Smuzhiyun regulator-on-in-suspend; 151*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun vdd_gpu: DCDC_REG2 { 156*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 157*4882a593Smuzhiyun regulator-always-on; 158*4882a593Smuzhiyun regulator-boot-on; 159*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 160*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 161*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 162*4882a593Smuzhiyun regulator-state-mem { 163*4882a593Smuzhiyun regulator-on-in-suspend; 164*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 169*4882a593Smuzhiyun regulator-always-on; 170*4882a593Smuzhiyun regulator-boot-on; 171*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 172*4882a593Smuzhiyun regulator-state-mem { 173*4882a593Smuzhiyun regulator-on-in-suspend; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 178*4882a593Smuzhiyun regulator-always-on; 179*4882a593Smuzhiyun regulator-boot-on; 180*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 181*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 182*4882a593Smuzhiyun regulator-name = "vcc_io"; 183*4882a593Smuzhiyun regulator-state-mem { 184*4882a593Smuzhiyun regulator-off-in-suspend; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun vcca_codec: LDO_REG1 { 189*4882a593Smuzhiyun regulator-always-on; 190*4882a593Smuzhiyun regulator-boot-on; 191*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 192*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 193*4882a593Smuzhiyun regulator-name = "vcca_codec"; 194*4882a593Smuzhiyun regulator-state-mem { 195*4882a593Smuzhiyun regulator-off-in-suspend; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun vcc_tp: LDO_REG2 { 200*4882a593Smuzhiyun regulator-always-on; 201*4882a593Smuzhiyun regulator-boot-on; 202*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 203*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 204*4882a593Smuzhiyun regulator-name = "vcc_tp"; 205*4882a593Smuzhiyun regulator-state-mem { 206*4882a593Smuzhiyun regulator-off-in-suspend; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun vdd_10: LDO_REG3 { 211*4882a593Smuzhiyun regulator-always-on; 212*4882a593Smuzhiyun regulator-boot-on; 213*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 214*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 215*4882a593Smuzhiyun regulator-name = "vdd_10"; 216*4882a593Smuzhiyun regulator-state-mem { 217*4882a593Smuzhiyun regulator-on-in-suspend; 218*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun vcc18_lcd: LDO_REG4 { 223*4882a593Smuzhiyun regulator-always-on; 224*4882a593Smuzhiyun regulator-boot-on; 225*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 226*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 227*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 228*4882a593Smuzhiyun regulator-state-mem { 229*4882a593Smuzhiyun regulator-off-in-suspend; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun vcc_lcd:LDO_REG5 { 234*4882a593Smuzhiyun regulator-always-on; 235*4882a593Smuzhiyun regulator-boot-on; 236*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 237*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 238*4882a593Smuzhiyun regulator-name = "vcc_lcd"; 239*4882a593Smuzhiyun regulator-state-mem { 240*4882a593Smuzhiyun regulator-on-in-suspend; 241*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun }; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun vdd10_lcd: LDO_REG6 { 246*4882a593Smuzhiyun regulator-always-on; 247*4882a593Smuzhiyun regulator-boot-on; 248*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 249*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 250*4882a593Smuzhiyun regulator-name = "vdd10_lcd"; 251*4882a593Smuzhiyun regulator-state-mem { 252*4882a593Smuzhiyun regulator-off-in-suspend; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun vcc_18: LDO_REG7 { 257*4882a593Smuzhiyun regulator-always-on; 258*4882a593Smuzhiyun regulator-boot-on; 259*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 260*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 261*4882a593Smuzhiyun regulator-name = "vcc_18"; 262*4882a593Smuzhiyun regulator-state-mem { 263*4882a593Smuzhiyun regulator-on-in-suspend; 264*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun vccio_wl: LDO_REG8 { 269*4882a593Smuzhiyun regulator-always-on; 270*4882a593Smuzhiyun regulator-boot-on; 271*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 272*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 273*4882a593Smuzhiyun regulator-name = "vccio_wl"; 274*4882a593Smuzhiyun regulator-state-mem { 275*4882a593Smuzhiyun regulator-on-in-suspend; 276*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun vccio_sd: LDO_REG9 { 281*4882a593Smuzhiyun regulator-always-on; 282*4882a593Smuzhiyun regulator-boot-on; 283*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 284*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 285*4882a593Smuzhiyun regulator-name = "vccio_sd"; 286*4882a593Smuzhiyun regulator-state-mem { 287*4882a593Smuzhiyun regulator-on-in-suspend; 288*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun vcc_sd: SWITCH_REG { 293*4882a593Smuzhiyun regulator-always-on; 294*4882a593Smuzhiyun regulator-boot-on; 295*4882a593Smuzhiyun regulator-name = "vcc_sd"; 296*4882a593Smuzhiyun regulator-state-mem { 297*4882a593Smuzhiyun regulator-on-in-suspend; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&i2c1 { 305*4882a593Smuzhiyun status = "okay"; 306*4882a593Smuzhiyun clock-frequency = <400000>; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun mpu6050@68 { 309*4882a593Smuzhiyun compatible = "invensense,mpu6050"; 310*4882a593Smuzhiyun status = "okay"; 311*4882a593Smuzhiyun pinctrl-names = "default"; 312*4882a593Smuzhiyun pinctrl-0 = <&mpu6050_irq_gpio>; 313*4882a593Smuzhiyun reg = <0x68>; 314*4882a593Smuzhiyun irq-gpio = <&gpio8 0 IRQ_TYPE_EDGE_RISING>; 315*4882a593Smuzhiyun mpu-int_config = <0x10>; 316*4882a593Smuzhiyun mpu-level_shifter = <0>; 317*4882a593Smuzhiyun mpu-orientation = <0 1 0 1 0 0 0 0 1>; 318*4882a593Smuzhiyun orientation-x= <0>; 319*4882a593Smuzhiyun orientation-y= <1>; 320*4882a593Smuzhiyun orientation-z= <0>; 321*4882a593Smuzhiyun support-hw-poweroff = <1>; 322*4882a593Smuzhiyun mpu-debug = <1>; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun}; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun&dsi0 { 327*4882a593Smuzhiyun rockchip,dual-channel = <&dsi1>; 328*4882a593Smuzhiyun rockchip,lane-rate = <900>; 329*4882a593Smuzhiyun status = "okay"; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun panel@0 { 332*4882a593Smuzhiyun compatible = "simple-panel-dsi"; 333*4882a593Smuzhiyun reg = <0>; 334*4882a593Smuzhiyun backlight = <&backlight>; 335*4882a593Smuzhiyun power-supply = <&vcc_lcd>; 336*4882a593Smuzhiyun reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; 337*4882a593Smuzhiyun reset-delay-ms = <120>; 338*4882a593Smuzhiyun init-delay-ms = <120>; 339*4882a593Smuzhiyun enable-delay-ms = <120>; 340*4882a593Smuzhiyun prepare-delay-ms = <120>; 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 343*4882a593Smuzhiyun MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 344*4882a593Smuzhiyun dsi,format = <MIPI_DSI_FMT_RGB888>; 345*4882a593Smuzhiyun dsi,lanes = <8>; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun panel-init-sequence = [ 348*4882a593Smuzhiyun 05 64 01 11 349*4882a593Smuzhiyun 05 14 01 29 350*4882a593Smuzhiyun ]; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun panel-exit-sequence = [ 353*4882a593Smuzhiyun 05 64 01 28 354*4882a593Smuzhiyun 05 96 01 10 355*4882a593Smuzhiyun ]; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun display-timings { 358*4882a593Smuzhiyun native-mode = <&timing0>; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun timing0: timing0 { 361*4882a593Smuzhiyun clock-frequency = <230000000>; 362*4882a593Smuzhiyun hactive = <1536>; 363*4882a593Smuzhiyun vactive = <2048>; 364*4882a593Smuzhiyun hback-porch = <180>; 365*4882a593Smuzhiyun hfront-porch = <180>; 366*4882a593Smuzhiyun vback-porch = <10>; 367*4882a593Smuzhiyun vfront-porch = <14>; 368*4882a593Smuzhiyun hsync-len = <48>; 369*4882a593Smuzhiyun vsync-len = <2>; 370*4882a593Smuzhiyun hsync-active = <0>; 371*4882a593Smuzhiyun vsync-active = <0>; 372*4882a593Smuzhiyun de-active = <0>; 373*4882a593Smuzhiyun pixelclk-active = <0>; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun }; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun}; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun&dsi1 { 380*4882a593Smuzhiyun status = "okay"; 381*4882a593Smuzhiyun}; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun&dsi0_in_vopl { 384*4882a593Smuzhiyun status = "okay"; 385*4882a593Smuzhiyun}; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun&dsi0_in_vopb { 388*4882a593Smuzhiyun status = "disabled"; 389*4882a593Smuzhiyun}; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun&route_dsi0 { 392*4882a593Smuzhiyun connect = <&vopl_out_dsi0>; 393*4882a593Smuzhiyun status = "okay"; 394*4882a593Smuzhiyun}; 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun&tsadc { 397*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 398*4882a593Smuzhiyun}; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun&pinctrl { 401*4882a593Smuzhiyun lcd { 402*4882a593Smuzhiyun lcd_en: lcd-en { 403*4882a593Smuzhiyun rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun mpu6050 { 408*4882a593Smuzhiyun mpu6050_irq_gpio: mpu6050-irq-gpio { 409*4882a593Smuzhiyun rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun }; 412*4882a593Smuzhiyun 413*4882a593Smuzhiyun pmic { 414*4882a593Smuzhiyun pmic_int: pmic-int { 415*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 416*4882a593Smuzhiyun }; 417*4882a593Smuzhiyun vsel1_gpio: vsel1-gpio { 418*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 419*4882a593Smuzhiyun }; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun}; 422