xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3288-veyron-pinky.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Google Veyron Pinky Rev 2 board device tree source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2015 Google, Inc
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "rk3288-veyron-chromebook.dtsi"
10*4882a593Smuzhiyun#include "cros-ec-sbs.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Google Pinky";
14*4882a593Smuzhiyun	compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",
15*4882a593Smuzhiyun		     "google,veyron", "rockchip,rk3288";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	/delete-node/backlight-regulator;
18*4882a593Smuzhiyun	/delete-node/panel-regulator;
19*4882a593Smuzhiyun	/delete-node/emmc-pwrseq;
20*4882a593Smuzhiyun	/delete-node/vcc18-lcd;
21*4882a593Smuzhiyun};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun&backlight {
24*4882a593Smuzhiyun	/delete-property/power-supply;
25*4882a593Smuzhiyun};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun&emmc {
28*4882a593Smuzhiyun	/*
29*4882a593Smuzhiyun	 * Use a pullup instead of a drive since the output is 3.3V and
30*4882a593Smuzhiyun	 * really should be 1.8V (oops).  The external pulldown will help
31*4882a593Smuzhiyun	 * bring the voltage down if we only drive with a pullup here.
32*4882a593Smuzhiyun	 * Therefore disable the powerseq (and actual reset) for pinky.
33*4882a593Smuzhiyun	 */
34*4882a593Smuzhiyun	/delete-property/mmc-pwrseq;
35*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8 &emmc_reset>;
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&edp {
39*4882a593Smuzhiyun	/delete-property/pinctrl-names;
40*4882a593Smuzhiyun	/delete-property/pinctrl-0;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	force-hpd;
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&lid_switch {
46*4882a593Smuzhiyun	pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	power {
49*4882a593Smuzhiyun		gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun/* Touchpad connector */
54*4882a593Smuzhiyun&i2c3 {
55*4882a593Smuzhiyun	status = "okay";
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	clock-frequency = <400000>;
58*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <50>;
59*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <300>;
60*4882a593Smuzhiyun};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun&panel {
63*4882a593Smuzhiyun	power-supply = <&vcc33_lcd>;
64*4882a593Smuzhiyun};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun&pinctrl {
67*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
68*4882a593Smuzhiyun	pinctrl-0 = <
69*4882a593Smuzhiyun		/* Common for sleep and wake, but no owners */
70*4882a593Smuzhiyun		&ddr0_retention
71*4882a593Smuzhiyun		&ddrio_pwroff
72*4882a593Smuzhiyun		&global_pwroff
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		/* Wake only */
75*4882a593Smuzhiyun		&suspend_l_wake
76*4882a593Smuzhiyun		&bt_dev_wake_awake
77*4882a593Smuzhiyun	>;
78*4882a593Smuzhiyun	pinctrl-1 = <
79*4882a593Smuzhiyun		/* Common for sleep and wake, but no owners */
80*4882a593Smuzhiyun		&ddr0_retention
81*4882a593Smuzhiyun		&ddrio_pwroff
82*4882a593Smuzhiyun		&global_pwroff
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		/* Sleep only */
85*4882a593Smuzhiyun		&suspend_l_sleep
86*4882a593Smuzhiyun		&bt_dev_wake_sleep
87*4882a593Smuzhiyun	>;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	/delete-node/ lcd;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	backlight {
92*4882a593Smuzhiyun		/delete-node/ bl_pwr_en;
93*4882a593Smuzhiyun	};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun	buttons {
96*4882a593Smuzhiyun		pwr_key_h: pwr-key-h {
97*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
98*4882a593Smuzhiyun		};
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun	emmc {
102*4882a593Smuzhiyun		emmc_reset: emmc-reset {
103*4882a593Smuzhiyun			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
104*4882a593Smuzhiyun		};
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun	sdmmc {
108*4882a593Smuzhiyun		sdmmc_wp_pin: sdmmc-wp-pin {
109*4882a593Smuzhiyun			rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
110*4882a593Smuzhiyun		};
111*4882a593Smuzhiyun	};
112*4882a593Smuzhiyun};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun&rk808 {
115*4882a593Smuzhiyun	regulators {
116*4882a593Smuzhiyun		vcc18_lcd: SWITCH_REG2 {
117*4882a593Smuzhiyun			regulator-always-on;
118*4882a593Smuzhiyun			regulator-boot-on;
119*4882a593Smuzhiyun			regulator-name = "vcc18_lcd";
120*4882a593Smuzhiyun			regulator-state-mem {
121*4882a593Smuzhiyun				regulator-off-in-suspend;
122*4882a593Smuzhiyun			};
123*4882a593Smuzhiyun		};
124*4882a593Smuzhiyun	};
125*4882a593Smuzhiyun};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun&sdmmc {
128*4882a593Smuzhiyun	pinctrl-names = "default";
129*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
130*4882a593Smuzhiyun		     &sdmmc_wp_pin &sdmmc_bus4>;
131*4882a593Smuzhiyun	wp-gpios = <&gpio7 RK_PB2 GPIO_ACTIVE_HIGH>;
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun&tsadc {
135*4882a593Smuzhiyun	/* Some connection is flaky making the tsadc hang the system */
136*4882a593Smuzhiyun	status = "disabled";
137*4882a593Smuzhiyun};
138