xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3288-veyron-jerry.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Google Veyron Jerry Rev 3+ board device tree source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2015 Google, Inc
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "rk3288-veyron-chromebook.dtsi"
10*4882a593Smuzhiyun#include "cros-ec-sbs.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Google Jerry";
14*4882a593Smuzhiyun	compatible = "google,veyron-jerry-rev15", "google,veyron-jerry-rev14",
15*4882a593Smuzhiyun		     "google,veyron-jerry-rev13", "google,veyron-jerry-rev12",
16*4882a593Smuzhiyun		     "google,veyron-jerry-rev11", "google,veyron-jerry-rev10",
17*4882a593Smuzhiyun		     "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
18*4882a593Smuzhiyun		     "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
19*4882a593Smuzhiyun		     "google,veyron-jerry-rev3", "google,veyron-jerry",
20*4882a593Smuzhiyun		     "google,veyron", "rockchip,rk3288";
21*4882a593Smuzhiyun};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun&rk808 {
24*4882a593Smuzhiyun	pinctrl-names = "default";
25*4882a593Smuzhiyun	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
26*4882a593Smuzhiyun	dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
27*4882a593Smuzhiyun		    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	regulators {
30*4882a593Smuzhiyun		mic_vcc: LDO_REG2 {
31*4882a593Smuzhiyun			regulator-name = "mic_vcc";
32*4882a593Smuzhiyun			regulator-always-on;
33*4882a593Smuzhiyun			regulator-boot-on;
34*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
35*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
36*4882a593Smuzhiyun			regulator-state-mem {
37*4882a593Smuzhiyun				regulator-off-in-suspend;
38*4882a593Smuzhiyun			};
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun&sdio0 {
44*4882a593Smuzhiyun	#address-cells = <1>;
45*4882a593Smuzhiyun	#size-cells = <0>;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	mwifiex: wifi@1 {
48*4882a593Smuzhiyun		compatible = "marvell,sd8897";
49*4882a593Smuzhiyun		reg = <1>;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun		marvell,caldata-txpwrlimit-2g = /bits/ 8 <
52*4882a593Smuzhiyun0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53*4882a593Smuzhiyun0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54*4882a593Smuzhiyun0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56*4882a593Smuzhiyun0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57*4882a593Smuzhiyun0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58*4882a593Smuzhiyun0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59*4882a593Smuzhiyun0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
60*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x04 0x00 0x0f
61*4882a593Smuzhiyun0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
62*4882a593Smuzhiyun0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
63*4882a593Smuzhiyun0x24 0x00 0x67 0x09 0x14 0x05 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
64*4882a593Smuzhiyun0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
65*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x06 0x00 0x0f
66*4882a593Smuzhiyun0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
67*4882a593Smuzhiyun0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
68*4882a593Smuzhiyun0x24 0x00 0x67 0x09 0x14 0x07 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
69*4882a593Smuzhiyun0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
70*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x08 0x00 0x0f
71*4882a593Smuzhiyun0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
72*4882a593Smuzhiyun0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
73*4882a593Smuzhiyun0x24 0x00 0x67 0x09 0x14 0x09 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
74*4882a593Smuzhiyun0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
75*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x0a 0x00 0x0f
76*4882a593Smuzhiyun0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
77*4882a593Smuzhiyun0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
78*4882a593Smuzhiyun0x24 0x00 0x67 0x09 0x14 0x0b 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
79*4882a593Smuzhiyun0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
80*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x0c 0x00 0x0f
81*4882a593Smuzhiyun0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
82*4882a593Smuzhiyun0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
83*4882a593Smuzhiyun0x24 0x00 0x67 0x09 0x14 0x0d 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
84*4882a593Smuzhiyun0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
85*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09>;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		marvell,caldata-txpwrlimit-5g-sub0 = /bits/ 8 <
88*4882a593Smuzhiyun0x01 0x00 0x06 0x00 0xf0 0x01 0x89 0x01
89*4882a593Smuzhiyun0x3a 0x00 0x88 0x13 0x14 0x24 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
90*4882a593Smuzhiyun0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
91*4882a593Smuzhiyun0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
92*4882a593Smuzhiyun0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
93*4882a593Smuzhiyun0x88 0x13 0x14 0x28 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
94*4882a593Smuzhiyun0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09
95*4882a593Smuzhiyun0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05
96*4882a593Smuzhiyun0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
97*4882a593Smuzhiyun0x14 0x2c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09
98*4882a593Smuzhiyun0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09
99*4882a593Smuzhiyun0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05
100*4882a593Smuzhiyun0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x30
101*4882a593Smuzhiyun0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09
102*4882a593Smuzhiyun0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05
103*4882a593Smuzhiyun0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05
104*4882a593Smuzhiyun0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x34 0x01 0x0c
105*4882a593Smuzhiyun0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09
106*4882a593Smuzhiyun0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05
107*4882a593Smuzhiyun0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05
108*4882a593Smuzhiyun0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x38 0x01 0x0c 0x02 0x0c
109*4882a593Smuzhiyun0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a
110*4882a593Smuzhiyun0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05
111*4882a593Smuzhiyun0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05
112*4882a593Smuzhiyun0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x3c 0x01 0x0c 0x02 0x0c 0x03 0x0c
113*4882a593Smuzhiyun0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a
114*4882a593Smuzhiyun0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05
115*4882a593Smuzhiyun0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05
116*4882a593Smuzhiyun0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x40 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a
117*4882a593Smuzhiyun0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a
118*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05
119*4882a593Smuzhiyun0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05>;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun		marvell,caldata-txpwrlimit-5g-sub1 = /bits/ 8 <
122*4882a593Smuzhiyun0x01 0x00 0x06 0x00 0xaa 0x02 0x89 0x01
123*4882a593Smuzhiyun0x3a 0x00 0x88 0x13 0x14 0x64 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
124*4882a593Smuzhiyun0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
125*4882a593Smuzhiyun0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
126*4882a593Smuzhiyun0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
127*4882a593Smuzhiyun0x88 0x13 0x14 0x68 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
128*4882a593Smuzhiyun0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09
129*4882a593Smuzhiyun0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05
130*4882a593Smuzhiyun0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
131*4882a593Smuzhiyun0x14 0x6c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09
132*4882a593Smuzhiyun0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09
133*4882a593Smuzhiyun0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05
134*4882a593Smuzhiyun0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x70
135*4882a593Smuzhiyun0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09
136*4882a593Smuzhiyun0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05
137*4882a593Smuzhiyun0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05
138*4882a593Smuzhiyun0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x74 0x01 0x0c
139*4882a593Smuzhiyun0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09
140*4882a593Smuzhiyun0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05
141*4882a593Smuzhiyun0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05
142*4882a593Smuzhiyun0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x78 0x01 0x0c 0x02 0x0c
143*4882a593Smuzhiyun0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a
144*4882a593Smuzhiyun0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05
145*4882a593Smuzhiyun0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05
146*4882a593Smuzhiyun0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x7c 0x01 0x0c 0x02 0x0c 0x03 0x0c
147*4882a593Smuzhiyun0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a
148*4882a593Smuzhiyun0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05
149*4882a593Smuzhiyun0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05
150*4882a593Smuzhiyun0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x80 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a
151*4882a593Smuzhiyun0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a
152*4882a593Smuzhiyun0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05
153*4882a593Smuzhiyun0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01
154*4882a593Smuzhiyun0x3a 0x00 0x88 0x13 0x14 0x84 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
155*4882a593Smuzhiyun0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
156*4882a593Smuzhiyun0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
157*4882a593Smuzhiyun0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
158*4882a593Smuzhiyun0x88 0x13 0x14 0x88 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
159*4882a593Smuzhiyun0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08
160*4882a593Smuzhiyun0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04
161*4882a593Smuzhiyun0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
162*4882a593Smuzhiyun0x14 0x8c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08
163*4882a593Smuzhiyun0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08
164*4882a593Smuzhiyun0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04
165*4882a593Smuzhiyun0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05>;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun		marvell,caldata-txpwrlimit-5g-sub2 = /bits/ 8 <
168*4882a593Smuzhiyun0x01 0x00 0x06 0x00 0x36 0x01 0x89 0x01
169*4882a593Smuzhiyun0x3a 0x00 0x88 0x13 0x14 0x95 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a
170*4882a593Smuzhiyun0x06 0x0a 0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08
171*4882a593Smuzhiyun0x0e 0x08 0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
172*4882a593Smuzhiyun0x16 0x04 0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
173*4882a593Smuzhiyun0x88 0x13 0x14 0x99 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a
174*4882a593Smuzhiyun0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08
175*4882a593Smuzhiyun0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04
176*4882a593Smuzhiyun0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
177*4882a593Smuzhiyun0x14 0x9d 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08
178*4882a593Smuzhiyun0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08
179*4882a593Smuzhiyun0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04
180*4882a593Smuzhiyun0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0xa1
181*4882a593Smuzhiyun0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08 0x08 0x08
182*4882a593Smuzhiyun0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08 0x10 0x04
183*4882a593Smuzhiyun0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04 0x18 0x05
184*4882a593Smuzhiyun0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0xa5 0x01 0x0b
185*4882a593Smuzhiyun0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08 0x08 0x08 0x09 0x08
186*4882a593Smuzhiyun0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08 0x10 0x04 0x11 0x04
187*4882a593Smuzhiyun0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04 0x18 0x05 0x19 0x05
188*4882a593Smuzhiyun0x1a 0x05 0x1b 0x05>;
189*4882a593Smuzhiyun	};
190*4882a593Smuzhiyun};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun&sdmmc {
193*4882a593Smuzhiyun	disable-wp;
194*4882a593Smuzhiyun	pinctrl-names = "default";
195*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
196*4882a593Smuzhiyun			&sdmmc_bus4>;
197*4882a593Smuzhiyun};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun&vcc_5v {
200*4882a593Smuzhiyun	enable-active-high;
201*4882a593Smuzhiyun	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
202*4882a593Smuzhiyun	pinctrl-names = "default";
203*4882a593Smuzhiyun	pinctrl-0 = <&drv_5v>;
204*4882a593Smuzhiyun};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun&vcc50_hdmi {
207*4882a593Smuzhiyun	enable-active-high;
208*4882a593Smuzhiyun	gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
209*4882a593Smuzhiyun	pinctrl-names = "default";
210*4882a593Smuzhiyun	pinctrl-0 = <&vcc50_hdmi_en>;
211*4882a593Smuzhiyun};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun&gpio0 {
214*4882a593Smuzhiyun	gpio-line-names = "PMIC_SLEEP_AP",
215*4882a593Smuzhiyun			  "DDRIO_PWROFF",
216*4882a593Smuzhiyun			  "DDRIO_RETEN",
217*4882a593Smuzhiyun			  "TS3A227E_INT_L",
218*4882a593Smuzhiyun			  "PMIC_INT_L",
219*4882a593Smuzhiyun			  "PWR_KEY_L",
220*4882a593Smuzhiyun			  "AP_LID_INT_L",
221*4882a593Smuzhiyun			  "EC_IN_RW",
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun			  "AC_PRESENT_AP",
224*4882a593Smuzhiyun			  /*
225*4882a593Smuzhiyun			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
226*4882a593Smuzhiyun			   * it REC_MODE_L.
227*4882a593Smuzhiyun			   */
228*4882a593Smuzhiyun			  "RECOVERY_SW_L",
229*4882a593Smuzhiyun			  "OTP_OUT",
230*4882a593Smuzhiyun			  "HOST1_PWR_EN",
231*4882a593Smuzhiyun			  "USBOTG_PWREN_H",
232*4882a593Smuzhiyun			  "AP_WARM_RESET_H",
233*4882a593Smuzhiyun			  "nFAULT2",
234*4882a593Smuzhiyun			  "I2C0_SDA_PMIC",
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun			  "I2C0_SCL_PMIC",
237*4882a593Smuzhiyun			  "SUSPEND_L",
238*4882a593Smuzhiyun			  "USB_INT";
239*4882a593Smuzhiyun};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun&gpio2 {
242*4882a593Smuzhiyun	gpio-line-names = "CONFIG0",
243*4882a593Smuzhiyun			  "CONFIG1",
244*4882a593Smuzhiyun			  "CONFIG2",
245*4882a593Smuzhiyun			  "",
246*4882a593Smuzhiyun			  "",
247*4882a593Smuzhiyun			  "",
248*4882a593Smuzhiyun			  "",
249*4882a593Smuzhiyun			  "CONFIG3",
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun			  "",
252*4882a593Smuzhiyun			  "EMMC_RST_L",
253*4882a593Smuzhiyun			  "",
254*4882a593Smuzhiyun			  "",
255*4882a593Smuzhiyun			  "BL_PWR_EN",
256*4882a593Smuzhiyun			  "AVDD_1V8_DISP_EN";
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&gpio3 {
260*4882a593Smuzhiyun	gpio-line-names = "FLASH0_D0",
261*4882a593Smuzhiyun			  "FLASH0_D1",
262*4882a593Smuzhiyun			  "FLASH0_D2",
263*4882a593Smuzhiyun			  "FLASH0_D3",
264*4882a593Smuzhiyun			  "FLASH0_D4",
265*4882a593Smuzhiyun			  "FLASH0_D5",
266*4882a593Smuzhiyun			  "FLASH0_D6",
267*4882a593Smuzhiyun			  "FLASH0_D7",
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun			  "",
270*4882a593Smuzhiyun			  "",
271*4882a593Smuzhiyun			  "",
272*4882a593Smuzhiyun			  "",
273*4882a593Smuzhiyun			  "",
274*4882a593Smuzhiyun			  "",
275*4882a593Smuzhiyun			  "",
276*4882a593Smuzhiyun			  "",
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun			  "FLASH0_CS2/EMMC_CMD",
279*4882a593Smuzhiyun			  "",
280*4882a593Smuzhiyun			  "FLASH0_DQS/EMMC_CLKO";
281*4882a593Smuzhiyun};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun&gpio4 {
284*4882a593Smuzhiyun	gpio-line-names = "",
285*4882a593Smuzhiyun			  "",
286*4882a593Smuzhiyun			  "",
287*4882a593Smuzhiyun			  "",
288*4882a593Smuzhiyun			  "",
289*4882a593Smuzhiyun			  "",
290*4882a593Smuzhiyun			  "",
291*4882a593Smuzhiyun			  "",
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun			  "",
294*4882a593Smuzhiyun			  "",
295*4882a593Smuzhiyun			  "",
296*4882a593Smuzhiyun			  "",
297*4882a593Smuzhiyun			  "",
298*4882a593Smuzhiyun			  "",
299*4882a593Smuzhiyun			  "",
300*4882a593Smuzhiyun			  "",
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun			  "UART0_RXD",
303*4882a593Smuzhiyun			  "UART0_TXD",
304*4882a593Smuzhiyun			  "UART0_CTS",
305*4882a593Smuzhiyun			  "UART0_RTS",
306*4882a593Smuzhiyun			  "SDIO0_D0",
307*4882a593Smuzhiyun			  "SDIO0_D1",
308*4882a593Smuzhiyun			  "SDIO0_D2",
309*4882a593Smuzhiyun			  "SDIO0_D3",
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun			  "SDIO0_CMD",
312*4882a593Smuzhiyun			  "SDIO0_CLK",
313*4882a593Smuzhiyun			  "BT_DEV_WAKE",
314*4882a593Smuzhiyun			  "",
315*4882a593Smuzhiyun			  "WIFI_ENABLE_H",
316*4882a593Smuzhiyun			  "BT_ENABLE_L",
317*4882a593Smuzhiyun			  "WIFI_HOST_WAKE",
318*4882a593Smuzhiyun			  "BT_HOST_WAKE";
319*4882a593Smuzhiyun};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun&gpio5 {
322*4882a593Smuzhiyun	gpio-line-names = "",
323*4882a593Smuzhiyun			  "",
324*4882a593Smuzhiyun			  "",
325*4882a593Smuzhiyun			  "",
326*4882a593Smuzhiyun			  "",
327*4882a593Smuzhiyun			  "",
328*4882a593Smuzhiyun			  "",
329*4882a593Smuzhiyun			  "",
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun			  "",
332*4882a593Smuzhiyun			  "",
333*4882a593Smuzhiyun			  "",
334*4882a593Smuzhiyun			  "",
335*4882a593Smuzhiyun			  "SPI0_CLK",
336*4882a593Smuzhiyun			  "SPI0_CS0",
337*4882a593Smuzhiyun			  "SPI0_TXD",
338*4882a593Smuzhiyun			  "SPI0_RXD",
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun			  "",
341*4882a593Smuzhiyun			  "",
342*4882a593Smuzhiyun			  "",
343*4882a593Smuzhiyun			  "VCC50_HDMI_EN";
344*4882a593Smuzhiyun};
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun&gpio6 {
347*4882a593Smuzhiyun	gpio-line-names = "I2S0_SCLK",
348*4882a593Smuzhiyun			  "I2S0_LRCK_RX",
349*4882a593Smuzhiyun			  "I2S0_LRCK_TX",
350*4882a593Smuzhiyun			  "I2S0_SDI",
351*4882a593Smuzhiyun			  "I2S0_SDO0",
352*4882a593Smuzhiyun			  "HP_DET_H",
353*4882a593Smuzhiyun			  "",
354*4882a593Smuzhiyun			  "INT_CODEC",
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun			  "I2S0_CLK",
357*4882a593Smuzhiyun			  "I2C2_SDA",
358*4882a593Smuzhiyun			  "I2C2_SCL",
359*4882a593Smuzhiyun			  "MICDET",
360*4882a593Smuzhiyun			  "",
361*4882a593Smuzhiyun			  "",
362*4882a593Smuzhiyun			  "",
363*4882a593Smuzhiyun			  "",
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun			  "SDMMC_D0",
366*4882a593Smuzhiyun			  "SDMMC_D1",
367*4882a593Smuzhiyun			  "SDMMC_D2",
368*4882a593Smuzhiyun			  "SDMMC_D3",
369*4882a593Smuzhiyun			  "SDMMC_CLK",
370*4882a593Smuzhiyun			  "SDMMC_CMD";
371*4882a593Smuzhiyun};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun&gpio7 {
374*4882a593Smuzhiyun	gpio-line-names = "LCDC_BL",
375*4882a593Smuzhiyun			  "PWM_LOG",
376*4882a593Smuzhiyun			  "BL_EN",
377*4882a593Smuzhiyun			  "TRACKPAD_INT",
378*4882a593Smuzhiyun			  "TPM_INT_H",
379*4882a593Smuzhiyun			  "SDMMC_DET_L",
380*4882a593Smuzhiyun			  /*
381*4882a593Smuzhiyun			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
382*4882a593Smuzhiyun			   * it FW_WP_AP.
383*4882a593Smuzhiyun			   */
384*4882a593Smuzhiyun			  "AP_FLASH_WP_L",
385*4882a593Smuzhiyun			  "EC_INT",
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun			  "CPU_NMI",
388*4882a593Smuzhiyun			  "DVSOK",
389*4882a593Smuzhiyun			  "",
390*4882a593Smuzhiyun			  "EDP_HPD",
391*4882a593Smuzhiyun			  "DVS1",
392*4882a593Smuzhiyun			  "nFAULT1",
393*4882a593Smuzhiyun			  "LCD_EN",
394*4882a593Smuzhiyun			  "DVS2",
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun			  "VCC5V_GOOD_H",
397*4882a593Smuzhiyun			  "I2C4_SDA_TP",
398*4882a593Smuzhiyun			  "I2C4_SCL_TP",
399*4882a593Smuzhiyun			  "I2C5_SDA_HDMI",
400*4882a593Smuzhiyun			  "I2C5_SCL_HDMI",
401*4882a593Smuzhiyun			  "5V_DRV",
402*4882a593Smuzhiyun			  "UART2_RXD",
403*4882a593Smuzhiyun			  "UART2_TXD";
404*4882a593Smuzhiyun};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun&gpio8 {
407*4882a593Smuzhiyun	gpio-line-names = "RAM_ID0",
408*4882a593Smuzhiyun			  "RAM_ID1",
409*4882a593Smuzhiyun			  "RAM_ID2",
410*4882a593Smuzhiyun			  "RAM_ID3",
411*4882a593Smuzhiyun			  "I2C1_SDA_TPM",
412*4882a593Smuzhiyun			  "I2C1_SCL_TPM",
413*4882a593Smuzhiyun			  "SPI2_CLK",
414*4882a593Smuzhiyun			  "SPI2_CS0",
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun			  "SPI2_RXD",
417*4882a593Smuzhiyun			  "SPI2_TXD";
418*4882a593Smuzhiyun};
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun&pinctrl {
421*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
422*4882a593Smuzhiyun	pinctrl-0 = <
423*4882a593Smuzhiyun		/* Common for sleep and wake, but no owners */
424*4882a593Smuzhiyun		&ddr0_retention
425*4882a593Smuzhiyun		&ddrio_pwroff
426*4882a593Smuzhiyun		&global_pwroff
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun		/* Wake only */
429*4882a593Smuzhiyun		&suspend_l_wake
430*4882a593Smuzhiyun		&bt_dev_wake_awake
431*4882a593Smuzhiyun	>;
432*4882a593Smuzhiyun	pinctrl-1 = <
433*4882a593Smuzhiyun		/* Common for sleep and wake, but no owners */
434*4882a593Smuzhiyun		&ddr0_retention
435*4882a593Smuzhiyun		&ddrio_pwroff
436*4882a593Smuzhiyun		&global_pwroff
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun		/* Sleep only */
439*4882a593Smuzhiyun		&suspend_l_sleep
440*4882a593Smuzhiyun		&bt_dev_wake_sleep
441*4882a593Smuzhiyun	>;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun	buck-5v {
444*4882a593Smuzhiyun		drv_5v: drv-5v {
445*4882a593Smuzhiyun			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
446*4882a593Smuzhiyun		};
447*4882a593Smuzhiyun	};
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun	hdmi {
450*4882a593Smuzhiyun		vcc50_hdmi_en: vcc50-hdmi-en {
451*4882a593Smuzhiyun			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
452*4882a593Smuzhiyun		};
453*4882a593Smuzhiyun	};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun	pmic {
456*4882a593Smuzhiyun		dvs_1: dvs-1 {
457*4882a593Smuzhiyun			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
458*4882a593Smuzhiyun		};
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun		dvs_2: dvs-2 {
461*4882a593Smuzhiyun			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
462*4882a593Smuzhiyun		};
463*4882a593Smuzhiyun	};
464*4882a593Smuzhiyun};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun&i2c4 {
467*4882a593Smuzhiyun	status = "okay";
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun	/*
470*4882a593Smuzhiyun	 * Trackpad pin control is shared between Elan and Synaptics devices
471*4882a593Smuzhiyun	 * so we have to pull it up to the bus level.
472*4882a593Smuzhiyun	 */
473*4882a593Smuzhiyun	pinctrl-names = "default";
474*4882a593Smuzhiyun	pinctrl-0 = <&i2c4_xfer &trackpad_int>;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun	trackpad@15 {
477*4882a593Smuzhiyun		/*
478*4882a593Smuzhiyun		 * Remove the inherited pinctrl settings to avoid clashing
479*4882a593Smuzhiyun		 * with bus-wide ones.
480*4882a593Smuzhiyun		 */
481*4882a593Smuzhiyun		/delete-property/pinctrl-names;
482*4882a593Smuzhiyun		/delete-property/pinctrl-0;
483*4882a593Smuzhiyun	};
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun	trackpad@2c {
486*4882a593Smuzhiyun		compatible = "hid-over-i2c";
487*4882a593Smuzhiyun		interrupt-parent = <&gpio7>;
488*4882a593Smuzhiyun		interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
489*4882a593Smuzhiyun		reg = <0x2c>;
490*4882a593Smuzhiyun		hid-descr-addr = <0x0020>;
491*4882a593Smuzhiyun		vcc-supply = <&vcc33_io>;
492*4882a593Smuzhiyun		wakeup-source;
493*4882a593Smuzhiyun	};
494*4882a593Smuzhiyun};
495