1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "rk3288.dtsi" 7*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 8*4882a593Smuzhiyun#include <dt-bindings/clock/rockchip,rk808.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun chosen { 12*4882a593Smuzhiyun stdout-path = "serial2:115200n8"; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun memory { 16*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x80000000>; 17*4882a593Smuzhiyun device_type = "memory"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun ext_gmac: external-gmac-clock { 21*4882a593Smuzhiyun compatible = "fixed-clock"; 22*4882a593Smuzhiyun #clock-cells = <0>; 23*4882a593Smuzhiyun clock-frequency = <125000000>; 24*4882a593Smuzhiyun clock-output-names = "ext_gmac"; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun gpio-keys { 28*4882a593Smuzhiyun compatible = "gpio-keys"; 29*4882a593Smuzhiyun #address-cells = <1>; 30*4882a593Smuzhiyun #size-cells = <0>; 31*4882a593Smuzhiyun autorepeat; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun pinctrl-names = "default"; 34*4882a593Smuzhiyun pinctrl-0 = <&pwrbtn>; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun button@0 { 37*4882a593Smuzhiyun gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 38*4882a593Smuzhiyun linux,code = <KEY_POWER>; 39*4882a593Smuzhiyun label = "GPIO Key Power"; 40*4882a593Smuzhiyun linux,input-type = <1>; 41*4882a593Smuzhiyun wakeup-source; 42*4882a593Smuzhiyun debounce-interval = <100>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun gpio-leds { 47*4882a593Smuzhiyun compatible = "gpio-leds"; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun act_led: led-0 { 50*4882a593Smuzhiyun gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 51*4882a593Smuzhiyun linux,default-trigger = "mmc0"; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun heartbeat_led: led-1 { 55*4882a593Smuzhiyun gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; 56*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun pwr_led: led-2 { 60*4882a593Smuzhiyun gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun linux,default-trigger = "default-on"; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 66*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 67*4882a593Smuzhiyun clocks = <&rk808 RK808_CLKOUT1>; 68*4882a593Smuzhiyun clock-names = "ext_clock"; 69*4882a593Smuzhiyun pinctrl-names = "default"; 70*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable>; 71*4882a593Smuzhiyun reset-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>, 72*4882a593Smuzhiyun <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun sound { 76*4882a593Smuzhiyun compatible = "simple-audio-card"; 77*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 78*4882a593Smuzhiyun simple-audio-card,name = "rockchip,tinker-codec"; 79*4882a593Smuzhiyun simple-audio-card,mclk-fs = <512>; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun simple-audio-card,codec { 82*4882a593Smuzhiyun sound-dai = <&hdmi>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun simple-audio-card,cpu { 86*4882a593Smuzhiyun sound-dai = <&i2s>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun vcc_sys: vsys-regulator { 91*4882a593Smuzhiyun compatible = "regulator-fixed"; 92*4882a593Smuzhiyun regulator-name = "vcc_sys"; 93*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 94*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 95*4882a593Smuzhiyun regulator-always-on; 96*4882a593Smuzhiyun regulator-boot-on; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun vcc_sd: sdmmc-regulator { 100*4882a593Smuzhiyun compatible = "regulator-fixed"; 101*4882a593Smuzhiyun gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; 102*4882a593Smuzhiyun pinctrl-names = "default"; 103*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_pwr>; 104*4882a593Smuzhiyun regulator-name = "vcc_sd"; 105*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 106*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 107*4882a593Smuzhiyun startup-delay-us = <100000>; 108*4882a593Smuzhiyun vin-supply = <&vcc_io>; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun&cpu0 { 113*4882a593Smuzhiyun cpu0-supply = <&vdd_cpu>; 114*4882a593Smuzhiyun}; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun&cpu_opp_table { 117*4882a593Smuzhiyun opp-1704000000 { 118*4882a593Smuzhiyun opp-hz = /bits/ 64 <1704000000>; 119*4882a593Smuzhiyun opp-microvolt = <1350000>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun opp-1800000000 { 122*4882a593Smuzhiyun opp-hz = /bits/ 64 <1800000000>; 123*4882a593Smuzhiyun opp-microvolt = <1400000>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&gmac { 128*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC>; 129*4882a593Smuzhiyun assigned-clock-parents = <&ext_gmac>; 130*4882a593Smuzhiyun clock_in_out = "input"; 131*4882a593Smuzhiyun phy-mode = "rgmii"; 132*4882a593Smuzhiyun phy-supply = <&vcc33_lan>; 133*4882a593Smuzhiyun pinctrl-names = "default"; 134*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>; 135*4882a593Smuzhiyun snps,reset-gpio = <&gpio4 7 0>; 136*4882a593Smuzhiyun snps,reset-active-low; 137*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 1000000>; 138*4882a593Smuzhiyun tx_delay = <0x30>; 139*4882a593Smuzhiyun rx_delay = <0x10>; 140*4882a593Smuzhiyun status = "okay"; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&gpu { 144*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 145*4882a593Smuzhiyun status = "okay"; 146*4882a593Smuzhiyun}; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun&hdmi { 149*4882a593Smuzhiyun ddc-i2c-bus = <&i2c5>; 150*4882a593Smuzhiyun status = "okay"; 151*4882a593Smuzhiyun}; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun&i2c0 { 154*4882a593Smuzhiyun clock-frequency = <400000>; 155*4882a593Smuzhiyun status = "okay"; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun rk808: pmic@1b { 158*4882a593Smuzhiyun compatible = "rockchip,rk808"; 159*4882a593Smuzhiyun reg = <0x1b>; 160*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 161*4882a593Smuzhiyun interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 162*4882a593Smuzhiyun #clock-cells = <1>; 163*4882a593Smuzhiyun clock-output-names = "xin32k", "rk808-clkout2"; 164*4882a593Smuzhiyun dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, 165*4882a593Smuzhiyun <&gpio0 12 GPIO_ACTIVE_HIGH>; 166*4882a593Smuzhiyun pinctrl-names = "default"; 167*4882a593Smuzhiyun pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>; 168*4882a593Smuzhiyun rockchip,system-power-controller; 169*4882a593Smuzhiyun wakeup-source; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 172*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 173*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 174*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 175*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 176*4882a593Smuzhiyun vcc7-supply = <&vcc_sys>; 177*4882a593Smuzhiyun vcc8-supply = <&vcc_io>; 178*4882a593Smuzhiyun vcc9-supply = <&vcc_io>; 179*4882a593Smuzhiyun vcc10-supply = <&vcc_io>; 180*4882a593Smuzhiyun vcc11-supply = <&vcc_sys>; 181*4882a593Smuzhiyun vcc12-supply = <&vcc_io>; 182*4882a593Smuzhiyun vddio-supply = <&vcc_io>; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun regulators { 185*4882a593Smuzhiyun vdd_cpu: DCDC_REG1 { 186*4882a593Smuzhiyun regulator-always-on; 187*4882a593Smuzhiyun regulator-boot-on; 188*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 189*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 190*4882a593Smuzhiyun regulator-name = "vdd_arm"; 191*4882a593Smuzhiyun regulator-ramp-delay = <6000>; 192*4882a593Smuzhiyun regulator-state-mem { 193*4882a593Smuzhiyun regulator-off-in-suspend; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun vdd_gpu: DCDC_REG2 { 198*4882a593Smuzhiyun regulator-always-on; 199*4882a593Smuzhiyun regulator-boot-on; 200*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 201*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 202*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 203*4882a593Smuzhiyun regulator-ramp-delay = <6000>; 204*4882a593Smuzhiyun regulator-state-mem { 205*4882a593Smuzhiyun regulator-on-in-suspend; 206*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 211*4882a593Smuzhiyun regulator-always-on; 212*4882a593Smuzhiyun regulator-boot-on; 213*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 214*4882a593Smuzhiyun regulator-state-mem { 215*4882a593Smuzhiyun regulator-on-in-suspend; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 220*4882a593Smuzhiyun regulator-always-on; 221*4882a593Smuzhiyun regulator-boot-on; 222*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 223*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 224*4882a593Smuzhiyun regulator-name = "vcc_io"; 225*4882a593Smuzhiyun regulator-state-mem { 226*4882a593Smuzhiyun regulator-on-in-suspend; 227*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun vcc18_ldo1: LDO_REG1 { 232*4882a593Smuzhiyun regulator-always-on; 233*4882a593Smuzhiyun regulator-boot-on; 234*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 235*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 236*4882a593Smuzhiyun regulator-name = "vcc18_ldo1"; 237*4882a593Smuzhiyun regulator-state-mem { 238*4882a593Smuzhiyun regulator-on-in-suspend; 239*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun vcc33_mipi: LDO_REG2 { 244*4882a593Smuzhiyun regulator-always-on; 245*4882a593Smuzhiyun regulator-boot-on; 246*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 247*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 248*4882a593Smuzhiyun regulator-name = "vcc33_mipi"; 249*4882a593Smuzhiyun regulator-state-mem { 250*4882a593Smuzhiyun regulator-off-in-suspend; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun vdd_10: LDO_REG3 { 255*4882a593Smuzhiyun regulator-always-on; 256*4882a593Smuzhiyun regulator-boot-on; 257*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 258*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 259*4882a593Smuzhiyun regulator-name = "vdd_10"; 260*4882a593Smuzhiyun regulator-state-mem { 261*4882a593Smuzhiyun regulator-on-in-suspend; 262*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun }; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun vcc18_codec: LDO_REG4 { 267*4882a593Smuzhiyun regulator-always-on; 268*4882a593Smuzhiyun regulator-boot-on; 269*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 270*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 271*4882a593Smuzhiyun regulator-name = "vcc18_codec"; 272*4882a593Smuzhiyun regulator-state-mem { 273*4882a593Smuzhiyun regulator-on-in-suspend; 274*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun vccio_sd: LDO_REG5 { 279*4882a593Smuzhiyun regulator-always-on; 280*4882a593Smuzhiyun regulator-boot-on; 281*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 282*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 283*4882a593Smuzhiyun regulator-name = "vccio_sd"; 284*4882a593Smuzhiyun regulator-state-mem { 285*4882a593Smuzhiyun regulator-on-in-suspend; 286*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun vdd10_lcd: LDO_REG6 { 291*4882a593Smuzhiyun regulator-always-on; 292*4882a593Smuzhiyun regulator-boot-on; 293*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 294*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 295*4882a593Smuzhiyun regulator-name = "vdd10_lcd"; 296*4882a593Smuzhiyun regulator-state-mem { 297*4882a593Smuzhiyun regulator-on-in-suspend; 298*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun vcc_18: LDO_REG7 { 303*4882a593Smuzhiyun regulator-always-on; 304*4882a593Smuzhiyun regulator-boot-on; 305*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 306*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 307*4882a593Smuzhiyun regulator-name = "vcc_18"; 308*4882a593Smuzhiyun regulator-state-mem { 309*4882a593Smuzhiyun regulator-on-in-suspend; 310*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun vcc18_lcd: LDO_REG8 { 315*4882a593Smuzhiyun regulator-always-on; 316*4882a593Smuzhiyun regulator-boot-on; 317*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 318*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 319*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 320*4882a593Smuzhiyun regulator-state-mem { 321*4882a593Smuzhiyun regulator-on-in-suspend; 322*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun vcc33_sd: SWITCH_REG1 { 327*4882a593Smuzhiyun regulator-always-on; 328*4882a593Smuzhiyun regulator-boot-on; 329*4882a593Smuzhiyun regulator-name = "vcc33_sd"; 330*4882a593Smuzhiyun regulator-state-mem { 331*4882a593Smuzhiyun regulator-on-in-suspend; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun vcc33_lan: SWITCH_REG2 { 336*4882a593Smuzhiyun regulator-always-on; 337*4882a593Smuzhiyun regulator-boot-on; 338*4882a593Smuzhiyun regulator-name = "vcc33_lan"; 339*4882a593Smuzhiyun regulator-state-mem { 340*4882a593Smuzhiyun regulator-on-in-suspend; 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun }; 344*4882a593Smuzhiyun }; 345*4882a593Smuzhiyun}; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun&i2c2 { 348*4882a593Smuzhiyun status = "okay"; 349*4882a593Smuzhiyun}; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun&i2c5 { 352*4882a593Smuzhiyun status = "okay"; 353*4882a593Smuzhiyun}; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun&i2s { 356*4882a593Smuzhiyun #sound-dai-cells = <0>; 357*4882a593Smuzhiyun status = "okay"; 358*4882a593Smuzhiyun}; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun&io_domains { 361*4882a593Smuzhiyun status = "okay"; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun sdcard-supply = <&vccio_sd>; 364*4882a593Smuzhiyun wifi-supply = <&vcc_18>; 365*4882a593Smuzhiyun}; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun&pinctrl { 368*4882a593Smuzhiyun pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { 369*4882a593Smuzhiyun drive-strength = <8>; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { 373*4882a593Smuzhiyun bias-pull-up; 374*4882a593Smuzhiyun drive-strength = <8>; 375*4882a593Smuzhiyun }; 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun backlight { 378*4882a593Smuzhiyun bl_en: bl-en { 379*4882a593Smuzhiyun rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 380*4882a593Smuzhiyun }; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun buttons { 384*4882a593Smuzhiyun pwrbtn: pwrbtn { 385*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 386*4882a593Smuzhiyun }; 387*4882a593Smuzhiyun }; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun eth_phy { 390*4882a593Smuzhiyun eth_phy_pwr: eth-phy-pwr { 391*4882a593Smuzhiyun rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun pmic { 396*4882a593Smuzhiyun pmic_int: pmic-int { 397*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun dvs_1: dvs-1 { 401*4882a593Smuzhiyun rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>; 402*4882a593Smuzhiyun }; 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun dvs_2: dvs-2 { 405*4882a593Smuzhiyun rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; 406*4882a593Smuzhiyun }; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun 409*4882a593Smuzhiyun sdmmc { 410*4882a593Smuzhiyun sdmmc_bus4: sdmmc-bus4 { 411*4882a593Smuzhiyun rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>, 412*4882a593Smuzhiyun <6 RK_PC1 1 &pcfg_pull_up_drv_8ma>, 413*4882a593Smuzhiyun <6 RK_PC2 1 &pcfg_pull_up_drv_8ma>, 414*4882a593Smuzhiyun <6 RK_PC3 1 &pcfg_pull_up_drv_8ma>; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun sdmmc_clk: sdmmc-clk { 418*4882a593Smuzhiyun rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>; 419*4882a593Smuzhiyun }; 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun sdmmc_cmd: sdmmc-cmd { 422*4882a593Smuzhiyun rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun sdmmc_pwr: sdmmc-pwr { 426*4882a593Smuzhiyun rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun }; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun usb { 431*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 432*4882a593Smuzhiyun rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun pwr_3g: pwr-3g { 436*4882a593Smuzhiyun rockchip,pins = <7 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 437*4882a593Smuzhiyun }; 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun sdio { 441*4882a593Smuzhiyun wifi_enable: wifi-enable { 442*4882a593Smuzhiyun rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, 443*4882a593Smuzhiyun <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun}; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun&pwm0 { 449*4882a593Smuzhiyun status = "okay"; 450*4882a593Smuzhiyun}; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun&saradc { 453*4882a593Smuzhiyun vref-supply = <&vcc18_ldo1>; 454*4882a593Smuzhiyun status = "okay"; 455*4882a593Smuzhiyun}; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun&sdmmc { 458*4882a593Smuzhiyun bus-width = <4>; 459*4882a593Smuzhiyun cap-mmc-highspeed; 460*4882a593Smuzhiyun cap-sd-highspeed; 461*4882a593Smuzhiyun broken-cd; 462*4882a593Smuzhiyun disable-wp; /* wp not hooked up */ 463*4882a593Smuzhiyun pinctrl-names = "default"; 464*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 465*4882a593Smuzhiyun status = "okay"; 466*4882a593Smuzhiyun vmmc-supply = <&vcc33_sd>; 467*4882a593Smuzhiyun vqmmc-supply = <&vccio_sd>; 468*4882a593Smuzhiyun}; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun&sdio0 { 471*4882a593Smuzhiyun bus-width = <4>; 472*4882a593Smuzhiyun cap-sd-highspeed; 473*4882a593Smuzhiyun cap-sdio-irq; 474*4882a593Smuzhiyun keep-power-in-suspend; 475*4882a593Smuzhiyun max-frequency = <50000000>; 476*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 477*4882a593Smuzhiyun non-removable; 478*4882a593Smuzhiyun pinctrl-names = "default"; 479*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>; 480*4882a593Smuzhiyun sd-uhs-sdr12; 481*4882a593Smuzhiyun sd-uhs-sdr25; 482*4882a593Smuzhiyun sd-uhs-sdr50; 483*4882a593Smuzhiyun vmmc-supply = <&vcc_io>; 484*4882a593Smuzhiyun vqmmc-supply = <&vcc_18>; 485*4882a593Smuzhiyun status = "okay"; 486*4882a593Smuzhiyun}; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun&tsadc { 489*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 490*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 491*4882a593Smuzhiyun status = "okay"; 492*4882a593Smuzhiyun}; 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun&uart0 { 495*4882a593Smuzhiyun status = "okay"; 496*4882a593Smuzhiyun}; 497*4882a593Smuzhiyun 498*4882a593Smuzhiyun&uart1 { 499*4882a593Smuzhiyun status = "okay"; 500*4882a593Smuzhiyun}; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun&uart2 { 503*4882a593Smuzhiyun status = "okay"; 504*4882a593Smuzhiyun}; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun&uart3 { 507*4882a593Smuzhiyun status = "okay"; 508*4882a593Smuzhiyun}; 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun&uart4 { 511*4882a593Smuzhiyun status = "okay"; 512*4882a593Smuzhiyun}; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun&usbphy { 515*4882a593Smuzhiyun status = "okay"; 516*4882a593Smuzhiyun}; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun&usb_host0_ehci { 519*4882a593Smuzhiyun status = "okay"; 520*4882a593Smuzhiyun}; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun&usb_host1 { 523*4882a593Smuzhiyun status = "okay"; 524*4882a593Smuzhiyun}; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun&usb_otg { 527*4882a593Smuzhiyun status = "okay"; 528*4882a593Smuzhiyun}; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun&vopb { 531*4882a593Smuzhiyun status = "okay"; 532*4882a593Smuzhiyun}; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun&vopb_mmu { 535*4882a593Smuzhiyun status = "okay"; 536*4882a593Smuzhiyun}; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun&vopl { 539*4882a593Smuzhiyun status = "okay"; 540*4882a593Smuzhiyun}; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun&vopl_mmu { 543*4882a593Smuzhiyun status = "okay"; 544*4882a593Smuzhiyun}; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun&wdt { 547*4882a593Smuzhiyun status = "okay"; 548*4882a593Smuzhiyun}; 549