xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3288-th804.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0+ OR MIT).
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "rk3288.dtsi"
9*4882a593Smuzhiyun#include "rk3288-android.dtsi"
10*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	backlight: backlight {
14*4882a593Smuzhiyun		compatible = "pwm-backlight";
15*4882a593Smuzhiyun		brightness-levels = <
16*4882a593Smuzhiyun			255 195 194 194 193 193 192 192
17*4882a593Smuzhiyun			191 191 190 190 189 189 188 188
18*4882a593Smuzhiyun			187 187 186 186 185 185 184 184
19*4882a593Smuzhiyun			183 183 182 182 181 181 180 180
20*4882a593Smuzhiyun			179 179 178 178 177 177 176 176
21*4882a593Smuzhiyun			175 175 174 174 173 173 172 172
22*4882a593Smuzhiyun			171 171 170 170 169 169 169 168
23*4882a593Smuzhiyun			168 167 167 166 166 165 165 164
24*4882a593Smuzhiyun			164 163 163 162 162 161 161 160
25*4882a593Smuzhiyun			159 159 158 158 157 157 156 156
26*4882a593Smuzhiyun			155 155 154 154 153 153 152 151
27*4882a593Smuzhiyun			151 150 150 149 149 148 148 147
28*4882a593Smuzhiyun			147 146 146 145 145 144 144 143
29*4882a593Smuzhiyun			143 142 142 141 141 140 140 139
30*4882a593Smuzhiyun			139 138 138 137 137 136 136 135
31*4882a593Smuzhiyun			135 134 133 132 131 130 129 128
32*4882a593Smuzhiyun			127 126 125 124 123 122 121 120
33*4882a593Smuzhiyun			119 118 117 116 115 114 113 112
34*4882a593Smuzhiyun			111 110 109 108 107 106 105 104
35*4882a593Smuzhiyun			103 103 103 102 102 101 101 100
36*4882a593Smuzhiyun			100  99  99  98  98  97  97  96
37*4882a593Smuzhiyun			96  95  95  94  94  93  93  92
38*4882a593Smuzhiyun			92  91  91  90  90  89  88  88
39*4882a593Smuzhiyun			87  87  86  86  86  85  85  85
40*4882a593Smuzhiyun			84  84  83  83  83  82  82  82
41*4882a593Smuzhiyun			81  81  81  80  80  80  79  79
42*4882a593Smuzhiyun			79  78  78  78  77  77  77  76
43*4882a593Smuzhiyun			76  76  75  75  74  73  72  71
44*4882a593Smuzhiyun			70  69  68  67  66  65  64  63
45*4882a593Smuzhiyun			62  61  60  59  58  57  56  55
46*4882a593Smuzhiyun			54  53  52  51  50  49  48  48
47*4882a593Smuzhiyun			47  47  46  46  45  45  44  44>;
48*4882a593Smuzhiyun		default-brightness-level = <180>;
49*4882a593Smuzhiyun		enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
50*4882a593Smuzhiyun		pinctrl-names = "default";
51*4882a593Smuzhiyun		pinctrl-0 = <&bl_en>;
52*4882a593Smuzhiyun		pwms = <&pwm0 0 1000000 0>;
53*4882a593Smuzhiyun	};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	vcc_sys: vsys-regulator {
56*4882a593Smuzhiyun		compatible = "regulator-fixed";
57*4882a593Smuzhiyun		regulator-name = "vcc_sys";
58*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
59*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
60*4882a593Smuzhiyun		regulator-always-on;
61*4882a593Smuzhiyun		regulator-boot-on;
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	vcc_lcd: vcc-lcd {
65*4882a593Smuzhiyun		compatible = "regulator-fixed";
66*4882a593Smuzhiyun		enable-active-high;
67*4882a593Smuzhiyun		regulator-boot-on;
68*4882a593Smuzhiyun		gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>;
69*4882a593Smuzhiyun		pinctrl-names = "default";
70*4882a593Smuzhiyun		pinctrl-0 = <&lcd_en>;
71*4882a593Smuzhiyun		regulator-name = "vcc_lcd";
72*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	xin32k: xin32k {
76*4882a593Smuzhiyun		compatible = "fixed-clock";
77*4882a593Smuzhiyun		clock-frequency = <32768>;
78*4882a593Smuzhiyun		clock-output-names = "xin32k";
79*4882a593Smuzhiyun		#clock-cells = <0>;
80*4882a593Smuzhiyun	};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
83*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
84*4882a593Smuzhiyun		clocks = <&rk818 1>;
85*4882a593Smuzhiyun		clock-names = "ext_clock";
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		/*
88*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
89*4882a593Smuzhiyun		 * on the actual card populated):
90*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
91*4882a593Smuzhiyun		 * - PDN (power down when low)
92*4882a593Smuzhiyun		 */
93*4882a593Smuzhiyun		reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	wireless-wlan {
97*4882a593Smuzhiyun		compatible = "wlan-platdata";
98*4882a593Smuzhiyun		wifi_chip_type = "rtl8723bs";
99*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
100*4882a593Smuzhiyun		status = "okay";
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun	wireless-bluetooth {
104*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
105*4882a593Smuzhiyun		clocks = <&rk818 1>;
106*4882a593Smuzhiyun		clock-names = "ext_clock";
107*4882a593Smuzhiyun		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
108*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
109*4882a593Smuzhiyun		pinctrl-0 = <&uart0_rts>;
110*4882a593Smuzhiyun		pinctrl-1 = <&uart0_gpios>;
111*4882a593Smuzhiyun		BT,reset_gpio    = <&gpio4 29 GPIO_ACTIVE_HIGH>;
112*4882a593Smuzhiyun		BT,wake_gpio     = <&gpio4 26 GPIO_ACTIVE_HIGH>;
113*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
114*4882a593Smuzhiyun		status = "okay";
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	rk-vibrator {
118*4882a593Smuzhiyun		status = "okay";
119*4882a593Smuzhiyun		compatible = "rk-vibrator-gpio";
120*4882a593Smuzhiyun		vibrator-gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun	rk_headset {
124*4882a593Smuzhiyun		compatible = "rockchip_headset";
125*4882a593Smuzhiyun		headset_gpio = <&gpio7 7 GPIO_ACTIVE_HIGH>;
126*4882a593Smuzhiyun		io-channels = <&saradc 2>;
127*4882a593Smuzhiyun	};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun	adc-keys {
130*4882a593Smuzhiyun		compatible = "adc-keys";
131*4882a593Smuzhiyun		io-channels = <&saradc 1>;
132*4882a593Smuzhiyun		io-channel-names = "buttons";
133*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
134*4882a593Smuzhiyun		poll-interval = <100>;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun		vol-up-key {
137*4882a593Smuzhiyun			label = "volume up";
138*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
139*4882a593Smuzhiyun			press-threshold-microvolt = <1000>;
140*4882a593Smuzhiyun		};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun		vol-down-key {
143*4882a593Smuzhiyun			label = "volume down";
144*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
145*4882a593Smuzhiyun			press-threshold-microvolt = <170000>;
146*4882a593Smuzhiyun		};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun	gpio-keys {
151*4882a593Smuzhiyun		compatible = "gpio-keys";
152*4882a593Smuzhiyun		autorepeat;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun		pinctrl-names = "default";
155*4882a593Smuzhiyun		pinctrl-0 = <&pwrbtn>;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun		power {
158*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
159*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
160*4882a593Smuzhiyun			label = "GPIO Key Power";
161*4882a593Smuzhiyun			linux,input-type = <1>;
162*4882a593Smuzhiyun			wakeup-source;
163*4882a593Smuzhiyun			debounce-interval = <100>;
164*4882a593Smuzhiyun		};
165*4882a593Smuzhiyun	};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun	uboot-charge {
168*4882a593Smuzhiyun		compatible = "rockchip,uboot-charge";
169*4882a593Smuzhiyun		rockchip,uboot-charge-on = <0>;
170*4882a593Smuzhiyun		rockchip,android-charge-on = <1>;
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun&sdio0 {
175*4882a593Smuzhiyun	status = "okay";
176*4882a593Smuzhiyun	max-frequency = <150000000>;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun	bus-width = <4>;
179*4882a593Smuzhiyun	cap-sd-highspeed;
180*4882a593Smuzhiyun	cap-sdio-irq;
181*4882a593Smuzhiyun	disable-wp;
182*4882a593Smuzhiyun	keep-power-in-suspend;
183*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
184*4882a593Smuzhiyun	non-removable;
185*4882a593Smuzhiyun	num-slots = <1>;
186*4882a593Smuzhiyun	pinctrl-names = "default";
187*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>;
188*4882a593Smuzhiyun	sd-uhs-sdr104;
189*4882a593Smuzhiyun	no-sd;
190*4882a593Smuzhiyun	no-mmc;
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&i2c0 {
194*4882a593Smuzhiyun	status = "okay";
195*4882a593Smuzhiyun	clock-frequency = <400000>;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun	vdd_cpu: syr827@40 {
198*4882a593Smuzhiyun		compatible = "silergy,syr827";
199*4882a593Smuzhiyun		reg = <0x40>;
200*4882a593Smuzhiyun		status = "okay";
201*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
202*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
203*4882a593Smuzhiyun		pinctrl-0 = <&vsel1_gpio>;
204*4882a593Smuzhiyun		vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
205*4882a593Smuzhiyun		regulator-name = "vdd_cpu";
206*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
207*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
208*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
209*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
210*4882a593Smuzhiyun		regulator-always-on;
211*4882a593Smuzhiyun		regulator-boot-on;
212*4882a593Smuzhiyun		regulator-initial-state = <3>;
213*4882a593Smuzhiyun		regulator-state-mem {
214*4882a593Smuzhiyun			regulator-off-in-suspend;
215*4882a593Smuzhiyun		};
216*4882a593Smuzhiyun	};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun	rk818: pmic@1c {
219*4882a593Smuzhiyun		compatible = "rockchip,rk818";
220*4882a593Smuzhiyun		reg = <0x1c>;
221*4882a593Smuzhiyun		status = "okay";
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun		clock-output-names = "rk818-clkout1", "wifibt_32kin";
224*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
225*4882a593Smuzhiyun		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
226*4882a593Smuzhiyun		pinctrl-names = "default";
227*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
228*4882a593Smuzhiyun		rockchip,system-power-controller;
229*4882a593Smuzhiyun		wakeup-source;
230*4882a593Smuzhiyun		#clock-cells = <1>;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
233*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
234*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
235*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
236*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
237*4882a593Smuzhiyun		vcc7-supply = <&vcc_io>;
238*4882a593Smuzhiyun		vcc8-supply = <&vcc_io>;
239*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
240*4882a593Smuzhiyun		vddio-supply = <&vccio_pmu>;
241*4882a593Smuzhiyun		boost-supply = <&vcc_sys>;
242*4882a593Smuzhiyun		h_5v-supply = <&boost>;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun		regulators {
245*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
246*4882a593Smuzhiyun				regulator-name = "vdd_logic";
247*4882a593Smuzhiyun				regulator-always-on;
248*4882a593Smuzhiyun				regulator-boot-on;
249*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
250*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
251*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
252*4882a593Smuzhiyun				regulator-state-mem {
253*4882a593Smuzhiyun					regulator-on-in-suspend;
254*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
255*4882a593Smuzhiyun				};
256*4882a593Smuzhiyun			};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
259*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
260*4882a593Smuzhiyun				regulator-always-on;
261*4882a593Smuzhiyun				regulator-boot-on;
262*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
263*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
264*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
265*4882a593Smuzhiyun				regulator-state-mem {
266*4882a593Smuzhiyun					regulator-off-in-suspend;
267*4882a593Smuzhiyun				};
268*4882a593Smuzhiyun			};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
271*4882a593Smuzhiyun				regulator-always-on;
272*4882a593Smuzhiyun				regulator-boot-on;
273*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
274*4882a593Smuzhiyun				regulator-state-mem {
275*4882a593Smuzhiyun					regulator-on-in-suspend;
276*4882a593Smuzhiyun				};
277*4882a593Smuzhiyun			};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
280*4882a593Smuzhiyun				regulator-always-on;
281*4882a593Smuzhiyun				regulator-boot-on;
282*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
283*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
284*4882a593Smuzhiyun				regulator-name = "vcc_io";
285*4882a593Smuzhiyun				regulator-state-mem {
286*4882a593Smuzhiyun					regulator-on-in-suspend;
287*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
288*4882a593Smuzhiyun				};
289*4882a593Smuzhiyun			};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun			boost: DCDC_BOOST {
292*4882a593Smuzhiyun				regulator-always-on;
293*4882a593Smuzhiyun				regulator-boot-on;
294*4882a593Smuzhiyun				regulator-min-microvolt = <5000000>;
295*4882a593Smuzhiyun				regulator-max-microvolt = <5000000>;
296*4882a593Smuzhiyun				regulator-name = "boost";
297*4882a593Smuzhiyun				regulator-state-mem {
298*4882a593Smuzhiyun					regulator-on-in-suspend;
299*4882a593Smuzhiyun				};
300*4882a593Smuzhiyun			};
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun			vcca_codec: LDO_REG1 {
303*4882a593Smuzhiyun				regulator-always-on;
304*4882a593Smuzhiyun				regulator-boot-on;
305*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
306*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
307*4882a593Smuzhiyun				regulator-name = "vcca_codec";
308*4882a593Smuzhiyun				regulator-state-mem {
309*4882a593Smuzhiyun					regulator-off-in-suspend;
310*4882a593Smuzhiyun				};
311*4882a593Smuzhiyun			};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun			vcc_tp: LDO_REG2 {
314*4882a593Smuzhiyun				regulator-always-on;
315*4882a593Smuzhiyun				regulator-boot-on;
316*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
317*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
318*4882a593Smuzhiyun				regulator-name = "vcc_tp";
319*4882a593Smuzhiyun				regulator-state-mem {
320*4882a593Smuzhiyun					regulator-on-in-suspend;
321*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
322*4882a593Smuzhiyun				};
323*4882a593Smuzhiyun			};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
326*4882a593Smuzhiyun				regulator-always-on;
327*4882a593Smuzhiyun				regulator-boot-on;
328*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
329*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
330*4882a593Smuzhiyun				regulator-name = "vdd_10";
331*4882a593Smuzhiyun				regulator-state-mem {
332*4882a593Smuzhiyun					regulator-on-in-suspend;
333*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
334*4882a593Smuzhiyun				};
335*4882a593Smuzhiyun			};
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun			vcc18_lcd: LDO_REG4 {
338*4882a593Smuzhiyun				regulator-always-on;
339*4882a593Smuzhiyun				regulator-boot-on;
340*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
341*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
342*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
343*4882a593Smuzhiyun				regulator-state-mem {
344*4882a593Smuzhiyun					regulator-off-in-suspend;
345*4882a593Smuzhiyun				};
346*4882a593Smuzhiyun			};
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun			vccio_pmu: LDO_REG5 {
349*4882a593Smuzhiyun				regulator-always-on;
350*4882a593Smuzhiyun				regulator-boot-on;
351*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
352*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
353*4882a593Smuzhiyun				regulator-name = "vccio_pmu";
354*4882a593Smuzhiyun				regulator-state-mem {
355*4882a593Smuzhiyun					regulator-off-in-suspend;
356*4882a593Smuzhiyun				};
357*4882a593Smuzhiyun			};
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
360*4882a593Smuzhiyun				regulator-always-on;
361*4882a593Smuzhiyun				regulator-boot-on;
362*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
363*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
364*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
365*4882a593Smuzhiyun				regulator-state-mem {
366*4882a593Smuzhiyun					regulator-off-in-suspend;
367*4882a593Smuzhiyun				};
368*4882a593Smuzhiyun			};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
371*4882a593Smuzhiyun				regulator-always-on;
372*4882a593Smuzhiyun				regulator-boot-on;
373*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
374*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
375*4882a593Smuzhiyun				regulator-name = "vcc_18";
376*4882a593Smuzhiyun				regulator-state-mem {
377*4882a593Smuzhiyun					regulator-on-in-suspend;
378*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
379*4882a593Smuzhiyun				};
380*4882a593Smuzhiyun			};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun			vccio_wl: LDO_REG8 {
383*4882a593Smuzhiyun				regulator-always-on;
384*4882a593Smuzhiyun				regulator-boot-on;
385*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
386*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
387*4882a593Smuzhiyun				regulator-name = "vccio_wl";
388*4882a593Smuzhiyun				regulator-state-mem {
389*4882a593Smuzhiyun					regulator-on-in-suspend;
390*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
391*4882a593Smuzhiyun				};
392*4882a593Smuzhiyun			};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun			vccio_sd: LDO_REG9 {
395*4882a593Smuzhiyun				regulator-always-on;
396*4882a593Smuzhiyun				regulator-boot-on;
397*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
398*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
399*4882a593Smuzhiyun				regulator-name = "vccio_sd";
400*4882a593Smuzhiyun				regulator-state-mem {
401*4882a593Smuzhiyun					regulator-on-in-suspend;
402*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
403*4882a593Smuzhiyun				};
404*4882a593Smuzhiyun			};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun			vcc_sd: SWITCH_REG {
407*4882a593Smuzhiyun				regulator-always-on;
408*4882a593Smuzhiyun				regulator-boot-on;
409*4882a593Smuzhiyun				regulator-name = "vcc_sd";
410*4882a593Smuzhiyun				regulator-state-mem {
411*4882a593Smuzhiyun					regulator-on-in-suspend;
412*4882a593Smuzhiyun				};
413*4882a593Smuzhiyun			};
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun			h_5v: HDMI_SWITCH {
416*4882a593Smuzhiyun				regulator-always-on;
417*4882a593Smuzhiyun				regulator-boot-on;
418*4882a593Smuzhiyun				regulator-name = "h_5v";
419*4882a593Smuzhiyun				regulator-state-mem {
420*4882a593Smuzhiyun					regulator-on-in-suspend;
421*4882a593Smuzhiyun				};
422*4882a593Smuzhiyun			};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun			otg_switch: OTG_SWITCH {
425*4882a593Smuzhiyun				regulator-name = "otg_switch";
426*4882a593Smuzhiyun			};
427*4882a593Smuzhiyun		};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun		battery {
430*4882a593Smuzhiyun			compatible = "rk818-battery";
431*4882a593Smuzhiyun			ocv_table = <3400 3684 3705 3729 3745 3762 3778 3792 3808 3827 3852 3885 3932 3970 4011 4066 4113 4164 4217 4272 4338>;
432*4882a593Smuzhiyun			design_capacity = <4000>;
433*4882a593Smuzhiyun			design_qmax = <4000>;
434*4882a593Smuzhiyun			bat_res = <100>;
435*4882a593Smuzhiyun			max_input_current = <1400>;
436*4882a593Smuzhiyun			max_chrg_current = <1400>;
437*4882a593Smuzhiyun			max_chrg_voltage = <4350>;
438*4882a593Smuzhiyun			sleep_enter_current = <300>;
439*4882a593Smuzhiyun			sleep_exit_current = <300>;
440*4882a593Smuzhiyun			power_off_thresd = <3400>;
441*4882a593Smuzhiyun			zero_algorithm_vol = <3850>;
442*4882a593Smuzhiyun			energy_mode = <0>;
443*4882a593Smuzhiyun			fb_temperature = <105>;
444*4882a593Smuzhiyun			sample_res = <20>;
445*4882a593Smuzhiyun			max_soc_offset = <60>;
446*4882a593Smuzhiyun			monitor_sec = <5>;
447*4882a593Smuzhiyun			virtual_power = <0>;
448*4882a593Smuzhiyun			power_dc2otg = <0>;
449*4882a593Smuzhiyun		};
450*4882a593Smuzhiyun	};
451*4882a593Smuzhiyun};
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun&io_domains {
454*4882a593Smuzhiyun	status = "okay";
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun	sdcard-supply = <&vccio_sd>;
457*4882a593Smuzhiyun	wifi-supply = <&vccio_wl>;
458*4882a593Smuzhiyun};
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun&i2c1 {
461*4882a593Smuzhiyun	status = "okay";
462*4882a593Smuzhiyun	clock-frequency = <400000>;
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun	mpu6050_acc: mpu-acc@68 {
465*4882a593Smuzhiyun		status = "okay";
466*4882a593Smuzhiyun		compatible = "mpu6500_acc";
467*4882a593Smuzhiyun		pinctrl-names = "default";
468*4882a593Smuzhiyun		pinctrl-0 = <&mpu6050_irq_gpio>;
469*4882a593Smuzhiyun		reg = <0x68>;
470*4882a593Smuzhiyun		irq-gpio = <&gpio8 0 IRQ_TYPE_EDGE_RISING>;
471*4882a593Smuzhiyun		irq_enable = <0>;
472*4882a593Smuzhiyun		poll_delay_ms = <30>;
473*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
474*4882a593Smuzhiyun		layout = <5>;
475*4882a593Smuzhiyun	};
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun	mpu6050_gyro: mpu-gyro@68 {
478*4882a593Smuzhiyun		status = "okay";
479*4882a593Smuzhiyun		compatible = "mpu6500_gyro";
480*4882a593Smuzhiyun		reg = <0x68>;
481*4882a593Smuzhiyun		irq_enable = <0>;
482*4882a593Smuzhiyun		poll_delay_ms = <30>;
483*4882a593Smuzhiyun		type = <SENSOR_TYPE_GYROSCOPE>;
484*4882a593Smuzhiyun		layout = <5>;
485*4882a593Smuzhiyun	};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun	ts@40 {
488*4882a593Smuzhiyun		compatible = "gsl,gslX680a";
489*4882a593Smuzhiyun		status = "okay";
490*4882a593Smuzhiyun		reg = <0x40>;
491*4882a593Smuzhiyun		screen_max_x = <1920>;
492*4882a593Smuzhiyun		screen_max_y = <1200>;
493*4882a593Smuzhiyun		xy_swap = <1>;
494*4882a593Smuzhiyun		x_reverse = <1>;
495*4882a593Smuzhiyun		y_reverse = <0>;
496*4882a593Smuzhiyun		x_mul = <2>;
497*4882a593Smuzhiyun		y_mul = <2>;
498*4882a593Smuzhiyun		bin_ver = <0>;
499*4882a593Smuzhiyun		irq-gpio = <&gpio7 6 IRQ_TYPE_LEVEL_HIGH>;
500*4882a593Smuzhiyun		wake-gpio = <&gpio7 5 GPIO_ACTIVE_LOW>;
501*4882a593Smuzhiyun	};
502*4882a593Smuzhiyun};
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun&i2c2 {
505*4882a593Smuzhiyun	status = "okay";
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun	es8316: es8316@10 {
508*4882a593Smuzhiyun		status = "okay";
509*4882a593Smuzhiyun		#sound-dai-cells = <0>;
510*4882a593Smuzhiyun		compatible = "everest,es8316";
511*4882a593Smuzhiyun		reg = <0x10>;
512*4882a593Smuzhiyun		clocks = <&cru SCLK_I2S0_OUT>;
513*4882a593Smuzhiyun		clock-names = "mclk";
514*4882a593Smuzhiyun		spk-con-gpio = <&gpio7 15 GPIO_ACTIVE_HIGH>;
515*4882a593Smuzhiyun		//hp-det-gpio = <&gpio7 7 GPIO_ACTIVE_LOW>;
516*4882a593Smuzhiyun		pinctrl-names = "default";
517*4882a593Smuzhiyun		pinctrl-0 = <&i2s0_mclk>;
518*4882a593Smuzhiyun	};
519*4882a593Smuzhiyun};
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun&i2c3 {
522*4882a593Smuzhiyun	status = "okay";
523*4882a593Smuzhiyun};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun&emmc {
526*4882a593Smuzhiyun	bus-width = <8>;
527*4882a593Smuzhiyun	cap-mmc-highspeed;
528*4882a593Smuzhiyun	disable-wp;
529*4882a593Smuzhiyun	non-removable;
530*4882a593Smuzhiyun	num-slots = <1>;
531*4882a593Smuzhiyun	pinctrl-names = "default";
532*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
533*4882a593Smuzhiyun	max-frequency = <100000000>;
534*4882a593Smuzhiyun	mmc-hs200-1_8v;
535*4882a593Smuzhiyun	mmc-ddr-1_8v;
536*4882a593Smuzhiyun	status = "okay";
537*4882a593Smuzhiyun};
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun&sdmmc {
540*4882a593Smuzhiyun	no-sdio;
541*4882a593Smuzhiyun	no-mmc;
542*4882a593Smuzhiyun	bus-width = <4>;
543*4882a593Smuzhiyun	cap-mmc-highspeed;
544*4882a593Smuzhiyun	sd-uhs-sdr12;
545*4882a593Smuzhiyun	sd-uhs-sdr25;
546*4882a593Smuzhiyun	sd-uhs-sdr50;
547*4882a593Smuzhiyun	sd-uhs-sdr104;
548*4882a593Smuzhiyun	cap-sd-highspeed;
549*4882a593Smuzhiyun	card-detect-delay = <200>;
550*4882a593Smuzhiyun	disable-wp;			/* wp not hooked up */
551*4882a593Smuzhiyun	num-slots = <1>;
552*4882a593Smuzhiyun	pinctrl-names = "default";
553*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
554*4882a593Smuzhiyun	status = "okay";
555*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
556*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
557*4882a593Smuzhiyun	no-sdio;
558*4882a593Smuzhiyun	no-mmc;
559*4882a593Smuzhiyun};
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun&dsi0 {
562*4882a593Smuzhiyun	rockchip,dual-channel = <&dsi1>;
563*4882a593Smuzhiyun	rockchip,lane-rate = <1000>;
564*4882a593Smuzhiyun	status = "okay";
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun	panel@0 {
567*4882a593Smuzhiyun		compatible = "simple-panel-dsi";
568*4882a593Smuzhiyun		reg = <0>;
569*4882a593Smuzhiyun		backlight = <&backlight>;
570*4882a593Smuzhiyun		power-supply = <&vcc_lcd>;
571*4882a593Smuzhiyun		reset-gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_LOW>;
572*4882a593Smuzhiyun		reset-delay-ms = <20>;
573*4882a593Smuzhiyun		init-delay-ms = <20>;
574*4882a593Smuzhiyun		enable-delay-ms = <20>;
575*4882a593Smuzhiyun		prepare-delay-ms = <20>;
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
578*4882a593Smuzhiyun			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
579*4882a593Smuzhiyun		dsi,format = <MIPI_DSI_FMT_RGB888>;
580*4882a593Smuzhiyun		dsi,lanes = <8>;
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun		panel-init-sequence = [
583*4882a593Smuzhiyun			05 14 01 01
584*4882a593Smuzhiyun			15 01 02 36 00
585*4882a593Smuzhiyun			15 01 02 3A 70
586*4882a593Smuzhiyun			15 01 02 35 01
587*4882a593Smuzhiyun			05 78 01 29
588*4882a593Smuzhiyun			05 14 01 11
589*4882a593Smuzhiyun		];
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun		panel-exit-sequence = [
592*4882a593Smuzhiyun			05 64 01 28
593*4882a593Smuzhiyun			05 96 01 10
594*4882a593Smuzhiyun		];
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun		display-timings {
597*4882a593Smuzhiyun			native-mode = <&timing0>;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun			timing0: timing0 {
600*4882a593Smuzhiyun				clock-frequency = <272000000>;
601*4882a593Smuzhiyun				hactive = <1600>;
602*4882a593Smuzhiyun				vactive = <2560>;
603*4882a593Smuzhiyun				hback-porch = <35>;
604*4882a593Smuzhiyun				hfront-porch = <110>;
605*4882a593Smuzhiyun				vback-porch = <8>;
606*4882a593Smuzhiyun				vfront-porch = <12>;
607*4882a593Smuzhiyun				hsync-len = <15>;
608*4882a593Smuzhiyun				vsync-len = <4>;
609*4882a593Smuzhiyun				hsync-active = <0>;
610*4882a593Smuzhiyun				vsync-active = <0>;
611*4882a593Smuzhiyun				de-active = <0>;
612*4882a593Smuzhiyun				pixelclk-active = <0>;
613*4882a593Smuzhiyun			};
614*4882a593Smuzhiyun		};
615*4882a593Smuzhiyun	};
616*4882a593Smuzhiyun};
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun&dsi1 {
619*4882a593Smuzhiyun	status = "okay";
620*4882a593Smuzhiyun};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun&vopb_out_dsi1 {
623*4882a593Smuzhiyun	status = "disabled";
624*4882a593Smuzhiyun};
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun&vopl_out_dsi1 {
627*4882a593Smuzhiyun	status = "disabled";
628*4882a593Smuzhiyun};
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun&dsi0_in_vopl {
631*4882a593Smuzhiyun	status = "disabled";
632*4882a593Smuzhiyun};
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun&dsi0_in_vopb {
635*4882a593Smuzhiyun	status = "okay";
636*4882a593Smuzhiyun};
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun&route_dsi0 {
639*4882a593Smuzhiyun	connect = <&vopb_out_dsi0>;
640*4882a593Smuzhiyun	status = "okay";
641*4882a593Smuzhiyun};
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun&hdmi_in_vopl {
644*4882a593Smuzhiyun	status = "okay";
645*4882a593Smuzhiyun};
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun&hdmi_in_vopb {
648*4882a593Smuzhiyun	status = "disabled";
649*4882a593Smuzhiyun};
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun&hdmi {
652*4882a593Smuzhiyun	#address-cells = <1>;
653*4882a593Smuzhiyun	#size-cells = <0>;
654*4882a593Smuzhiyun	#sound-dai-cells = <0>;
655*4882a593Smuzhiyun	status = "okay";
656*4882a593Smuzhiyun};
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun&route_hdmi {
659*4882a593Smuzhiyun	connect = <&vopl_out_hdmi>;
660*4882a593Smuzhiyun	status = "okay";
661*4882a593Smuzhiyun};
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun&hdmi_analog_sound {
664*4882a593Smuzhiyun	status = "okay";
665*4882a593Smuzhiyun	compatible = "rockchip,rk3288-hdmi-analog",
666*4882a593Smuzhiyun			"rockchip,rk3368-hdmi-analog";
667*4882a593Smuzhiyun	rockchip,model = "rockchip,es8316-codec";
668*4882a593Smuzhiyun	rockchip,cpu = <&i2s>;
669*4882a593Smuzhiyun	rockchip,codec = <&es8316>, <&hdmi>;
670*4882a593Smuzhiyun	rockchip,widgets =
671*4882a593Smuzhiyun		"Microphone", "Microphone Jack",
672*4882a593Smuzhiyun		"Headphone", "Headphone Jack";
673*4882a593Smuzhiyun	rockchip,routing =
674*4882a593Smuzhiyun		"MIC1", "Microphone Jack",
675*4882a593Smuzhiyun		"MIC2", "Microphone Jack",
676*4882a593Smuzhiyun		"Microphone Jack", "micbias1",
677*4882a593Smuzhiyun		"Headphone Jack", "HPOL",
678*4882a593Smuzhiyun		"Headphone Jack", "HPOR";
679*4882a593Smuzhiyun};
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun&i2s {
682*4882a593Smuzhiyun	#sound-dai-cells = <0>;
683*4882a593Smuzhiyun	status = "okay";
684*4882a593Smuzhiyun};
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun&vopb {
687*4882a593Smuzhiyun	status = "okay";
688*4882a593Smuzhiyun};
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun&vopb_mmu {
691*4882a593Smuzhiyun	status = "okay";
692*4882a593Smuzhiyun};
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun&vopl {
695*4882a593Smuzhiyun	status = "okay";
696*4882a593Smuzhiyun};
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun&vopl_mmu {
699*4882a593Smuzhiyun	status = "okay";
700*4882a593Smuzhiyun};
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun&gpu {
703*4882a593Smuzhiyun	status = "okay";
704*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
705*4882a593Smuzhiyun};
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun&wdt {
708*4882a593Smuzhiyun	status = "okay";
709*4882a593Smuzhiyun};
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun&pwm0 {
712*4882a593Smuzhiyun	status = "okay";
713*4882a593Smuzhiyun};
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun&isp {
716*4882a593Smuzhiyun	status = "okay";
717*4882a593Smuzhiyun};
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun&isp_mmu {
720*4882a593Smuzhiyun	status = "okay";
721*4882a593Smuzhiyun};
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun&cpu0 {
724*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
725*4882a593Smuzhiyun};
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun&dfi {
728*4882a593Smuzhiyun	status = "okay";
729*4882a593Smuzhiyun};
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun&dmc {
732*4882a593Smuzhiyun	center-supply = <&vdd_logic>;
733*4882a593Smuzhiyun	status = "okay";
734*4882a593Smuzhiyun};
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun&uart0 {
737*4882a593Smuzhiyun	pinctrl-names = "default";
738*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts>;
739*4882a593Smuzhiyun	status = "okay";
740*4882a593Smuzhiyun};
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun&tsadc {
743*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
744*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
745*4882a593Smuzhiyun	pinctrl-1 = <&otp_gpio>;
746*4882a593Smuzhiyun};
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun&usbphy {
749*4882a593Smuzhiyun	status = "okay";
750*4882a593Smuzhiyun};
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun&usb_host0_ehci {
753*4882a593Smuzhiyun	rockchip-relinquish-port;
754*4882a593Smuzhiyun	status = "okay";
755*4882a593Smuzhiyun};
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun&usb_host0_ohci {
758*4882a593Smuzhiyun	status = "okay";
759*4882a593Smuzhiyun};
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun&usb_host1 {
762*4882a593Smuzhiyun	status = "okay";
763*4882a593Smuzhiyun};
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun&usb_otg {
766*4882a593Smuzhiyun	status = "okay";
767*4882a593Smuzhiyun};
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun&saradc {
770*4882a593Smuzhiyun	vref-supply = <&vcc_18>;
771*4882a593Smuzhiyun	status = "okay";
772*4882a593Smuzhiyun};
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun&rockchip_suspend {
775*4882a593Smuzhiyun	status = "okay";
776*4882a593Smuzhiyun};
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun&pinctrl {
779*4882a593Smuzhiyun	lcd {
780*4882a593Smuzhiyun		lcd_en: lcd-en  {
781*4882a593Smuzhiyun			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
782*4882a593Smuzhiyun		};
783*4882a593Smuzhiyun	};
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun	backlight {
786*4882a593Smuzhiyun		bl_en: bl-en {
787*4882a593Smuzhiyun			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
788*4882a593Smuzhiyun		};
789*4882a593Smuzhiyun	};
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun	mpu6050 {
792*4882a593Smuzhiyun		mpu6050_irq_gpio: mpu6050-irq-gpio {
793*4882a593Smuzhiyun			rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
794*4882a593Smuzhiyun		};
795*4882a593Smuzhiyun	};
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun	pmic {
798*4882a593Smuzhiyun		pmic_int: pmic-int {
799*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
800*4882a593Smuzhiyun		};
801*4882a593Smuzhiyun		vsel1_gpio: vsel1-gpio {
802*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
803*4882a593Smuzhiyun		};
804*4882a593Smuzhiyun	};
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
807*4882a593Smuzhiyun		drive-strength = <8>;
808*4882a593Smuzhiyun	};
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
811*4882a593Smuzhiyun		bias-pull-up;
812*4882a593Smuzhiyun		drive-strength = <8>;
813*4882a593Smuzhiyun	};
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun	sdmmc {
816*4882a593Smuzhiyun		/*
817*4882a593Smuzhiyun		 * Default drive strength isn't enough to achieve even
818*4882a593Smuzhiyun		 * high-speed mode on EVB board so bump up to 8ma.
819*4882a593Smuzhiyun		 */
820*4882a593Smuzhiyun		sdmmc_bus4: sdmmc-bus4 {
821*4882a593Smuzhiyun			rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>,
822*4882a593Smuzhiyun					<6 RK_PC1 1 &pcfg_pull_up_drv_8ma>,
823*4882a593Smuzhiyun					<6 RK_PC2 1 &pcfg_pull_up_drv_8ma>,
824*4882a593Smuzhiyun					<6 RK_PC3 1 &pcfg_pull_up_drv_8ma>;
825*4882a593Smuzhiyun		};
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun		sdmmc_clk: sdmmc-clk {
828*4882a593Smuzhiyun			rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
829*4882a593Smuzhiyun		};
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun		sdmmc_cmd: sdmmc-cmd {
832*4882a593Smuzhiyun			rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>;
833*4882a593Smuzhiyun		};
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun		sdmmc_pwr: sdmmc-pwr {
836*4882a593Smuzhiyun			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
837*4882a593Smuzhiyun		};
838*4882a593Smuzhiyun	};
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun	wireless-bluetooth {
841*4882a593Smuzhiyun		uart0_gpios: uart0-gpios {
842*4882a593Smuzhiyun			rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
843*4882a593Smuzhiyun		};
844*4882a593Smuzhiyun	};
845*4882a593Smuzhiyun};
846