xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3288-r89.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2015 Heiko Stuebner <heiko@sntech.de>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
9*4882a593Smuzhiyun#include "rk3288.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Netxeon R89";
13*4882a593Smuzhiyun	compatible = "netxeon,r89", "rockchip,rk3288";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	memory@0 {
16*4882a593Smuzhiyun		device_type = "memory";
17*4882a593Smuzhiyun		reg = <0x0 0x0 0x0 0x80000000>;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	ext_gmac: external-gmac-clock {
21*4882a593Smuzhiyun		compatible = "fixed-clock";
22*4882a593Smuzhiyun		clock-frequency = <125000000>;
23*4882a593Smuzhiyun		clock-output-names = "ext_gmac";
24*4882a593Smuzhiyun		#clock-cells = <0>;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	gpio-keys {
28*4882a593Smuzhiyun		compatible = "gpio-keys";
29*4882a593Smuzhiyun		autorepeat;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		pinctrl-names = "default";
32*4882a593Smuzhiyun		pinctrl-0 = <&pwrbtn>;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		power {
35*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
36*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
37*4882a593Smuzhiyun			label = "GPIO Key Power";
38*4882a593Smuzhiyun			linux,input-type = <1>;
39*4882a593Smuzhiyun			wakeup-source;
40*4882a593Smuzhiyun			debounce-interval = <100>;
41*4882a593Smuzhiyun		};
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun	ir: ir-receiver {
45*4882a593Smuzhiyun		compatible = "gpio-ir-receiver";
46*4882a593Smuzhiyun		gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
47*4882a593Smuzhiyun		pinctrl-names = "default";
48*4882a593Smuzhiyun		pinctrl-0 = <&ir_int>;
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	vcc_host: vcc-host-regulator {
52*4882a593Smuzhiyun		compatible = "regulator-fixed";
53*4882a593Smuzhiyun		enable-active-high;
54*4882a593Smuzhiyun		gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
55*4882a593Smuzhiyun		pinctrl-names = "default";
56*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
57*4882a593Smuzhiyun		regulator-name = "vcc_host";
58*4882a593Smuzhiyun		regulator-always-on;
59*4882a593Smuzhiyun		regulator-boot-on;
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	vcc_otg: vcc-otg-regulator {
63*4882a593Smuzhiyun		compatible = "regulator-fixed";
64*4882a593Smuzhiyun		enable-active-high;
65*4882a593Smuzhiyun		gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
66*4882a593Smuzhiyun		pinctrl-names = "default";
67*4882a593Smuzhiyun		pinctrl-0 = <&otg_vbus_drv>;
68*4882a593Smuzhiyun		regulator-name = "vcc_otg";
69*4882a593Smuzhiyun		regulator-always-on;
70*4882a593Smuzhiyun		regulator-boot-on;
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	vcc_sdmmc: sdmmc-regulator {
74*4882a593Smuzhiyun		compatible = "regulator-fixed";
75*4882a593Smuzhiyun		regulator-name = "sdmmc-supply";
76*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
77*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
78*4882a593Smuzhiyun		gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
79*4882a593Smuzhiyun		startup-delay-us = <100000>;
80*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	vcc_sys: sys-regulator {
84*4882a593Smuzhiyun		compatible = "regulator-fixed";
85*4882a593Smuzhiyun		regulator-name = "sys-supply";
86*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
87*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
88*4882a593Smuzhiyun		regulator-always-on;
89*4882a593Smuzhiyun		regulator-boot-on;
90*4882a593Smuzhiyun	};
91*4882a593Smuzhiyun};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun&cpu0 {
94*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
95*4882a593Smuzhiyun};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun&cpu1 {
98*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
99*4882a593Smuzhiyun};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun&cpu2 {
102*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
103*4882a593Smuzhiyun};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun&cpu3 {
106*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&gmac {
110*4882a593Smuzhiyun	phy-supply = <&vcc_lan>;
111*4882a593Smuzhiyun	phy-mode = "rgmii";
112*4882a593Smuzhiyun	clock_in_out = "input";
113*4882a593Smuzhiyun	snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
114*4882a593Smuzhiyun	snps,reset-active-low;
115*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 1000000>;
116*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC>;
117*4882a593Smuzhiyun	assigned-clock-parents = <&ext_gmac>;
118*4882a593Smuzhiyun	pinctrl-names = "default";
119*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
120*4882a593Smuzhiyun	tx_delay = <0x30>;
121*4882a593Smuzhiyun	rx_delay = <0x10>;
122*4882a593Smuzhiyun	status = "okay";
123*4882a593Smuzhiyun};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun&hdmi {
126*4882a593Smuzhiyun	status = "okay";
127*4882a593Smuzhiyun};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun&i2c0 {
130*4882a593Smuzhiyun	status = "okay";
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	vdd_cpu: pmic@40 {
133*4882a593Smuzhiyun		compatible = "silergy,syr827";
134*4882a593Smuzhiyun		reg = <0x40>;
135*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
136*4882a593Smuzhiyun		regulator-name = "VDD_CPU";
137*4882a593Smuzhiyun		regulator-enable-ramp-delay = <300>;
138*4882a593Smuzhiyun		regulator-min-microvolt = <850000>;
139*4882a593Smuzhiyun		regulator-max-microvolt = <1350000>;
140*4882a593Smuzhiyun		regulator-ramp-delay = <8000>;
141*4882a593Smuzhiyun		regulator-always-on;
142*4882a593Smuzhiyun		regulator-boot-on;
143*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	vdd_gpu: pmic@41 {
147*4882a593Smuzhiyun		compatible = "silergy,syr828";
148*4882a593Smuzhiyun		reg = <0x41>;
149*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
150*4882a593Smuzhiyun		regulator-name = "VDD_GPU";
151*4882a593Smuzhiyun		regulator-enable-ramp-delay = <300>;
152*4882a593Smuzhiyun		regulator-min-microvolt = <850000>;
153*4882a593Smuzhiyun		regulator-max-microvolt = <1350000>;
154*4882a593Smuzhiyun		regulator-ramp-delay = <8000>;
155*4882a593Smuzhiyun		regulator-always-on;
156*4882a593Smuzhiyun		regulator-boot-on;
157*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
158*4882a593Smuzhiyun	};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun	rtc@51 {
161*4882a593Smuzhiyun		compatible = "haoyu,hym8563";
162*4882a593Smuzhiyun		reg = <0x51>;
163*4882a593Smuzhiyun		#clock-cells = <0>;
164*4882a593Smuzhiyun		clock-output-names = "xin32k";
165*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
166*4882a593Smuzhiyun		interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
167*4882a593Smuzhiyun		pinctrl-names = "default";
168*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
169*4882a593Smuzhiyun	};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun	act8846: pmic@5a {
172*4882a593Smuzhiyun		compatible = "active-semi,act8846";
173*4882a593Smuzhiyun		reg = <0x5a>;
174*4882a593Smuzhiyun		pinctrl-names = "default";
175*4882a593Smuzhiyun		pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;
176*4882a593Smuzhiyun		system-power-controller;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun		regulators {
179*4882a593Smuzhiyun			vcc_ddr: REG1 {
180*4882a593Smuzhiyun				regulator-name = "VCC_DDR";
181*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
182*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
183*4882a593Smuzhiyun				regulator-always-on;
184*4882a593Smuzhiyun			};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun			vcc_io: REG2 {
187*4882a593Smuzhiyun				regulator-name = "VCC_IO";
188*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
189*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
190*4882a593Smuzhiyun				regulator-always-on;
191*4882a593Smuzhiyun			};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun			vdd_log: REG3 {
194*4882a593Smuzhiyun				regulator-name = "VDD_LOG";
195*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
196*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
197*4882a593Smuzhiyun				regulator-always-on;
198*4882a593Smuzhiyun			};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun			vcc_20: REG4 {
201*4882a593Smuzhiyun				regulator-name = "VCC_20";
202*4882a593Smuzhiyun				regulator-min-microvolt = <2000000>;
203*4882a593Smuzhiyun				regulator-max-microvolt = <2000000>;
204*4882a593Smuzhiyun				regulator-always-on;
205*4882a593Smuzhiyun			};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun			vccio_sd: REG5 {
208*4882a593Smuzhiyun				regulator-name = "VCCIO_SD";
209*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
210*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
211*4882a593Smuzhiyun				regulator-always-on;
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			vdd10_lcd: REG6 {
215*4882a593Smuzhiyun				regulator-name = "VDD10_LCD";
216*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
217*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
218*4882a593Smuzhiyun				regulator-always-on;
219*4882a593Smuzhiyun			};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun			vcc_wl: REG7 {
222*4882a593Smuzhiyun				regulator-name = "VCC_WL";
223*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
224*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
225*4882a593Smuzhiyun				regulator-always-on;
226*4882a593Smuzhiyun			};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun			vcca_33: REG8 {
229*4882a593Smuzhiyun				regulator-name = "VCCA_33";
230*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
231*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
232*4882a593Smuzhiyun				regulator-always-on;
233*4882a593Smuzhiyun			};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun			vcc_lan: REG9 {
236*4882a593Smuzhiyun				regulator-name = "VCC_LAN";
237*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
238*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
239*4882a593Smuzhiyun				regulator-always-on;
240*4882a593Smuzhiyun			};
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun			vdd_10: REG10 {
243*4882a593Smuzhiyun				regulator-name = "VDD_10";
244*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
245*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
246*4882a593Smuzhiyun				regulator-always-on;
247*4882a593Smuzhiyun			};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun			vcc_18: REG11 {
250*4882a593Smuzhiyun				regulator-name = "VCC_18";
251*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
252*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
253*4882a593Smuzhiyun				regulator-always-on;
254*4882a593Smuzhiyun			};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun			vcc18_lcd: REG12 {
257*4882a593Smuzhiyun				regulator-name = "VCC18_LCD";
258*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
259*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
260*4882a593Smuzhiyun				regulator-always-on;
261*4882a593Smuzhiyun			};
262*4882a593Smuzhiyun		};
263*4882a593Smuzhiyun	};
264*4882a593Smuzhiyun};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun&i2c5 {
267*4882a593Smuzhiyun	status = "okay";
268*4882a593Smuzhiyun};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun&pinctrl {
271*4882a593Smuzhiyun	pcfg_output_high: pcfg-output-high {
272*4882a593Smuzhiyun		output-high;
273*4882a593Smuzhiyun	};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun	pcfg_output_low: pcfg-output-low {
276*4882a593Smuzhiyun		output-low;
277*4882a593Smuzhiyun	};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun	act8846 {
280*4882a593Smuzhiyun		pmic_vsel: pmic-vsel {
281*4882a593Smuzhiyun			rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
282*4882a593Smuzhiyun		};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun		pwr_hold: pwr-hold {
285*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>;
286*4882a593Smuzhiyun		};
287*4882a593Smuzhiyun	};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun	buttons {
290*4882a593Smuzhiyun		pwrbtn: pwrbtn {
291*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
292*4882a593Smuzhiyun		};
293*4882a593Smuzhiyun	};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun	ir {
296*4882a593Smuzhiyun		ir_int: ir-int {
297*4882a593Smuzhiyun			rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
298*4882a593Smuzhiyun		};
299*4882a593Smuzhiyun	};
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun	pmic {
302*4882a593Smuzhiyun		pmic_int: pmic-int {
303*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
304*4882a593Smuzhiyun		};
305*4882a593Smuzhiyun	};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun	usb {
308*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
309*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
310*4882a593Smuzhiyun		};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun		otg_vbus_drv: otg-vbus-drv {
313*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
314*4882a593Smuzhiyun		};
315*4882a593Smuzhiyun	};
316*4882a593Smuzhiyun};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun&pwm0 {
319*4882a593Smuzhiyun	status = "okay";
320*4882a593Smuzhiyun};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun&saradc {
323*4882a593Smuzhiyun	vref-supply = <&vcc_18>;
324*4882a593Smuzhiyun	status = "okay";
325*4882a593Smuzhiyun};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun&sdmmc {
328*4882a593Smuzhiyun	bus-width = <4>;
329*4882a593Smuzhiyun	cap-mmc-highspeed;
330*4882a593Smuzhiyun	cap-sd-highspeed;
331*4882a593Smuzhiyun	card-detect-delay = <200>;
332*4882a593Smuzhiyun	disable-wp;
333*4882a593Smuzhiyun	pinctrl-names = "default";
334*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
335*4882a593Smuzhiyun	vmmc-supply = <&vcc_sdmmc>;
336*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
337*4882a593Smuzhiyun	status = "okay";
338*4882a593Smuzhiyun};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun&tsadc {
341*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <0>;
342*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <0>;
343*4882a593Smuzhiyun	status = "okay";
344*4882a593Smuzhiyun};
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun&uart0 {
347*4882a593Smuzhiyun	status = "okay";
348*4882a593Smuzhiyun};
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun&uart1 {
351*4882a593Smuzhiyun	status = "okay";
352*4882a593Smuzhiyun};
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun&uart2 {
355*4882a593Smuzhiyun	status = "okay";
356*4882a593Smuzhiyun};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun&uart3 {
359*4882a593Smuzhiyun	status = "okay";
360*4882a593Smuzhiyun};
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun&uart4 {
363*4882a593Smuzhiyun	status = "okay";
364*4882a593Smuzhiyun};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun&usb_host0_ehci {
367*4882a593Smuzhiyun	status = "okay";
368*4882a593Smuzhiyun};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun&usb_host1 {
371*4882a593Smuzhiyun	status = "okay";
372*4882a593Smuzhiyun};
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun&usb_otg {
375*4882a593Smuzhiyun	status = "okay";
376*4882a593Smuzhiyun};
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun&usbphy {
379*4882a593Smuzhiyun	status = "okay";
380*4882a593Smuzhiyun};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun&vopb {
383*4882a593Smuzhiyun	status = "okay";
384*4882a593Smuzhiyun};
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun&vopb_mmu {
387*4882a593Smuzhiyun	status = "okay";
388*4882a593Smuzhiyun};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun&vopl {
391*4882a593Smuzhiyun	status = "okay";
392*4882a593Smuzhiyun};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun&vopl_mmu {
395*4882a593Smuzhiyun	status = "okay";
396*4882a593Smuzhiyun};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun&wdt {
399*4882a593Smuzhiyun	status = "okay";
400*4882a593Smuzhiyun};
401