xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3288-popmetal.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
8*4882a593Smuzhiyun#include "rk3288.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "PopMetal-RK3288";
12*4882a593Smuzhiyun	compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	memory@0 {
15*4882a593Smuzhiyun		device_type = "memory";
16*4882a593Smuzhiyun		reg = <0x0 0x0 0x0 0x80000000>;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	ext_gmac: external-gmac-clock {
20*4882a593Smuzhiyun		compatible = "fixed-clock";
21*4882a593Smuzhiyun		clock-frequency = <125000000>;
22*4882a593Smuzhiyun		clock-output-names = "ext_gmac";
23*4882a593Smuzhiyun		#clock-cells = <0>;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	gpio-keys {
27*4882a593Smuzhiyun		compatible = "gpio-keys";
28*4882a593Smuzhiyun		autorepeat;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		pinctrl-names = "default";
31*4882a593Smuzhiyun		pinctrl-0 = <&pwrbtn>;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun		power {
34*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
35*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
36*4882a593Smuzhiyun			label = "GPIO Key Power";
37*4882a593Smuzhiyun			linux,input-type = <1>;
38*4882a593Smuzhiyun			wakeup-source;
39*4882a593Smuzhiyun			debounce-interval = <100>;
40*4882a593Smuzhiyun		};
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	ir: ir-receiver {
44*4882a593Smuzhiyun		compatible = "gpio-ir-receiver";
45*4882a593Smuzhiyun		gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
46*4882a593Smuzhiyun		pinctrl-names = "default";
47*4882a593Smuzhiyun		pinctrl-0 = <&ir_int>;
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	vcc_flash: flash-regulator {
51*4882a593Smuzhiyun		compatible = "regulator-fixed";
52*4882a593Smuzhiyun		regulator-name = "vcc_flash";
53*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
54*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
55*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	vcc_sd: sdmmc-regulator {
59*4882a593Smuzhiyun		compatible = "regulator-fixed";
60*4882a593Smuzhiyun		gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
61*4882a593Smuzhiyun		pinctrl-names = "default";
62*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc_pwr>;
63*4882a593Smuzhiyun		regulator-name = "vcc_sd";
64*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
65*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
66*4882a593Smuzhiyun		startup-delay-us = <100000>;
67*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
68*4882a593Smuzhiyun	};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun	vcc_sys: vsys-regulator {
71*4882a593Smuzhiyun		compatible = "regulator-fixed";
72*4882a593Smuzhiyun		regulator-name = "vcc_sys";
73*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
74*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
75*4882a593Smuzhiyun		regulator-always-on;
76*4882a593Smuzhiyun		regulator-boot-on;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	/*
80*4882a593Smuzhiyun	 * A PT5128 creates both dovdd_1v8 and vcc28_dvp, controlled
81*4882a593Smuzhiyun	 * by the dvp_pwr pin.
82*4882a593Smuzhiyun	 */
83*4882a593Smuzhiyun	vcc18_dvp: vcc18-dvp-regulator {
84*4882a593Smuzhiyun		compatible = "regulator-fixed";
85*4882a593Smuzhiyun		regulator-name = "vcc18-dvp";
86*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
87*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
88*4882a593Smuzhiyun		vin-supply = <&vcc28_dvp>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	vcc28_dvp: vcc28-dvp-regulator {
92*4882a593Smuzhiyun		compatible = "regulator-fixed";
93*4882a593Smuzhiyun		enable-active-high;
94*4882a593Smuzhiyun		gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
95*4882a593Smuzhiyun		pinctrl-names = "default";
96*4882a593Smuzhiyun		pinctrl-0 = <&dvp_pwr>;
97*4882a593Smuzhiyun		regulator-name = "vcc28_dvp";
98*4882a593Smuzhiyun		regulator-min-microvolt = <2800000>;
99*4882a593Smuzhiyun		regulator-max-microvolt = <2800000>;
100*4882a593Smuzhiyun		regulator-always-on;
101*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun&cpu0 {
106*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&cpu1 {
110*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
111*4882a593Smuzhiyun};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun&cpu2 {
114*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
115*4882a593Smuzhiyun};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun&cpu3 {
118*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
119*4882a593Smuzhiyun};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun&emmc {
122*4882a593Smuzhiyun	bus-width = <8>;
123*4882a593Smuzhiyun	cap-mmc-highspeed;
124*4882a593Smuzhiyun	mmc-ddr-1_8v;
125*4882a593Smuzhiyun	mmc-hs200-1_8v;
126*4882a593Smuzhiyun	non-removable;
127*4882a593Smuzhiyun	pinctrl-names = "default";
128*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
129*4882a593Smuzhiyun	vmmc-supply = <&vcc_io>;
130*4882a593Smuzhiyun	vqmmc-supply = <&vcc_flash>;
131*4882a593Smuzhiyun	status = "okay";
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun&sdmmc {
135*4882a593Smuzhiyun	bus-width = <4>;
136*4882a593Smuzhiyun	cap-mmc-highspeed;
137*4882a593Smuzhiyun	cap-sd-highspeed;
138*4882a593Smuzhiyun	card-detect-delay = <200>;
139*4882a593Smuzhiyun	disable-wp;                     /* wp not hooked up */
140*4882a593Smuzhiyun	pinctrl-names = "default";
141*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
142*4882a593Smuzhiyun	sd-uhs-sdr12;
143*4882a593Smuzhiyun	sd-uhs-sdr25;
144*4882a593Smuzhiyun	sd-uhs-sdr50;
145*4882a593Smuzhiyun	sd-uhs-sdr104;
146*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
147*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
148*4882a593Smuzhiyun	status = "okay";
149*4882a593Smuzhiyun};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun&gmac {
152*4882a593Smuzhiyun	phy-supply = <&vcc_lan>;
153*4882a593Smuzhiyun	phy-mode = "rgmii";
154*4882a593Smuzhiyun	clock_in_out = "input";
155*4882a593Smuzhiyun	snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
156*4882a593Smuzhiyun	snps,reset-active-low;
157*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 1000000>;
158*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC>;
159*4882a593Smuzhiyun	assigned-clock-parents = <&ext_gmac>;
160*4882a593Smuzhiyun	pinctrl-names = "default";
161*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
162*4882a593Smuzhiyun	tx_delay = <0x30>;
163*4882a593Smuzhiyun	rx_delay = <0x10>;
164*4882a593Smuzhiyun	status = "okay";
165*4882a593Smuzhiyun};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun&hdmi {
168*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c5>;
169*4882a593Smuzhiyun	status = "okay";
170*4882a593Smuzhiyun};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun&i2c0 {
173*4882a593Smuzhiyun	status = "okay";
174*4882a593Smuzhiyun	clock-frequency = <400000>;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun	rk808: pmic@1b {
177*4882a593Smuzhiyun		compatible = "rockchip,rk808";
178*4882a593Smuzhiyun		reg = <0x1b>;
179*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
180*4882a593Smuzhiyun		interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
181*4882a593Smuzhiyun		pinctrl-names = "default";
182*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int &global_pwroff>;
183*4882a593Smuzhiyun		rockchip,system-power-controller;
184*4882a593Smuzhiyun		wakeup-source;
185*4882a593Smuzhiyun		#clock-cells = <1>;
186*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
189*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
190*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
191*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
192*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
193*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
194*4882a593Smuzhiyun		vcc8-supply = <&vcc_18>;
195*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
196*4882a593Smuzhiyun		vcc10-supply = <&vcc_io>;
197*4882a593Smuzhiyun		vcc11-supply = <&vcc_sys>;
198*4882a593Smuzhiyun		vcc12-supply = <&vcc_io>;
199*4882a593Smuzhiyun		vddio-supply = <&vcc_io>;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun		regulators {
202*4882a593Smuzhiyun			vdd_cpu: DCDC_REG1 {
203*4882a593Smuzhiyun				regulator-always-on;
204*4882a593Smuzhiyun				regulator-boot-on;
205*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
206*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
207*4882a593Smuzhiyun				regulator-name = "vdd_arm";
208*4882a593Smuzhiyun				regulator-state-mem {
209*4882a593Smuzhiyun					regulator-off-in-suspend;
210*4882a593Smuzhiyun				};
211*4882a593Smuzhiyun			};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
214*4882a593Smuzhiyun				regulator-always-on;
215*4882a593Smuzhiyun				regulator-boot-on;
216*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
217*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
218*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
219*4882a593Smuzhiyun				regulator-state-mem {
220*4882a593Smuzhiyun					regulator-on-in-suspend;
221*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
222*4882a593Smuzhiyun				};
223*4882a593Smuzhiyun			};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
226*4882a593Smuzhiyun				regulator-always-on;
227*4882a593Smuzhiyun				regulator-boot-on;
228*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
229*4882a593Smuzhiyun				regulator-state-mem {
230*4882a593Smuzhiyun					regulator-on-in-suspend;
231*4882a593Smuzhiyun				};
232*4882a593Smuzhiyun			};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
235*4882a593Smuzhiyun				regulator-always-on;
236*4882a593Smuzhiyun				regulator-boot-on;
237*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
238*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
239*4882a593Smuzhiyun				regulator-name = "vcc_io";
240*4882a593Smuzhiyun				regulator-state-mem {
241*4882a593Smuzhiyun					regulator-on-in-suspend;
242*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
243*4882a593Smuzhiyun				};
244*4882a593Smuzhiyun			};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun			vcc_lan: LDO_REG1 {
247*4882a593Smuzhiyun				regulator-always-on;
248*4882a593Smuzhiyun				regulator-boot-on;
249*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
250*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
251*4882a593Smuzhiyun				regulator-name = "vcc_lan";
252*4882a593Smuzhiyun				regulator-state-mem {
253*4882a593Smuzhiyun					regulator-on-in-suspend;
254*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
255*4882a593Smuzhiyun				};
256*4882a593Smuzhiyun			};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun			vccio_sd: LDO_REG2 {
259*4882a593Smuzhiyun				regulator-always-on;
260*4882a593Smuzhiyun				regulator-boot-on;
261*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
262*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
263*4882a593Smuzhiyun				regulator-name = "vccio_sd";
264*4882a593Smuzhiyun				regulator-state-mem {
265*4882a593Smuzhiyun					regulator-off-in-suspend;
266*4882a593Smuzhiyun				};
267*4882a593Smuzhiyun			};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
270*4882a593Smuzhiyun				regulator-always-on;
271*4882a593Smuzhiyun				regulator-boot-on;
272*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
273*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
274*4882a593Smuzhiyun				regulator-name = "vdd_10";
275*4882a593Smuzhiyun				regulator-state-mem {
276*4882a593Smuzhiyun					regulator-on-in-suspend;
277*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
278*4882a593Smuzhiyun				};
279*4882a593Smuzhiyun			};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun			vcc18_lcd: LDO_REG4 {
282*4882a593Smuzhiyun				regulator-always-on;
283*4882a593Smuzhiyun				regulator-boot-on;
284*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
285*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
286*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
287*4882a593Smuzhiyun				regulator-state-mem {
288*4882a593Smuzhiyun					regulator-on-in-suspend;
289*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
290*4882a593Smuzhiyun				};
291*4882a593Smuzhiyun			};
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun			ldo5: LDO_REG5 {
294*4882a593Smuzhiyun				regulator-always-on;
295*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
296*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
297*4882a593Smuzhiyun				regulator-name = "ldo5";
298*4882a593Smuzhiyun			};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
301*4882a593Smuzhiyun				regulator-always-on;
302*4882a593Smuzhiyun				regulator-boot-on;
303*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
304*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
305*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
306*4882a593Smuzhiyun				regulator-state-mem {
307*4882a593Smuzhiyun					regulator-on-in-suspend;
308*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
309*4882a593Smuzhiyun				};
310*4882a593Smuzhiyun			};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
313*4882a593Smuzhiyun				regulator-always-on;
314*4882a593Smuzhiyun				regulator-boot-on;
315*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
316*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
317*4882a593Smuzhiyun				regulator-name = "vcc_18";
318*4882a593Smuzhiyun				regulator-state-mem {
319*4882a593Smuzhiyun					regulator-on-in-suspend;
320*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
321*4882a593Smuzhiyun				};
322*4882a593Smuzhiyun			};
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun			vcca_33: LDO_REG8 {
325*4882a593Smuzhiyun				regulator-always-on;
326*4882a593Smuzhiyun				regulator-boot-on;
327*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
328*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
329*4882a593Smuzhiyun				regulator-name = "vcca_33";
330*4882a593Smuzhiyun				regulator-state-mem {
331*4882a593Smuzhiyun					regulator-on-in-suspend;
332*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
333*4882a593Smuzhiyun				};
334*4882a593Smuzhiyun			};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun			vccio_wl: SWITCH_REG1 {
337*4882a593Smuzhiyun				regulator-always-on;
338*4882a593Smuzhiyun				regulator-boot-on;
339*4882a593Smuzhiyun				regulator-name = "vccio_wl";
340*4882a593Smuzhiyun				regulator-state-mem {
341*4882a593Smuzhiyun					regulator-on-in-suspend;
342*4882a593Smuzhiyun				};
343*4882a593Smuzhiyun			};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun			vcc_lcd: SWITCH_REG2 {
346*4882a593Smuzhiyun				regulator-always-on;
347*4882a593Smuzhiyun				regulator-boot-on;
348*4882a593Smuzhiyun				regulator-name = "vcc_lcd";
349*4882a593Smuzhiyun				regulator-state-mem {
350*4882a593Smuzhiyun					regulator-on-in-suspend;
351*4882a593Smuzhiyun				};
352*4882a593Smuzhiyun			};
353*4882a593Smuzhiyun		};
354*4882a593Smuzhiyun	};
355*4882a593Smuzhiyun};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun&i2c1 {
358*4882a593Smuzhiyun	status = "okay";
359*4882a593Smuzhiyun	clock-frequency = <400000>;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun	ak8963: ak8963@d {
362*4882a593Smuzhiyun		compatible = "asahi-kasei,ak8975";
363*4882a593Smuzhiyun		reg = <0x0d>;
364*4882a593Smuzhiyun		interrupt-parent = <&gpio8>;
365*4882a593Smuzhiyun		interrupts = <RK_PA1 IRQ_TYPE_EDGE_RISING>;
366*4882a593Smuzhiyun		pinctrl-names = "default";
367*4882a593Smuzhiyun		pinctrl-0 = <&comp_int>;
368*4882a593Smuzhiyun		vdd-supply = <&vcc_io>;
369*4882a593Smuzhiyun		vid-supply = <&vcc_io>;
370*4882a593Smuzhiyun	};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun	l3g4200d: l3g4200d@69 {
373*4882a593Smuzhiyun		compatible = "st,l3g4200d-gyro";
374*4882a593Smuzhiyun		st,drdy-int-pin = <2>;
375*4882a593Smuzhiyun		reg = <0x69>;
376*4882a593Smuzhiyun		vdd-supply = <&vcc_io>;
377*4882a593Smuzhiyun		vddio-supply = <&vcc_io>;
378*4882a593Smuzhiyun	};
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun	mma8452: mma8452@1d {
381*4882a593Smuzhiyun		compatible = "fsl,mma8452";
382*4882a593Smuzhiyun		reg = <0x1d>;
383*4882a593Smuzhiyun		interrupt-parent = <&gpio8>;
384*4882a593Smuzhiyun		interrupts = <RK_PA0 IRQ_TYPE_EDGE_RISING>;
385*4882a593Smuzhiyun		pinctrl-names = "default";
386*4882a593Smuzhiyun		pinctrl-0 = <&gsensor_int>;
387*4882a593Smuzhiyun	};
388*4882a593Smuzhiyun};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun&i2c2 {
391*4882a593Smuzhiyun	status = "okay";
392*4882a593Smuzhiyun};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun&i2c3 {
395*4882a593Smuzhiyun	status = "okay";
396*4882a593Smuzhiyun};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun&i2c4 {
399*4882a593Smuzhiyun	status = "okay";
400*4882a593Smuzhiyun};
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun&i2c5 {
403*4882a593Smuzhiyun	status = "okay";
404*4882a593Smuzhiyun};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun&io_domains {
407*4882a593Smuzhiyun	status = "okay";
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun	audio-supply = <&vcca_33>;
410*4882a593Smuzhiyun	bb-supply = <&vcc_io>;
411*4882a593Smuzhiyun	dvp-supply = <&vcc18_dvp>;
412*4882a593Smuzhiyun	flash0-supply = <&vcc_flash>;
413*4882a593Smuzhiyun	flash1-supply = <&vcc_lan>;
414*4882a593Smuzhiyun	gpio30-supply = <&vcc_io>;
415*4882a593Smuzhiyun	gpio1830-supply = <&vcc_io>;
416*4882a593Smuzhiyun	lcdc-supply = <&vcc_io>;
417*4882a593Smuzhiyun	sdcard-supply = <&vccio_sd>;
418*4882a593Smuzhiyun	wifi-supply = <&vccio_wl>;
419*4882a593Smuzhiyun};
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun&pinctrl {
422*4882a593Smuzhiyun	ak8963 {
423*4882a593Smuzhiyun		comp_int: comp-int {
424*4882a593Smuzhiyun			rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
425*4882a593Smuzhiyun		};
426*4882a593Smuzhiyun	};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun	buttons {
429*4882a593Smuzhiyun		pwrbtn: pwrbtn {
430*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
431*4882a593Smuzhiyun		};
432*4882a593Smuzhiyun	};
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun	dvp {
435*4882a593Smuzhiyun		dvp_pwr: dvp-pwr {
436*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
437*4882a593Smuzhiyun		};
438*4882a593Smuzhiyun	};
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun	ir {
441*4882a593Smuzhiyun		ir_int: ir-int {
442*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
443*4882a593Smuzhiyun		};
444*4882a593Smuzhiyun	};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun	mma8452 {
447*4882a593Smuzhiyun		gsensor_int: gsensor-int {
448*4882a593Smuzhiyun			rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
449*4882a593Smuzhiyun		};
450*4882a593Smuzhiyun	};
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun	pmic {
453*4882a593Smuzhiyun		pmic_int: pmic-int {
454*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
455*4882a593Smuzhiyun		};
456*4882a593Smuzhiyun	};
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun	sdmmc {
459*4882a593Smuzhiyun		sdmmc_pwr: sdmmc-pwr {
460*4882a593Smuzhiyun			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
461*4882a593Smuzhiyun		};
462*4882a593Smuzhiyun	};
463*4882a593Smuzhiyun};
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun&tsadc {
466*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <0>;
467*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <0>;
468*4882a593Smuzhiyun	status = "okay";
469*4882a593Smuzhiyun};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun&vopb {
472*4882a593Smuzhiyun	status = "okay";
473*4882a593Smuzhiyun};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun&vopb_mmu {
476*4882a593Smuzhiyun	status = "okay";
477*4882a593Smuzhiyun};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun&vopl {
480*4882a593Smuzhiyun	status = "okay";
481*4882a593Smuzhiyun};
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun&vopl_mmu {
484*4882a593Smuzhiyun	status = "okay";
485*4882a593Smuzhiyun};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun&uart0 {
488*4882a593Smuzhiyun	status = "okay";
489*4882a593Smuzhiyun};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun&uart1 {
492*4882a593Smuzhiyun	status = "okay";
493*4882a593Smuzhiyun};
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun&uart2 {
496*4882a593Smuzhiyun	status = "okay";
497*4882a593Smuzhiyun};
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun&uart3 {
500*4882a593Smuzhiyun	status = "okay";
501*4882a593Smuzhiyun};
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun&uart4 {
504*4882a593Smuzhiyun	status = "okay";
505*4882a593Smuzhiyun};
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun&usbphy {
508*4882a593Smuzhiyun	status = "okay";
509*4882a593Smuzhiyun};
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun&usb_otg {
512*4882a593Smuzhiyun	status = "okay";
513*4882a593Smuzhiyun};
514