1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 8*4882a593Smuzhiyun#include "rk3288.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "mqmaker MiQi"; 12*4882a593Smuzhiyun compatible = "mqmaker,miqi", "rockchip,rk3288"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun chosen { 15*4882a593Smuzhiyun stdout-path = "serial2:115200n8"; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun memory@0 { 19*4882a593Smuzhiyun device_type = "memory"; 20*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x80000000>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun ext_gmac: external-gmac-clock { 24*4882a593Smuzhiyun compatible = "fixed-clock"; 25*4882a593Smuzhiyun #clock-cells = <0>; 26*4882a593Smuzhiyun clock-frequency = <125000000>; 27*4882a593Smuzhiyun clock-output-names = "ext_gmac"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun leds { 31*4882a593Smuzhiyun compatible = "gpio-leds"; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun work_led: led-0 { 34*4882a593Smuzhiyun gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; 35*4882a593Smuzhiyun label = "miqi:green:user"; 36*4882a593Smuzhiyun linux,default-trigger = "timer"; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun vcc_flash: flash-regulator { 41*4882a593Smuzhiyun compatible = "regulator-fixed"; 42*4882a593Smuzhiyun regulator-name = "vcc_flash"; 43*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 44*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 45*4882a593Smuzhiyun vin-supply = <&vcc_io>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun vcc_host: usb-host-regulator { 49*4882a593Smuzhiyun compatible = "regulator-fixed"; 50*4882a593Smuzhiyun enable-active-high; 51*4882a593Smuzhiyun gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 52*4882a593Smuzhiyun pinctrl-names = "default"; 53*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 54*4882a593Smuzhiyun regulator-name = "vcc_host"; 55*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 56*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 57*4882a593Smuzhiyun regulator-always-on; 58*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun vcc_sd: sdmmc-regulator { 62*4882a593Smuzhiyun compatible = "regulator-fixed"; 63*4882a593Smuzhiyun gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>; 64*4882a593Smuzhiyun pinctrl-names = "default"; 65*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_pwr>; 66*4882a593Smuzhiyun regulator-name = "vcc_sd"; 67*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 68*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 69*4882a593Smuzhiyun startup-delay-us = <100000>; 70*4882a593Smuzhiyun vin-supply = <&vcc_io>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun vcc_sys: vsys-regulator { 74*4882a593Smuzhiyun compatible = "regulator-fixed"; 75*4882a593Smuzhiyun regulator-name = "vcc_sys"; 76*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 77*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 78*4882a593Smuzhiyun regulator-always-on; 79*4882a593Smuzhiyun regulator-boot-on; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun}; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun&cpu0 { 84*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 85*4882a593Smuzhiyun}; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun&cpu1 { 88*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&cpu2 { 92*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun&cpu3 { 96*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&emmc { 100*4882a593Smuzhiyun bus-width = <8>; 101*4882a593Smuzhiyun cap-mmc-highspeed; 102*4882a593Smuzhiyun non-removable; 103*4882a593Smuzhiyun pinctrl-names = "default"; 104*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>; 105*4882a593Smuzhiyun vmmc-supply = <&vcc_io>; 106*4882a593Smuzhiyun vqmmc-supply = <&vcc_flash>; 107*4882a593Smuzhiyun status = "okay"; 108*4882a593Smuzhiyun}; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun&gmac { 111*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC>; 112*4882a593Smuzhiyun assigned-clock-parents = <&ext_gmac>; 113*4882a593Smuzhiyun clock_in_out = "input"; 114*4882a593Smuzhiyun pinctrl-names = "default"; 115*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>; 116*4882a593Smuzhiyun phy-supply = <&vcc_lan>; 117*4882a593Smuzhiyun phy-mode = "rgmii"; 118*4882a593Smuzhiyun snps,reset-active-low; 119*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 1000000>; 120*4882a593Smuzhiyun snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>; 121*4882a593Smuzhiyun tx_delay = <0x30>; 122*4882a593Smuzhiyun rx_delay = <0x10>; 123*4882a593Smuzhiyun status = "okay"; 124*4882a593Smuzhiyun}; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun&hdmi { 127*4882a593Smuzhiyun ddc-i2c-bus = <&i2c5>; 128*4882a593Smuzhiyun status = "okay"; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&i2c0 { 132*4882a593Smuzhiyun clock-frequency = <400000>; 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun vdd_cpu: syr827@40 { 136*4882a593Smuzhiyun compatible = "silergy,syr827"; 137*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 138*4882a593Smuzhiyun reg = <0x40>; 139*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 140*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 141*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 142*4882a593Smuzhiyun regulator-always-on; 143*4882a593Smuzhiyun regulator-boot-on; 144*4882a593Smuzhiyun regulator-enable-ramp-delay = <300>; 145*4882a593Smuzhiyun regulator-ramp-delay = <8000>; 146*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun vdd_gpu: syr828@41 { 150*4882a593Smuzhiyun compatible = "silergy,syr828"; 151*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 152*4882a593Smuzhiyun reg = <0x41>; 153*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 154*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 155*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 156*4882a593Smuzhiyun regulator-always-on; 157*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun hym8563: rtc@51 { 161*4882a593Smuzhiyun compatible = "haoyu,hym8563"; 162*4882a593Smuzhiyun reg = <0x51>; 163*4882a593Smuzhiyun #clock-cells = <0>; 164*4882a593Smuzhiyun clock-frequency = <32768>; 165*4882a593Smuzhiyun clock-output-names = "xin32k"; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun act8846: act8846@5a { 169*4882a593Smuzhiyun compatible = "active-semi,act8846"; 170*4882a593Smuzhiyun reg = <0x5a>; 171*4882a593Smuzhiyun pinctrl-names = "default"; 172*4882a593Smuzhiyun pinctrl-0 = <&pmic_vsel>; 173*4882a593Smuzhiyun system-power-controller; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun vp1-supply = <&vcc_sys>; 176*4882a593Smuzhiyun vp2-supply = <&vcc_sys>; 177*4882a593Smuzhiyun vp3-supply = <&vcc_sys>; 178*4882a593Smuzhiyun vp4-supply = <&vcc_sys>; 179*4882a593Smuzhiyun inl1-supply = <&vcc_sys>; 180*4882a593Smuzhiyun inl2-supply = <&vcc_sys>; 181*4882a593Smuzhiyun inl3-supply = <&vcc_20>; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun regulators { 184*4882a593Smuzhiyun vcc_ddr: REG1 { 185*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 186*4882a593Smuzhiyun regulator-always-on; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun vcc_io: REG2 { 190*4882a593Smuzhiyun regulator-name = "vcc_io"; 191*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 192*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 193*4882a593Smuzhiyun regulator-always-on; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun vdd_log: REG3 { 197*4882a593Smuzhiyun regulator-name = "vdd_log"; 198*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 199*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 200*4882a593Smuzhiyun regulator-always-on; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun vcc_20: REG4 { 204*4882a593Smuzhiyun regulator-name = "vcc_20"; 205*4882a593Smuzhiyun regulator-min-microvolt = <2000000>; 206*4882a593Smuzhiyun regulator-max-microvolt = <2000000>; 207*4882a593Smuzhiyun regulator-always-on; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun vccio_sd: REG5 { 211*4882a593Smuzhiyun regulator-name = "vccio_sd"; 212*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 213*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 214*4882a593Smuzhiyun regulator-always-on; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun vdd10_lcd: REG6 { 218*4882a593Smuzhiyun regulator-name = "vdd10_lcd"; 219*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 220*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 221*4882a593Smuzhiyun regulator-always-on; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun vcca_18: REG7 { 225*4882a593Smuzhiyun regulator-name = "vcca_18"; 226*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 227*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun vcca_33: REG8 { 231*4882a593Smuzhiyun regulator-name = "vcca_33"; 232*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 233*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun vcc_lan: REG9 { 237*4882a593Smuzhiyun regulator-name = "vcc_lan"; 238*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 239*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun vdd_10: REG10 { 243*4882a593Smuzhiyun regulator-name = "vdd_10"; 244*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 245*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 246*4882a593Smuzhiyun regulator-always-on; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun vcc_18: REG11 { 250*4882a593Smuzhiyun regulator-name = "vcc_18"; 251*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 252*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 253*4882a593Smuzhiyun regulator-always-on; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun vcc18_lcd: REG12 { 257*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 258*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 259*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 260*4882a593Smuzhiyun regulator-always-on; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun}; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun&i2c1 { 267*4882a593Smuzhiyun status = "okay"; 268*4882a593Smuzhiyun}; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun&i2c2 { 271*4882a593Smuzhiyun status = "okay"; 272*4882a593Smuzhiyun}; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun&i2c4 { 275*4882a593Smuzhiyun status = "okay"; 276*4882a593Smuzhiyun}; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun&i2c5 { 279*4882a593Smuzhiyun status = "okay"; 280*4882a593Smuzhiyun}; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun&io_domains { 283*4882a593Smuzhiyun status = "okay"; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun audio-supply = <&vcca_33>; 286*4882a593Smuzhiyun flash0-supply = <&vcc_flash>; 287*4882a593Smuzhiyun flash1-supply = <&vcc_lan>; 288*4882a593Smuzhiyun gpio30-supply = <&vcc_io>; 289*4882a593Smuzhiyun gpio1830-supply = <&vcc_io>; 290*4882a593Smuzhiyun lcdc-supply = <&vcc_io>; 291*4882a593Smuzhiyun sdcard-supply = <&vccio_sd>; 292*4882a593Smuzhiyun wifi-supply = <&vcc_18>; 293*4882a593Smuzhiyun}; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun&pinctrl { 296*4882a593Smuzhiyun pcfg_output_high: pcfg-output-high { 297*4882a593Smuzhiyun output-high; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun pcfg_output_low: pcfg-output-low { 301*4882a593Smuzhiyun output-low; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma { 305*4882a593Smuzhiyun bias-pull-up; 306*4882a593Smuzhiyun drive-strength = <12>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun act8846 { 310*4882a593Smuzhiyun pmic_int: pmic-int { 311*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun pmic_sleep: pmic-sleep { 315*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_low>; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun pmic_vsel: pmic-vsel { 319*4882a593Smuzhiyun rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>; 320*4882a593Smuzhiyun }; 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun gmac { 324*4882a593Smuzhiyun phy_int: phy-int { 325*4882a593Smuzhiyun rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; 326*4882a593Smuzhiyun }; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun phy_pmeb: phy-pmeb { 329*4882a593Smuzhiyun rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun phy_rst: phy-rst { 333*4882a593Smuzhiyun rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>; 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun }; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun sdmmc { 338*4882a593Smuzhiyun /* 339*4882a593Smuzhiyun * Default drive strength isn't enough to achieve even 340*4882a593Smuzhiyun * high-speed mode on firefly board so bump up to 12ma. 341*4882a593Smuzhiyun */ 342*4882a593Smuzhiyun sdmmc_bus4: sdmmc-bus4 { 343*4882a593Smuzhiyun rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>, 344*4882a593Smuzhiyun <6 RK_PC1 1 &pcfg_pull_up_drv_12ma>, 345*4882a593Smuzhiyun <6 RK_PC2 1 &pcfg_pull_up_drv_12ma>, 346*4882a593Smuzhiyun <6 RK_PC3 1 &pcfg_pull_up_drv_12ma>; 347*4882a593Smuzhiyun }; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun sdmmc_clk: sdmmc-clk { 350*4882a593Smuzhiyun rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun sdmmc_cmd: sdmmc-cmd { 354*4882a593Smuzhiyun rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>; 355*4882a593Smuzhiyun }; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun sdmmc_pwr: sdmmc-pwr { 358*4882a593Smuzhiyun rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun usb_host { 363*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 364*4882a593Smuzhiyun rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun}; 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun&saradc { 370*4882a593Smuzhiyun vref-supply = <&vcc_18>; 371*4882a593Smuzhiyun status = "okay"; 372*4882a593Smuzhiyun}; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun&sdmmc { 375*4882a593Smuzhiyun bus-width = <4>; 376*4882a593Smuzhiyun cap-mmc-highspeed; 377*4882a593Smuzhiyun cap-sd-highspeed; 378*4882a593Smuzhiyun card-detect-delay = <200>; 379*4882a593Smuzhiyun disable-wp; 380*4882a593Smuzhiyun pinctrl-names = "default"; 381*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; 382*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 383*4882a593Smuzhiyun vqmmc-supply = <&vccio_sd>; 384*4882a593Smuzhiyun status = "okay"; 385*4882a593Smuzhiyun}; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun&tsadc { 388*4882a593Smuzhiyun rockchip,hw-tshut-mode = <0>; 389*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <0>; 390*4882a593Smuzhiyun status = "okay"; 391*4882a593Smuzhiyun}; 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun&uart2 { 394*4882a593Smuzhiyun status = "okay"; 395*4882a593Smuzhiyun}; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun&uart3 { 398*4882a593Smuzhiyun status = "okay"; 399*4882a593Smuzhiyun}; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun&usbphy { 402*4882a593Smuzhiyun status = "okay"; 403*4882a593Smuzhiyun}; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun&usb_host1 { 406*4882a593Smuzhiyun status = "okay"; 407*4882a593Smuzhiyun}; 408*4882a593Smuzhiyun 409*4882a593Smuzhiyun&usb_otg { 410*4882a593Smuzhiyun /* 411*4882a593Smuzhiyun * The otg controller is the only system power source, 412*4882a593Smuzhiyun * so needs to always stay in device mode. 413*4882a593Smuzhiyun */ 414*4882a593Smuzhiyun dr_mode = "peripheral"; 415*4882a593Smuzhiyun status = "okay"; 416*4882a593Smuzhiyun}; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun&vopb { 419*4882a593Smuzhiyun status = "okay"; 420*4882a593Smuzhiyun}; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun&vopb_mmu { 423*4882a593Smuzhiyun status = "okay"; 424*4882a593Smuzhiyun}; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun&vopl { 427*4882a593Smuzhiyun status = "okay"; 428*4882a593Smuzhiyun}; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun&vopl_mmu { 431*4882a593Smuzhiyun status = "okay"; 432*4882a593Smuzhiyun}; 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun&wdt { 435*4882a593Smuzhiyun status = "okay"; 436*4882a593Smuzhiyun}; 437