1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 3*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 4*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 5*4882a593Smuzhiyun * whole. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 8*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 9*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 10*4882a593Smuzhiyun * License, or (at your option) any later version. 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 13*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 14*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15*4882a593Smuzhiyun * GNU General Public License for more details. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * Or, alternatively, 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 20*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 21*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 22*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 23*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 24*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 25*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 26*4882a593Smuzhiyun * conditions: 27*4882a593Smuzhiyun * 28*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 29*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 30*4882a593Smuzhiyun * 31*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 32*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 33*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 34*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 35*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 36*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 37*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 38*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun/dts-v1/; 42*4882a593Smuzhiyun#include "rk3288-evb.dtsi" 43*4882a593Smuzhiyun#include "rk3288-linux.dtsi" 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun/ { 46*4882a593Smuzhiyun compatible = "rockchip,rk3288-evb-rk808-linux", "rockchip,rk3288"; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun adc-keys { 49*4882a593Smuzhiyun compatible = "adc-keys"; 50*4882a593Smuzhiyun io-channels = <&saradc 1>; 51*4882a593Smuzhiyun io-channel-names = "buttons"; 52*4882a593Smuzhiyun poll-interval = <100>; 53*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun button-up { 56*4882a593Smuzhiyun label = "Volume Up"; 57*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 58*4882a593Smuzhiyun press-threshold-microvolt = <18000>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun button-down { 62*4882a593Smuzhiyun label = "Volume Down"; 63*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 64*4882a593Smuzhiyun press-threshold-microvolt = <300000>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun menu { 68*4882a593Smuzhiyun label = "Menu"; 69*4882a593Smuzhiyun linux,code = <KEY_MENU>; 70*4882a593Smuzhiyun press-threshold-microvolt = <640000>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun esc { 74*4882a593Smuzhiyun label = "Esc"; 75*4882a593Smuzhiyun linux,code = <KEY_ESC>; 76*4882a593Smuzhiyun press-threshold-microvolt = <1000000>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun home { 80*4882a593Smuzhiyun label = "Home"; 81*4882a593Smuzhiyun linux,code = <KEY_HOME>; 82*4882a593Smuzhiyun press-threshold-microvolt = <1300000>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 87*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 88*4882a593Smuzhiyun clocks = <&rk808 1>; 89*4882a593Smuzhiyun clock-names = "ext_clock"; 90*4882a593Smuzhiyun pinctrl-names = "default"; 91*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* 94*4882a593Smuzhiyun * On the module itself this is one of these (depending 95*4882a593Smuzhiyun * on the actual card populated): 96*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 97*4882a593Smuzhiyun * - PDN (power down when low) 98*4882a593Smuzhiyun */ 99*4882a593Smuzhiyun reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun wireless-bluetooth { 103*4882a593Smuzhiyun clocks = <&rk808 1>; 104*4882a593Smuzhiyun clock-names = "ext_clock"; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /delete-node/ sdmmc-regulator; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun vcc18_dvp: vcc18-dvp { 110*4882a593Smuzhiyun compatible = "regulator-fixed"; 111*4882a593Smuzhiyun regulator-name = "vcc18_dvp"; 112*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 113*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 114*4882a593Smuzhiyun gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 115*4882a593Smuzhiyun enable-active-high; 116*4882a593Smuzhiyun regulator-always-on; 117*4882a593Smuzhiyun vin-supply = <&vcc_io>; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun vdd_log: vdd-logic { 121*4882a593Smuzhiyun compatible = "pwm-regulator"; 122*4882a593Smuzhiyun rockchip,pwm_id = <1>; 123*4882a593Smuzhiyun rockchip,pwm_voltage = <1100000>; 124*4882a593Smuzhiyun pwms = <&pwm1 0 25000 1>; 125*4882a593Smuzhiyun regulator-name = "vcc_log"; 126*4882a593Smuzhiyun regulator-min-microvolt = <860000>; 127*4882a593Smuzhiyun regulator-max-microvolt = <1360000>; 128*4882a593Smuzhiyun regulator-always-on; 129*4882a593Smuzhiyun regulator-boot-on; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun xin32k: xin32k { 133*4882a593Smuzhiyun compatible = "fixed-clock"; 134*4882a593Smuzhiyun clock-frequency = <32768>; 135*4882a593Smuzhiyun clock-output-names = "xin32k"; 136*4882a593Smuzhiyun #clock-cells = <0>; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&backlight { 141*4882a593Smuzhiyun enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; 142*4882a593Smuzhiyun pinctrl-names = "default"; 143*4882a593Smuzhiyun pinctrl-0 = <&bl_en>; 144*4882a593Smuzhiyun pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>; 145*4882a593Smuzhiyun}; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun&cpu0 { 148*4882a593Smuzhiyun cpu0-supply = <&vdd_cpu>; 149*4882a593Smuzhiyun}; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun&dfi { 152*4882a593Smuzhiyun status = "okay"; 153*4882a593Smuzhiyun}; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun&dmc { 156*4882a593Smuzhiyun center-supply = <&vdd_log>; 157*4882a593Smuzhiyun status = "okay"; 158*4882a593Smuzhiyun}; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun&edp_in_vopb { 161*4882a593Smuzhiyun status = "disabled"; 162*4882a593Smuzhiyun}; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun&edp_in_vopl { 165*4882a593Smuzhiyun status = "okay"; 166*4882a593Smuzhiyun}; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun&gpu { 169*4882a593Smuzhiyun status = "okay"; 170*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 171*4882a593Smuzhiyun}; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun&hdmi { 174*4882a593Smuzhiyun pinctrl-0 = <&hdmi_ddc>, <&hdmi_cec_c0>; 175*4882a593Smuzhiyun}; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun&i2c0 { 178*4882a593Smuzhiyun clock-frequency = <400000>; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun rk808: pmic@1b { 181*4882a593Smuzhiyun compatible = "rockchip,rk808"; 182*4882a593Smuzhiyun reg = <0x1b>; 183*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 184*4882a593Smuzhiyun interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 185*4882a593Smuzhiyun pinctrl-names = "default"; 186*4882a593Smuzhiyun pinctrl-0 = <&pmic_int &global_pwroff>; 187*4882a593Smuzhiyun rockchip,system-power-controller; 188*4882a593Smuzhiyun wakeup-source; 189*4882a593Smuzhiyun #clock-cells = <1>; 190*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 193*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 194*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 195*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 196*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 197*4882a593Smuzhiyun vcc8-supply = <&vcc_io>; 198*4882a593Smuzhiyun vcc9-supply = <&vcc_io>; 199*4882a593Smuzhiyun vcc12-supply = <&vcc_io>; 200*4882a593Smuzhiyun vddio-supply = <&vcc_io>; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun regulators { 203*4882a593Smuzhiyun vdd_cpu: DCDC_REG1 { 204*4882a593Smuzhiyun regulator-always-on; 205*4882a593Smuzhiyun regulator-boot-on; 206*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 207*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 208*4882a593Smuzhiyun regulator-name = "vdd_arm"; 209*4882a593Smuzhiyun regulator-state-mem { 210*4882a593Smuzhiyun regulator-off-in-suspend; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun vdd_gpu: DCDC_REG2 { 215*4882a593Smuzhiyun regulator-always-on; 216*4882a593Smuzhiyun regulator-boot-on; 217*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 218*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 219*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 220*4882a593Smuzhiyun regulator-ramp-delay = <6000>; 221*4882a593Smuzhiyun regulator-state-mem { 222*4882a593Smuzhiyun regulator-off-in-suspend; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 227*4882a593Smuzhiyun regulator-always-on; 228*4882a593Smuzhiyun regulator-boot-on; 229*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 230*4882a593Smuzhiyun regulator-state-mem { 231*4882a593Smuzhiyun regulator-on-in-suspend; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 236*4882a593Smuzhiyun regulator-always-on; 237*4882a593Smuzhiyun regulator-boot-on; 238*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 239*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 240*4882a593Smuzhiyun regulator-name = "vcc_io"; 241*4882a593Smuzhiyun regulator-state-mem { 242*4882a593Smuzhiyun regulator-on-in-suspend; 243*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun vcc_tp: LDO_REG1 { 248*4882a593Smuzhiyun regulator-always-on; 249*4882a593Smuzhiyun regulator-boot-on; 250*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 251*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 252*4882a593Smuzhiyun regulator-name = "vcc_tp"; 253*4882a593Smuzhiyun regulator-state-mem { 254*4882a593Smuzhiyun regulator-off-in-suspend; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun vcca_codec: LDO_REG2 { 259*4882a593Smuzhiyun regulator-always-on; 260*4882a593Smuzhiyun regulator-boot-on; 261*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 262*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 263*4882a593Smuzhiyun regulator-name = "vcca_codec"; 264*4882a593Smuzhiyun regulator-state-mem { 265*4882a593Smuzhiyun regulator-off-in-suspend; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun vdd_10: LDO_REG3 { 270*4882a593Smuzhiyun regulator-always-on; 271*4882a593Smuzhiyun regulator-boot-on; 272*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 273*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 274*4882a593Smuzhiyun regulator-name = "vdd_10"; 275*4882a593Smuzhiyun regulator-state-mem { 276*4882a593Smuzhiyun regulator-on-in-suspend; 277*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun vcc_wl: LDO_REG4 { 282*4882a593Smuzhiyun regulator-always-on; 283*4882a593Smuzhiyun regulator-boot-on; 284*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 285*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 286*4882a593Smuzhiyun regulator-name = "vcc_wl"; 287*4882a593Smuzhiyun regulator-state-mem { 288*4882a593Smuzhiyun regulator-off-in-suspend; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun vccio_sd: LDO_REG5 { 293*4882a593Smuzhiyun regulator-always-on; 294*4882a593Smuzhiyun regulator-boot-on; 295*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 296*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 297*4882a593Smuzhiyun regulator-name = "vccio_sd"; 298*4882a593Smuzhiyun regulator-state-mem { 299*4882a593Smuzhiyun regulator-on-in-suspend; 300*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun vdd10_lcd: LDO_REG6 { 305*4882a593Smuzhiyun regulator-always-on; 306*4882a593Smuzhiyun regulator-boot-on; 307*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 308*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 309*4882a593Smuzhiyun regulator-name = "vdd10_lcd"; 310*4882a593Smuzhiyun regulator-state-mem { 311*4882a593Smuzhiyun regulator-off-in-suspend; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun vcc_18: LDO_REG7 { 316*4882a593Smuzhiyun regulator-always-on; 317*4882a593Smuzhiyun regulator-boot-on; 318*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 319*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 320*4882a593Smuzhiyun regulator-name = "vcc_18"; 321*4882a593Smuzhiyun regulator-state-mem { 322*4882a593Smuzhiyun regulator-on-in-suspend; 323*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun vcc18_lcd: LDO_REG8 { 328*4882a593Smuzhiyun regulator-always-on; 329*4882a593Smuzhiyun regulator-boot-on; 330*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 331*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 332*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 333*4882a593Smuzhiyun regulator-state-mem { 334*4882a593Smuzhiyun regulator-off-in-suspend; 335*4882a593Smuzhiyun }; 336*4882a593Smuzhiyun }; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun vcc_sd: SWITCH_REG1 { 339*4882a593Smuzhiyun regulator-always-on; 340*4882a593Smuzhiyun regulator-boot-on; 341*4882a593Smuzhiyun regulator-name = "vcc_sd"; 342*4882a593Smuzhiyun regulator-state-mem { 343*4882a593Smuzhiyun regulator-on-in-suspend; 344*4882a593Smuzhiyun }; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun vcc_lcd: SWITCH_REG2 { 348*4882a593Smuzhiyun regulator-always-on; 349*4882a593Smuzhiyun regulator-boot-on; 350*4882a593Smuzhiyun regulator-name = "vcc_lcd"; 351*4882a593Smuzhiyun regulator-state-mem { 352*4882a593Smuzhiyun regulator-off-in-suspend; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun }; 355*4882a593Smuzhiyun }; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun CW2015@62 { 359*4882a593Smuzhiyun compatible = "cw201x"; 360*4882a593Smuzhiyun reg = <0x62>; 361*4882a593Smuzhiyun bat_low_gpio = <&gpio0 7 GPIO_ACTIVE_LOW>; 362*4882a593Smuzhiyun dc_det_gpio = <&gpio0 8 GPIO_ACTIVE_LOW>; 363*4882a593Smuzhiyun chg_ok_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; 364*4882a593Smuzhiyun bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32 365*4882a593Smuzhiyun 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52 366*4882a593Smuzhiyun 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB 367*4882a593Smuzhiyun 0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>; 368*4882a593Smuzhiyun is_dc_charge = <1>; 369*4882a593Smuzhiyun is_usb_charge = <0>; 370*4882a593Smuzhiyun monitor_sec = <5>; 371*4882a593Smuzhiyun virtual_power = <0>; 372*4882a593Smuzhiyun divider_res1 = <200>; 373*4882a593Smuzhiyun divider_res2 = <200>; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun}; 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun&i2c1 { 378*4882a593Smuzhiyun status = "okay"; 379*4882a593Smuzhiyun clock-frequency = <400000>; 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun mpu6050@68 { 382*4882a593Smuzhiyun compatible = "invensense,mpu6050"; 383*4882a593Smuzhiyun status = "okay"; 384*4882a593Smuzhiyun pinctrl-names = "default"; 385*4882a593Smuzhiyun pinctrl-0 = <&mpu6050_irq_gpio>; 386*4882a593Smuzhiyun reg = <0x68>; 387*4882a593Smuzhiyun irq-gpio = <&gpio8 0 IRQ_TYPE_EDGE_RISING>; 388*4882a593Smuzhiyun mpu-int_config = <0x10>; 389*4882a593Smuzhiyun mpu-level_shifter = <0>; 390*4882a593Smuzhiyun mpu-orientation = <0 1 0 1 0 0 0 0 1>; 391*4882a593Smuzhiyun orientation-x= <0>; 392*4882a593Smuzhiyun orientation-y= <1>; 393*4882a593Smuzhiyun orientation-z= <0>; 394*4882a593Smuzhiyun support-hw-poweroff = <1>; 395*4882a593Smuzhiyun mpu-debug = <1>; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun ak8963: compass@d{ 399*4882a593Smuzhiyun compatible = "mpu_ak8963"; 400*4882a593Smuzhiyun reg = <0x0d>; 401*4882a593Smuzhiyun compass-bus = <0>; 402*4882a593Smuzhiyun compass-adapt_num = <0>; 403*4882a593Smuzhiyun compass-orientation = <1 0 0 0 1 0 0 0 1>; 404*4882a593Smuzhiyun orientation-x= <0>; 405*4882a593Smuzhiyun orientation-y= <0>; 406*4882a593Smuzhiyun orientation-z= <1>; 407*4882a593Smuzhiyun compass-debug = <1>; 408*4882a593Smuzhiyun status = "okay"; 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun}; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun&io_domains { 413*4882a593Smuzhiyun status = "okay"; 414*4882a593Smuzhiyun audio-supply = <&vcc_io>; 415*4882a593Smuzhiyun bb-supply = <&vcc_io>; 416*4882a593Smuzhiyun dvp-supply = <&vcc18_dvp>; 417*4882a593Smuzhiyun flash0-supply = <&vcc_18>; 418*4882a593Smuzhiyun flash1-supply = <&vcc_io>; 419*4882a593Smuzhiyun gpio30-supply = <&vcc_io>; 420*4882a593Smuzhiyun gpio1830 = <&vcc_io>; 421*4882a593Smuzhiyun lcdc-supply = <&vcc_lcd>; 422*4882a593Smuzhiyun sdcard-supply = <&vccio_sd>; 423*4882a593Smuzhiyun wifi-supply = <&vcc_wl>; 424*4882a593Smuzhiyun}; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun&i2c3 { 427*4882a593Smuzhiyun status = "okay"; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun ov13850: ov13850@10 { 430*4882a593Smuzhiyun compatible = "ovti,ov13850"; 431*4882a593Smuzhiyun reg = <0x10>; 432*4882a593Smuzhiyun clocks = <&cru SCLK_VIP_OUT>; 433*4882a593Smuzhiyun clock-names = "xvclk"; 434*4882a593Smuzhiyun /* avdd-supply = <>; */ 435*4882a593Smuzhiyun /* dvdd-supply = <>; */ 436*4882a593Smuzhiyun /* dovdd-supply = <>; */ 437*4882a593Smuzhiyun /* reset-gpios = <>; */ 438*4882a593Smuzhiyun pinctrl-names = "rockchip,camera_default"; 439*4882a593Smuzhiyun pinctrl-0 = <&isp_mipi>; 440*4882a593Smuzhiyun power-gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 441*4882a593Smuzhiyun reset-gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>; 442*4882a593Smuzhiyun pwdn-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 443*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 444*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 445*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-CT0116"; 446*4882a593Smuzhiyun rockchip,camera-module-lens-name = "Largan-50013A1"; 447*4882a593Smuzhiyun port { 448*4882a593Smuzhiyun ov13850_out: endpoint { 449*4882a593Smuzhiyun remote-endpoint = <&mipi_in_ucam0>; 450*4882a593Smuzhiyun data-lanes = <1 2>; 451*4882a593Smuzhiyun }; 452*4882a593Smuzhiyun }; 453*4882a593Smuzhiyun }; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun gc8034: gc8034@37 { 456*4882a593Smuzhiyun compatible = "galaxycore,gc8034"; 457*4882a593Smuzhiyun status = "okay"; 458*4882a593Smuzhiyun reg = <0x37>; 459*4882a593Smuzhiyun clocks = <&cru SCLK_VIP_OUT>; 460*4882a593Smuzhiyun clock-names = "xvclk"; 461*4882a593Smuzhiyun pinctrl-names = "rockchip,camera_default"; 462*4882a593Smuzhiyun pinctrl-0 = <&isp_mipi>; 463*4882a593Smuzhiyun power-gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 464*4882a593Smuzhiyun reset-gpios = <&gpio7 RK_PC5 GPIO_ACTIVE_LOW>; 465*4882a593Smuzhiyun pwdn-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>; 466*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 467*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 468*4882a593Smuzhiyun rockchip,camera-module-name = "LH-RK-8034-v1.0"; 469*4882a593Smuzhiyun rockchip,camera-module-lens-name = "CK8401"; 470*4882a593Smuzhiyun port { 471*4882a593Smuzhiyun gc8034_out: endpoint { 472*4882a593Smuzhiyun remote-endpoint = <&mipi_in_gc8034>; 473*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 474*4882a593Smuzhiyun }; 475*4882a593Smuzhiyun }; 476*4882a593Smuzhiyun }; 477*4882a593Smuzhiyun}; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun&isp_mmu { 480*4882a593Smuzhiyun status = "okay"; 481*4882a593Smuzhiyun}; 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun&mipi_phy_rx0 { 484*4882a593Smuzhiyun status = "okay"; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun ports { 487*4882a593Smuzhiyun #address-cells = <1>; 488*4882a593Smuzhiyun #size-cells = <0>; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun port@0 { 491*4882a593Smuzhiyun reg = <0>; 492*4882a593Smuzhiyun #address-cells = <1>; 493*4882a593Smuzhiyun #size-cells = <0>; 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun mipi_in_ucam0: endpoint@1 { 496*4882a593Smuzhiyun reg = <1>; 497*4882a593Smuzhiyun remote-endpoint = <&ov13850_out>; 498*4882a593Smuzhiyun data-lanes = <1 2>; 499*4882a593Smuzhiyun }; 500*4882a593Smuzhiyun mipi_in_gc8034: endpoint@0 { 501*4882a593Smuzhiyun reg = <0>; 502*4882a593Smuzhiyun remote-endpoint = <&gc8034_out>; 503*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 504*4882a593Smuzhiyun }; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun 507*4882a593Smuzhiyun port@1 { 508*4882a593Smuzhiyun reg = <1>; 509*4882a593Smuzhiyun #address-cells = <1>; 510*4882a593Smuzhiyun #size-cells = <0>; 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun dphy_rx_out: endpoint@0 { 513*4882a593Smuzhiyun reg = <0>; 514*4882a593Smuzhiyun remote-endpoint = <&isp_mipi_in>; 515*4882a593Smuzhiyun }; 516*4882a593Smuzhiyun }; 517*4882a593Smuzhiyun }; 518*4882a593Smuzhiyun}; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun&rkisp1 { 521*4882a593Smuzhiyun status = "okay"; 522*4882a593Smuzhiyun port { 523*4882a593Smuzhiyun #address-cells = <1>; 524*4882a593Smuzhiyun #size-cells = <0>; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun isp_mipi_in: endpoint@0 { 527*4882a593Smuzhiyun reg = <0>; 528*4882a593Smuzhiyun remote-endpoint = <&dphy_rx_out>; 529*4882a593Smuzhiyun }; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun }; 532*4882a593Smuzhiyun}; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun&rga { 535*4882a593Smuzhiyun status = "okay"; 536*4882a593Smuzhiyun}; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun&route_edp { 539*4882a593Smuzhiyun status = "okay"; 540*4882a593Smuzhiyun}; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun&route_hdmi { 543*4882a593Smuzhiyun status = "okay"; 544*4882a593Smuzhiyun}; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun&uart2 { 547*4882a593Smuzhiyun status = "disabled"; 548*4882a593Smuzhiyun}; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun&pwm0 { 551*4882a593Smuzhiyun status = "okay"; 552*4882a593Smuzhiyun}; 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun&pwm1 { 555*4882a593Smuzhiyun pinctrl-names = "active"; 556*4882a593Smuzhiyun pinctrl-0 = <&pwm1_pin_pull_down>; 557*4882a593Smuzhiyun status = "okay"; 558*4882a593Smuzhiyun}; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun&pinctrl { 561*4882a593Smuzhiyun backlight { 562*4882a593Smuzhiyun bl_en: bl-en { 563*4882a593Smuzhiyun rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 564*4882a593Smuzhiyun }; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun buttons { 568*4882a593Smuzhiyun pwrbtn: pwrbtn { 569*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 570*4882a593Smuzhiyun }; 571*4882a593Smuzhiyun }; 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun mpu6050 { 574*4882a593Smuzhiyun mpu6050_irq_gpio: mpu6050-irq-gpio { 575*4882a593Smuzhiyun rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 576*4882a593Smuzhiyun }; 577*4882a593Smuzhiyun }; 578*4882a593Smuzhiyun}; 579