1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 5*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 6*4882a593Smuzhiyun#include "rk3288.dtsi" 7*4882a593Smuzhiyun#include "rk3288-android.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "Rockchip RK3288 EVB RK628 Board"; 11*4882a593Smuzhiyun compatible = "rockchip,rk3288-evb-rk628", "rockchip,rk3288"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun chosen: chosen { 14*4882a593Smuzhiyun bootargs = "rootwait earlycon=uart8250,mmio32,0xff690000 vmalloc=496M console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0"; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun adc-keys { 18*4882a593Smuzhiyun compatible = "adc-keys"; 19*4882a593Smuzhiyun io-channels = <&saradc 1>; 20*4882a593Smuzhiyun io-channel-names = "buttons"; 21*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 22*4882a593Smuzhiyun poll-interval = <100>; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun vol-up-key { 25*4882a593Smuzhiyun label = "volume up"; 26*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 27*4882a593Smuzhiyun press-threshold-microvolt = <1000>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun vol-down-key { 31*4882a593Smuzhiyun label = "volume down"; 32*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 33*4882a593Smuzhiyun press-threshold-microvolt = <170000>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun menu { 37*4882a593Smuzhiyun label = "menu"; 38*4882a593Smuzhiyun linux,code = <KEY_MENU>; 39*4882a593Smuzhiyun press-threshold-microvolt = <640000>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun esc { 43*4882a593Smuzhiyun label = "esc"; 44*4882a593Smuzhiyun linux,code = <KEY_ESC>; 45*4882a593Smuzhiyun press-threshold-microvolt = <1000000>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun home { 49*4882a593Smuzhiyun label = "home"; 50*4882a593Smuzhiyun linux,code = <KEY_HOME>; 51*4882a593Smuzhiyun press-threshold-microvolt = <1300000>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun backlight: backlight { 56*4882a593Smuzhiyun compatible = "pwm-backlight"; 57*4882a593Smuzhiyun pwms = <&pwm0 0 1000000 0>; 58*4882a593Smuzhiyun brightness-levels = < 59*4882a593Smuzhiyun 0 1 2 3 4 5 6 7 60*4882a593Smuzhiyun 8 9 10 11 12 13 14 15 61*4882a593Smuzhiyun 16 17 18 19 20 21 22 23 62*4882a593Smuzhiyun 24 25 26 27 28 29 30 31 63*4882a593Smuzhiyun 32 33 34 35 36 37 38 39 64*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 65*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 66*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 67*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 68*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 69*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 70*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 71*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 72*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 73*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 74*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 75*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 76*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 77*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 78*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 79*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 80*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 81*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 82*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 83*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 84*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 85*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 86*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 87*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 88*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 89*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 90*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 91*4882a593Smuzhiyun default-brightness-level = <128>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun i2s_mclkin: i2s-mclkin { 95*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 96*4882a593Smuzhiyun #clock-cells = <0>; 97*4882a593Smuzhiyun clocks = <&cru SCLK_I2S0_OUT>; 98*4882a593Smuzhiyun clock-mult = <1>; 99*4882a593Smuzhiyun clock-div = <1>; 100*4882a593Smuzhiyun clock-output-names = "i2s_mclkin"; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun sound: sound { 104*4882a593Smuzhiyun compatible = "simple-audio-card"; 105*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 106*4882a593Smuzhiyun simple-audio-card,name = "realtek,rt5651-codec"; 107*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 108*4882a593Smuzhiyun simple-audio-card,widgets = 109*4882a593Smuzhiyun "Microphone", "Microphone Jack", 110*4882a593Smuzhiyun "Headphone", "Headphone Jack"; 111*4882a593Smuzhiyun simple-audio-card,routing = 112*4882a593Smuzhiyun "MIC1", "Microphone Jack", 113*4882a593Smuzhiyun "MIC2", "Microphone Jack", 114*4882a593Smuzhiyun "Microphone Jack", "micbias1", 115*4882a593Smuzhiyun "Headphone Jack", "HPOL", 116*4882a593Smuzhiyun "Headphone Jack", "HPOR"; 117*4882a593Smuzhiyun status = "disabled"; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun simple-audio-card,dai-link@0 { 120*4882a593Smuzhiyun format = "i2s"; 121*4882a593Smuzhiyun cpu { 122*4882a593Smuzhiyun sound-dai = <&i2s>; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun codec { 126*4882a593Smuzhiyun sound-dai = <&rt5651>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun simple-audio-card,dai-link@1 { 131*4882a593Smuzhiyun format = "i2s"; 132*4882a593Smuzhiyun cpu { 133*4882a593Smuzhiyun sound-dai = <&i2s>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun codec { 137*4882a593Smuzhiyun sound-dai = <&rk628_hdmi>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun vcc_host: vcc-host-regulator { 143*4882a593Smuzhiyun compatible = "regulator-fixed"; 144*4882a593Smuzhiyun enable-active-high; 145*4882a593Smuzhiyun gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 146*4882a593Smuzhiyun pinctrl-names = "default"; 147*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 148*4882a593Smuzhiyun regulator-name = "vcc_host"; 149*4882a593Smuzhiyun regulator-always-on; 150*4882a593Smuzhiyun regulator-boot-on; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun vcc_sys: vsys-regulator { 154*4882a593Smuzhiyun compatible = "regulator-fixed"; 155*4882a593Smuzhiyun regulator-name = "vcc_sys"; 156*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 157*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 158*4882a593Smuzhiyun regulator-always-on; 159*4882a593Smuzhiyun regulator-boot-on; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun vdd_log: vdd-logic { 163*4882a593Smuzhiyun compatible = "pwm-regulator"; 164*4882a593Smuzhiyun rockchip,pwm_id = <1>; 165*4882a593Smuzhiyun rockchip,pwm_voltage = <1100000>; 166*4882a593Smuzhiyun pwms = <&pwm1 0 25000 1>; 167*4882a593Smuzhiyun regulator-name = "vcc_log"; 168*4882a593Smuzhiyun regulator-min-microvolt = <860000>; 169*4882a593Smuzhiyun regulator-max-microvolt = <1360000>; 170*4882a593Smuzhiyun regulator-always-on; 171*4882a593Smuzhiyun regulator-boot-on; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun xin32k: xin32k { 175*4882a593Smuzhiyun compatible = "fixed-clock"; 176*4882a593Smuzhiyun clock-frequency = <32768>; 177*4882a593Smuzhiyun clock-output-names = "xin32k"; 178*4882a593Smuzhiyun #clock-cells = <0>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun&backlight { 183*4882a593Smuzhiyun /delete-property/ enable-gpios; 184*4882a593Smuzhiyun}; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun&cpu0 { 187*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 188*4882a593Smuzhiyun}; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun&dfi { 191*4882a593Smuzhiyun status = "okay"; 192*4882a593Smuzhiyun}; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun&dmc { 195*4882a593Smuzhiyun center-supply = <&vdd_log>; 196*4882a593Smuzhiyun status = "okay"; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&gpu { 200*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 201*4882a593Smuzhiyun status = "okay"; 202*4882a593Smuzhiyun}; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun&i2c0 { 205*4882a593Smuzhiyun clock-frequency = <400000>; 206*4882a593Smuzhiyun status = "okay"; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun rk808: pmic@1b { 209*4882a593Smuzhiyun compatible = "rockchip,rk808"; 210*4882a593Smuzhiyun reg = <0x1b>; 211*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 212*4882a593Smuzhiyun interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 213*4882a593Smuzhiyun pinctrl-names = "default"; 214*4882a593Smuzhiyun pinctrl-0 = <&pmic_int &global_pwroff>; 215*4882a593Smuzhiyun rockchip,system-power-controller; 216*4882a593Smuzhiyun wakeup-source; 217*4882a593Smuzhiyun #clock-cells = <1>; 218*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 219*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 220*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 221*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 222*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 223*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 224*4882a593Smuzhiyun vcc8-supply = <&vcc_io>; 225*4882a593Smuzhiyun vcc9-supply = <&vcc_io>; 226*4882a593Smuzhiyun vcc12-supply = <&vcc_io>; 227*4882a593Smuzhiyun vddio-supply = <&vcc_io>; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun regulators { 230*4882a593Smuzhiyun vdd_cpu: DCDC_REG1 { 231*4882a593Smuzhiyun regulator-always-on; 232*4882a593Smuzhiyun regulator-boot-on; 233*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 234*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 235*4882a593Smuzhiyun regulator-name = "vdd_arm"; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun regulator-state-mem { 238*4882a593Smuzhiyun regulator-off-in-suspend; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun vdd_gpu: DCDC_REG2 { 243*4882a593Smuzhiyun regulator-always-on; 244*4882a593Smuzhiyun regulator-boot-on; 245*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 246*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 247*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 248*4882a593Smuzhiyun regulator-ramp-delay = <6000>; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun regulator-state-mem { 251*4882a593Smuzhiyun regulator-off-in-suspend; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 256*4882a593Smuzhiyun regulator-always-on; 257*4882a593Smuzhiyun regulator-boot-on; 258*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun regulator-state-mem { 261*4882a593Smuzhiyun regulator-on-in-suspend; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 266*4882a593Smuzhiyun regulator-always-on; 267*4882a593Smuzhiyun regulator-boot-on; 268*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 269*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 270*4882a593Smuzhiyun regulator-name = "vcc_io"; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun regulator-state-mem { 273*4882a593Smuzhiyun regulator-on-in-suspend; 274*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun vcc_tp: LDO_REG1 { 279*4882a593Smuzhiyun regulator-always-on; 280*4882a593Smuzhiyun regulator-boot-on; 281*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 282*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 283*4882a593Smuzhiyun regulator-name = "vcc_tp"; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun regulator-state-mem { 286*4882a593Smuzhiyun regulator-off-in-suspend; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun vcca_codec: LDO_REG2 { 291*4882a593Smuzhiyun regulator-always-on; 292*4882a593Smuzhiyun regulator-boot-on; 293*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 294*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 295*4882a593Smuzhiyun regulator-name = "vcca_codec"; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun regulator-state-mem { 298*4882a593Smuzhiyun regulator-on-in-suspend; 299*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun vdd_10: LDO_REG3 { 304*4882a593Smuzhiyun regulator-always-on; 305*4882a593Smuzhiyun regulator-boot-on; 306*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 307*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 308*4882a593Smuzhiyun regulator-name = "vdd_10"; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun regulator-state-mem { 311*4882a593Smuzhiyun regulator-on-in-suspend; 312*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun vccio_wl: LDO_REG4 { 317*4882a593Smuzhiyun regulator-always-on; 318*4882a593Smuzhiyun regulator-boot-on; 319*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 320*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 321*4882a593Smuzhiyun regulator-name = "vccio_wl"; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun regulator-state-mem { 324*4882a593Smuzhiyun regulator-on-in-suspend; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun }; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun vccio_sd: LDO_REG5 { 329*4882a593Smuzhiyun regulator-always-on; 330*4882a593Smuzhiyun regulator-boot-on; 331*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 332*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 333*4882a593Smuzhiyun regulator-name = "vccio_sd"; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun regulator-state-mem { 336*4882a593Smuzhiyun regulator-off-in-suspend; 337*4882a593Smuzhiyun }; 338*4882a593Smuzhiyun }; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun vdd10_lcd: LDO_REG6 { 341*4882a593Smuzhiyun regulator-always-on; 342*4882a593Smuzhiyun regulator-boot-on; 343*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 344*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 345*4882a593Smuzhiyun regulator-name = "vdd10_lcd"; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun regulator-state-mem { 348*4882a593Smuzhiyun regulator-off-in-suspend; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun }; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun vcc_18: LDO_REG7 { 353*4882a593Smuzhiyun regulator-always-on; 354*4882a593Smuzhiyun regulator-boot-on; 355*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 356*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 357*4882a593Smuzhiyun regulator-name = "vcc_18"; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun regulator-state-mem { 360*4882a593Smuzhiyun regulator-on-in-suspend; 361*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun vcc18_lcd: LDO_REG8 { 366*4882a593Smuzhiyun regulator-always-on; 367*4882a593Smuzhiyun regulator-boot-on; 368*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 369*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 370*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun regulator-state-mem { 373*4882a593Smuzhiyun regulator-off-in-suspend; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun }; 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun vcc_sd: SWITCH_REG1 { 378*4882a593Smuzhiyun regulator-always-on; 379*4882a593Smuzhiyun regulator-boot-on; 380*4882a593Smuzhiyun regulator-name = "vcc_sd"; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun regulator-state-mem { 383*4882a593Smuzhiyun regulator-off-in-suspend; 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun vcc_lcd: SWITCH_REG2 { 388*4882a593Smuzhiyun regulator-always-on; 389*4882a593Smuzhiyun regulator-boot-on; 390*4882a593Smuzhiyun regulator-name = "vcc_lcd"; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun regulator-state-mem { 393*4882a593Smuzhiyun regulator-off-in-suspend; 394*4882a593Smuzhiyun }; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun}; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun&i2c1 { 401*4882a593Smuzhiyun clock-frequency = <400000>; 402*4882a593Smuzhiyun status = "okay"; 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun rk628: rk628@50 { 405*4882a593Smuzhiyun reg = <0x50>; 406*4882a593Smuzhiyun interrupt-parent = <&gpio7>; 407*4882a593Smuzhiyun interrupts = <15 IRQ_TYPE_LEVEL_HIGH>; 408*4882a593Smuzhiyun enable-gpios = <&gpio5 RK_PC2 GPIO_ACTIVE_HIGH>; 409*4882a593Smuzhiyun reset-gpios = <&gpio7 RK_PB6 GPIO_ACTIVE_LOW>; 410*4882a593Smuzhiyun status = "okay"; 411*4882a593Smuzhiyun }; 412*4882a593Smuzhiyun}; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun&i2c2 { 415*4882a593Smuzhiyun status = "okay"; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun rt5651: rt5651@1a { 418*4882a593Smuzhiyun compatible = "rockchip,rt5651"; 419*4882a593Smuzhiyun reg = <0x1a>; 420*4882a593Smuzhiyun clocks = <&cru SCLK_I2S0_OUT>; 421*4882a593Smuzhiyun clock-names = "mclk"; 422*4882a593Smuzhiyun pinctrl-names = "default"; 423*4882a593Smuzhiyun pinctrl-0 = <&i2s0_mclk>; 424*4882a593Smuzhiyun spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; 425*4882a593Smuzhiyun hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>; 426*4882a593Smuzhiyun #sound-dai-cells = <0>; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun}; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun&i2s { 431*4882a593Smuzhiyun #sound-dai-cells = <0>; 432*4882a593Smuzhiyun status = "okay"; 433*4882a593Smuzhiyun}; 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun#include "rk628.dtsi" 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun&io_domains { 438*4882a593Smuzhiyun audio-supply = <&vcc_io>; 439*4882a593Smuzhiyun bb-supply = <&vcc_io>; 440*4882a593Smuzhiyun dvp-supply = <&vcc_io>; 441*4882a593Smuzhiyun flash0-supply = <&vcc_18>; 442*4882a593Smuzhiyun gpio30-supply = <&vcc_io>; 443*4882a593Smuzhiyun gpio1830 = <&vcc_io>; 444*4882a593Smuzhiyun lcdc-supply = <&vcc_lcd>; 445*4882a593Smuzhiyun sdcard-supply = <&vccio_sd>; 446*4882a593Smuzhiyun wifi-supply = <&vccio_wl>; 447*4882a593Smuzhiyun status = "okay"; 448*4882a593Smuzhiyun}; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun&rockchip_suspend { 451*4882a593Smuzhiyun rockchip,pwm-regulator-config = < 452*4882a593Smuzhiyun (0 453*4882a593Smuzhiyun | PWM1_REGULATOR_EN 454*4882a593Smuzhiyun ) 455*4882a593Smuzhiyun >; 456*4882a593Smuzhiyun status = "okay"; 457*4882a593Smuzhiyun}; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun&pwm0 { 460*4882a593Smuzhiyun status = "okay"; 461*4882a593Smuzhiyun}; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun&pwm1 { 464*4882a593Smuzhiyun pinctrl-names = "active"; 465*4882a593Smuzhiyun pinctrl-0 = <&pwm1_pin_pull_down>; 466*4882a593Smuzhiyun status = "okay"; 467*4882a593Smuzhiyun}; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun&emmc { 470*4882a593Smuzhiyun bus-width = <8>; 471*4882a593Smuzhiyun cap-mmc-highspeed; 472*4882a593Smuzhiyun disable-wp; 473*4882a593Smuzhiyun non-removable; 474*4882a593Smuzhiyun num-slots = <1>; 475*4882a593Smuzhiyun pinctrl-names = "default"; 476*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; 477*4882a593Smuzhiyun max-frequency = <100000000>; 478*4882a593Smuzhiyun mmc-hs200-1_8v; 479*4882a593Smuzhiyun mmc-ddr-1_8v; 480*4882a593Smuzhiyun status = "okay"; 481*4882a593Smuzhiyun}; 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun&saradc { 484*4882a593Smuzhiyun vref-supply = <&vcc_18>; 485*4882a593Smuzhiyun status = "okay"; 486*4882a593Smuzhiyun}; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun&sdmmc { 489*4882a593Smuzhiyun no-sdio; 490*4882a593Smuzhiyun no-mmc; 491*4882a593Smuzhiyun bus-width = <4>; 492*4882a593Smuzhiyun cap-mmc-highspeed; 493*4882a593Smuzhiyun sd-uhs-sdr12; 494*4882a593Smuzhiyun sd-uhs-sdr25; 495*4882a593Smuzhiyun sd-uhs-sdr50; 496*4882a593Smuzhiyun sd-uhs-sdr104; 497*4882a593Smuzhiyun cap-sd-highspeed; 498*4882a593Smuzhiyun card-detect-delay = <200>; 499*4882a593Smuzhiyun disable-wp; /* wp not hooked up */ 500*4882a593Smuzhiyun num-slots = <1>; 501*4882a593Smuzhiyun pinctrl-names = "default"; 502*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 503*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 504*4882a593Smuzhiyun vqmmc-supply = <&vccio_sd>; 505*4882a593Smuzhiyun no-sdio; 506*4882a593Smuzhiyun no-mmc; 507*4882a593Smuzhiyun status = "okay"; 508*4882a593Smuzhiyun}; 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun&wdt { 511*4882a593Smuzhiyun status = "okay"; 512*4882a593Smuzhiyun}; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun&pwm0 { 515*4882a593Smuzhiyun status = "okay"; 516*4882a593Smuzhiyun}; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun&backlight { 519*4882a593Smuzhiyun status = "okay"; 520*4882a593Smuzhiyun}; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun&rga { 523*4882a593Smuzhiyun status = "okay"; 524*4882a593Smuzhiyun}; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun&tsadc { 527*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <0>; 528*4882a593Smuzhiyun status = "okay"; 529*4882a593Smuzhiyun}; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun&usbphy { 532*4882a593Smuzhiyun status = "okay"; 533*4882a593Smuzhiyun}; 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun&usb_host0_ehci { 536*4882a593Smuzhiyun rockchip-relinquish-port; 537*4882a593Smuzhiyun status = "okay"; 538*4882a593Smuzhiyun}; 539*4882a593Smuzhiyun 540*4882a593Smuzhiyun&usb_host0_ohci { 541*4882a593Smuzhiyun status = "okay"; 542*4882a593Smuzhiyun}; 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun&usb_host1 { 545*4882a593Smuzhiyun status = "okay"; 546*4882a593Smuzhiyun}; 547*4882a593Smuzhiyun 548*4882a593Smuzhiyun&usb_otg { 549*4882a593Smuzhiyun status = "okay"; 550*4882a593Smuzhiyun}; 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun&vopb { 553*4882a593Smuzhiyun status = "okay"; 554*4882a593Smuzhiyun}; 555*4882a593Smuzhiyun 556*4882a593Smuzhiyun&vopb_mmu { 557*4882a593Smuzhiyun status = "okay"; 558*4882a593Smuzhiyun}; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun&vopl { 561*4882a593Smuzhiyun status = "okay"; 562*4882a593Smuzhiyun}; 563*4882a593Smuzhiyun 564*4882a593Smuzhiyun&vopl_mmu { 565*4882a593Smuzhiyun status = "okay"; 566*4882a593Smuzhiyun}; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun&pinctrl { 569*4882a593Smuzhiyun pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { 570*4882a593Smuzhiyun drive-strength = <8>; 571*4882a593Smuzhiyun }; 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { 574*4882a593Smuzhiyun bias-pull-up; 575*4882a593Smuzhiyun drive-strength = <8>; 576*4882a593Smuzhiyun }; 577*4882a593Smuzhiyun 578*4882a593Smuzhiyun pmic { 579*4882a593Smuzhiyun pmic_int: pmic-int { 580*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun }; 583*4882a593Smuzhiyun 584*4882a593Smuzhiyun sdmmc { 585*4882a593Smuzhiyun /* 586*4882a593Smuzhiyun * Default drive strength isn't enough to achieve even 587*4882a593Smuzhiyun * high-speed mode on EVB board so bump up to 8ma. 588*4882a593Smuzhiyun */ 589*4882a593Smuzhiyun sdmmc_bus4: sdmmc-bus4 { 590*4882a593Smuzhiyun rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>, 591*4882a593Smuzhiyun <6 RK_PC1 1 &pcfg_pull_up_drv_8ma>, 592*4882a593Smuzhiyun <6 RK_PC2 1 &pcfg_pull_up_drv_8ma>, 593*4882a593Smuzhiyun <6 RK_PC3 1 &pcfg_pull_up_drv_8ma>; 594*4882a593Smuzhiyun }; 595*4882a593Smuzhiyun 596*4882a593Smuzhiyun sdmmc_clk: sdmmc-clk { 597*4882a593Smuzhiyun rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun sdmmc_cmd: sdmmc-cmd { 601*4882a593Smuzhiyun rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>; 602*4882a593Smuzhiyun }; 603*4882a593Smuzhiyun 604*4882a593Smuzhiyun sdmmc_pwr: sdmmc-pwr { 605*4882a593Smuzhiyun rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 606*4882a593Smuzhiyun }; 607*4882a593Smuzhiyun }; 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun usb { 610*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 611*4882a593Smuzhiyun rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 612*4882a593Smuzhiyun }; 613*4882a593Smuzhiyun }; 614*4882a593Smuzhiyun}; 615