xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3288-evb-rk1608.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
7*4882a593Smuzhiyun * whole.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
10*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
11*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
12*4882a593Smuzhiyun *     License, or (at your option) any later version.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*4882a593Smuzhiyun *     GNU General Public License for more details.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * Or, alternatively,
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
22*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
23*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
24*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
25*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
26*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
27*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
28*4882a593Smuzhiyun *     conditions:
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
31*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun/dts-v1/;
44*4882a593Smuzhiyun#include <dt-bindings/display/media-bus-format.h>
45*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
46*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
47*4882a593Smuzhiyun#include "rk3288.dtsi"
48*4882a593Smuzhiyun#include "rk3288-linux.dtsi"
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun/ {
51*4882a593Smuzhiyun	compatible = "rockchip,rk3288-evb-rk1608", "rockchip,rk3288";
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	backlight: backlight {
54*4882a593Smuzhiyun		compatible = "pwm-backlight";
55*4882a593Smuzhiyun		brightness-levels = <
56*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
57*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
58*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
59*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
60*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
61*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
62*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
63*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
64*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
65*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
66*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
67*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
68*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
69*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
70*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
71*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
72*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
73*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
74*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
75*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
76*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
77*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
78*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
79*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
80*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
81*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
82*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
83*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
84*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
85*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
86*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
87*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
88*4882a593Smuzhiyun		default-brightness-level = <128>;
89*4882a593Smuzhiyun		enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
90*4882a593Smuzhiyun		pinctrl-names = "default";
91*4882a593Smuzhiyun		pinctrl-0 = <&bl_en>;
92*4882a593Smuzhiyun		pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
93*4882a593Smuzhiyun	};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun	ext_gmac: external-gmac-clock {
96*4882a593Smuzhiyun		compatible = "fixed-clock";
97*4882a593Smuzhiyun		clock-frequency = <125000000>;
98*4882a593Smuzhiyun		clock-output-names = "ext_gmac";
99*4882a593Smuzhiyun		#clock-cells = <0>;
100*4882a593Smuzhiyun	};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
103*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
104*4882a593Smuzhiyun		clocks = <&hym8563>;
105*4882a593Smuzhiyun		clock-names = "ext_clock";
106*4882a593Smuzhiyun		pinctrl-names = "default";
107*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		/*
110*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
111*4882a593Smuzhiyun		 * on the actual card populated):
112*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
113*4882a593Smuzhiyun		 * - PDN (power down when low)
114*4882a593Smuzhiyun		 */
115*4882a593Smuzhiyun		reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
116*4882a593Smuzhiyun	};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	/* This turns on USB vbus for both host0 (ehci) and host1 (dwc2) */
119*4882a593Smuzhiyun	vcc_host: vcc-host-regulator {
120*4882a593Smuzhiyun		compatible = "regulator-fixed";
121*4882a593Smuzhiyun		enable-active-high;
122*4882a593Smuzhiyun		gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
123*4882a593Smuzhiyun		pinctrl-names = "default";
124*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
125*4882a593Smuzhiyun		regulator-name = "vcc_host";
126*4882a593Smuzhiyun		regulator-always-on;
127*4882a593Smuzhiyun		regulator-boot-on;
128*4882a593Smuzhiyun	};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun	vcc_lcd: vcc-lcd {
131*4882a593Smuzhiyun		compatible = "regulator-fixed";
132*4882a593Smuzhiyun		enable-active-high;
133*4882a593Smuzhiyun		gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>;
134*4882a593Smuzhiyun		pinctrl-names = "default";
135*4882a593Smuzhiyun		pinctrl-0 = <&lcd_en>;
136*4882a593Smuzhiyun		regulator-name = "vcc_lcd";
137*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
138*4882a593Smuzhiyun	};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	vcc_sys: vsys-regulator {
141*4882a593Smuzhiyun		compatible = "regulator-fixed";
142*4882a593Smuzhiyun		regulator-name = "vcc_sys";
143*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
144*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
145*4882a593Smuzhiyun		regulator-always-on;
146*4882a593Smuzhiyun		regulator-boot-on;
147*4882a593Smuzhiyun	};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun	/*
150*4882a593Smuzhiyun	 * NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from
151*4882a593Smuzhiyun	 * vcc_io directly.  Those boards won't be able to power cycle SD cards
152*4882a593Smuzhiyun	 * but it shouldn't hurt to toggle this pin there anyway.
153*4882a593Smuzhiyun	 */
154*4882a593Smuzhiyun	vcc_sd: sdmmc-regulator {
155*4882a593Smuzhiyun		compatible = "regulator-fixed";
156*4882a593Smuzhiyun		pinctrl-names = "default";
157*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc_pwr>;
158*4882a593Smuzhiyun		regulator-name = "vcc_sd";
159*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
160*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
161*4882a593Smuzhiyun		startup-delay-us = <100000>;
162*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
163*4882a593Smuzhiyun	};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun	wireless-bluetooth {
166*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
167*4882a593Smuzhiyun		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
168*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
169*4882a593Smuzhiyun		pinctrl-0 = <&uart0_rts>;
170*4882a593Smuzhiyun		pinctrl-1 = <&uart0_gpios>;
171*4882a593Smuzhiyun		BT,reset_gpio    = <&gpio4 29 GPIO_ACTIVE_HIGH>;
172*4882a593Smuzhiyun		BT,wake_gpio     = <&gpio4 26 GPIO_ACTIVE_HIGH>;
173*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
174*4882a593Smuzhiyun		status = "okay";
175*4882a593Smuzhiyun	};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun	wireless-wlan {
178*4882a593Smuzhiyun		compatible = "wlan-platdata";
179*4882a593Smuzhiyun		rockchip,grf = <&grf>;
180*4882a593Smuzhiyun		wifi_chip_type = "ap6335";
181*4882a593Smuzhiyun		sdio_vref = <1800>;
182*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
183*4882a593Smuzhiyun		status = "okay";
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun&cpu0 {
188*4882a593Smuzhiyun	cpu0-supply = <&vdd_cpu>;
189*4882a593Smuzhiyun};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun&dsi0 {
192*4882a593Smuzhiyun	status = "okay";
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun	panel: panel {
195*4882a593Smuzhiyun		status = "okay";
196*4882a593Smuzhiyun		compatible = "simple-panel-dsi";
197*4882a593Smuzhiyun		reg = <0>;
198*4882a593Smuzhiyun		backlight = <&backlight>;
199*4882a593Smuzhiyun		enable-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
200*4882a593Smuzhiyun		supply = <&vcc_lcd>;
201*4882a593Smuzhiyun		bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
202*4882a593Smuzhiyun		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
203*4882a593Smuzhiyun		dsi,format = <MIPI_DSI_FMT_RGB888>;
204*4882a593Smuzhiyun		dsi,lanes = <4>;
205*4882a593Smuzhiyun		delay,prepare = <120>;
206*4882a593Smuzhiyun		delay,enable = <100>;
207*4882a593Smuzhiyun		delay,reset = <100>;
208*4882a593Smuzhiyun		delay,init = <1>;
209*4882a593Smuzhiyun		panel-init-sequence = [
210*4882a593Smuzhiyun			15 00 02 FF 05
211*4882a593Smuzhiyun			15 00 02 FB 01
212*4882a593Smuzhiyun			15 78 02 C5 01
213*4882a593Smuzhiyun			15 00 02 FF EE
214*4882a593Smuzhiyun			15 00 02 FB 01
215*4882a593Smuzhiyun			15 00 02 1F 45
216*4882a593Smuzhiyun			15 00 02 24 45
217*4882a593Smuzhiyun			15 00 02 38 C8
218*4882a593Smuzhiyun			15 00 02 39 27
219*4882a593Smuzhiyun			15 00 02 1E 77
220*4882a593Smuzhiyun			15 00 02 1D 0F
221*4882a593Smuzhiyun			15 00 02 7E 71
222*4882a593Smuzhiyun			15 00 02 7C 03
223*4882a593Smuzhiyun			15 00 02 FF 01
224*4882a593Smuzhiyun			15 00 02 FB 01
225*4882a593Smuzhiyun			15 00 02 00 01
226*4882a593Smuzhiyun			15 00 02 01 55
227*4882a593Smuzhiyun			15 00 02 02 40
228*4882a593Smuzhiyun			15 00 02 05 40
229*4882a593Smuzhiyun			15 00 02 06 4A
230*4882a593Smuzhiyun			15 00 02 07 24
231*4882a593Smuzhiyun			15 00 02 08 0C
232*4882a593Smuzhiyun			15 00 02 0B 7D
233*4882a593Smuzhiyun			15 00 02 0C 7D
234*4882a593Smuzhiyun			15 00 02 0E B0
235*4882a593Smuzhiyun			15 00 02 0F AE
236*4882a593Smuzhiyun			15 00 02 11 10
237*4882a593Smuzhiyun			15 00 02 12 10
238*4882a593Smuzhiyun			15 00 02 13 03
239*4882a593Smuzhiyun			15 00 02 14 4A
240*4882a593Smuzhiyun			15 00 02 15 12
241*4882a593Smuzhiyun			15 00 02 16 12
242*4882a593Smuzhiyun			15 00 02 18 00
243*4882a593Smuzhiyun			15 00 02 19 77
244*4882a593Smuzhiyun			15 00 02 1A 55
245*4882a593Smuzhiyun			15 00 02 1B 13
246*4882a593Smuzhiyun			15 00 02 1C 00
247*4882a593Smuzhiyun			15 00 02 1D 00
248*4882a593Smuzhiyun			15 00 02 1E 13
249*4882a593Smuzhiyun			15 00 02 1F 00
250*4882a593Smuzhiyun			15 00 02 23 00
251*4882a593Smuzhiyun			15 00 02 24 00
252*4882a593Smuzhiyun			15 00 02 25 00
253*4882a593Smuzhiyun			15 00 02 26 00
254*4882a593Smuzhiyun			15 00 02 27 00
255*4882a593Smuzhiyun			15 00 02 28 00
256*4882a593Smuzhiyun			15 00 02 35 00
257*4882a593Smuzhiyun			15 00 02 66 00
258*4882a593Smuzhiyun			15 00 02 58 82
259*4882a593Smuzhiyun			15 00 02 59 02
260*4882a593Smuzhiyun			15 00 02 5A 02
261*4882a593Smuzhiyun			15 00 02 5B 02
262*4882a593Smuzhiyun			15 00 02 5C 82
263*4882a593Smuzhiyun			15 00 02 5D 82
264*4882a593Smuzhiyun			15 00 02 5E 02
265*4882a593Smuzhiyun			15 00 02 5F 02
266*4882a593Smuzhiyun			15 00 02 72 31
267*4882a593Smuzhiyun			15 00 02 FF 05
268*4882a593Smuzhiyun			15 00 02 FB 01
269*4882a593Smuzhiyun			15 00 02 00 01
270*4882a593Smuzhiyun			15 00 02 01 0B
271*4882a593Smuzhiyun			15 00 02 02 0C
272*4882a593Smuzhiyun			15 00 02 03 09
273*4882a593Smuzhiyun			15 00 02 04 0A
274*4882a593Smuzhiyun			15 00 02 05 00
275*4882a593Smuzhiyun			15 00 02 06 0F
276*4882a593Smuzhiyun			15 00 02 07 10
277*4882a593Smuzhiyun			15 00 02 08 00
278*4882a593Smuzhiyun			15 00 02 09 00
279*4882a593Smuzhiyun			15 00 02 0A 00
280*4882a593Smuzhiyun			15 00 02 0B 00
281*4882a593Smuzhiyun			15 00 02 0C 00
282*4882a593Smuzhiyun			15 00 02 0D 13
283*4882a593Smuzhiyun			15 00 02 0E 15
284*4882a593Smuzhiyun			15 00 02 0F 17
285*4882a593Smuzhiyun			15 00 02 10 01
286*4882a593Smuzhiyun			15 00 02 11 0B
287*4882a593Smuzhiyun			15 00 02 12 0C
288*4882a593Smuzhiyun			15 00 02 13 09
289*4882a593Smuzhiyun			15 00 02 14 0A
290*4882a593Smuzhiyun			15 00 02 15 00
291*4882a593Smuzhiyun			15 00 02 16 0F
292*4882a593Smuzhiyun			15 00 02 17 10
293*4882a593Smuzhiyun			15 00 02 18 00
294*4882a593Smuzhiyun			15 00 02 19 00
295*4882a593Smuzhiyun			15 00 02 1A 00
296*4882a593Smuzhiyun			15 00 02 1B 00
297*4882a593Smuzhiyun			15 00 02 1C 00
298*4882a593Smuzhiyun			15 00 02 1D 13
299*4882a593Smuzhiyun			15 00 02 1E 15
300*4882a593Smuzhiyun			15 00 02 1F 17
301*4882a593Smuzhiyun			15 00 02 20 00
302*4882a593Smuzhiyun			15 00 02 21 03
303*4882a593Smuzhiyun			15 00 02 22 01
304*4882a593Smuzhiyun			15 00 02 23 40
305*4882a593Smuzhiyun			15 00 02 24 40
306*4882a593Smuzhiyun			15 00 02 25 ED
307*4882a593Smuzhiyun			15 00 02 29 58
308*4882a593Smuzhiyun			15 00 02 2A 12
309*4882a593Smuzhiyun			15 00 02 2B 01
310*4882a593Smuzhiyun			15 00 02 4B 06
311*4882a593Smuzhiyun			15 00 02 4C 11
312*4882a593Smuzhiyun			15 00 02 4D 20
313*4882a593Smuzhiyun			15 00 02 4E 02
314*4882a593Smuzhiyun			15 00 02 4F 02
315*4882a593Smuzhiyun			15 00 02 50 20
316*4882a593Smuzhiyun			15 00 02 51 61
317*4882a593Smuzhiyun			15 00 02 52 01
318*4882a593Smuzhiyun			15 00 02 53 63
319*4882a593Smuzhiyun			15 00 02 54 77
320*4882a593Smuzhiyun			15 00 02 55 ED
321*4882a593Smuzhiyun			15 00 02 5B 00
322*4882a593Smuzhiyun			15 00 02 5C 00
323*4882a593Smuzhiyun			15 00 02 5D 00
324*4882a593Smuzhiyun			15 00 02 5E 00
325*4882a593Smuzhiyun			15 00 02 5F 15
326*4882a593Smuzhiyun			15 00 02 60 75
327*4882a593Smuzhiyun			15 00 02 61 00
328*4882a593Smuzhiyun			15 00 02 62 00
329*4882a593Smuzhiyun			15 00 02 63 00
330*4882a593Smuzhiyun			15 00 02 64 00
331*4882a593Smuzhiyun			15 00 02 65 00
332*4882a593Smuzhiyun			15 00 02 66 00
333*4882a593Smuzhiyun			15 00 02 67 00
334*4882a593Smuzhiyun			15 00 02 68 04
335*4882a593Smuzhiyun			15 00 02 69 00
336*4882a593Smuzhiyun			15 00 02 6A 00
337*4882a593Smuzhiyun			15 00 02 6C 40
338*4882a593Smuzhiyun			15 00 02 68 04
339*4882a593Smuzhiyun			15 00 02 69 00
340*4882a593Smuzhiyun			15 00 02 6A 00
341*4882a593Smuzhiyun			15 00 02 6C 40
342*4882a593Smuzhiyun			15 00 02 75 01
343*4882a593Smuzhiyun			15 00 02 76 01
344*4882a593Smuzhiyun			15 00 02 7A 80
345*4882a593Smuzhiyun			15 00 02 7B A3
346*4882a593Smuzhiyun			15 00 02 7C D8
347*4882a593Smuzhiyun			15 00 02 7D 60
348*4882a593Smuzhiyun			15 00 02 7F 15
349*4882a593Smuzhiyun			15 00 02 80 81
350*4882a593Smuzhiyun			15 00 02 83 05
351*4882a593Smuzhiyun			15 00 02 93 08
352*4882a593Smuzhiyun			15 00 02 94 10
353*4882a593Smuzhiyun			15 00 02 8A 00
354*4882a593Smuzhiyun			15 00 02 9B 0F
355*4882a593Smuzhiyun			15 00 02 FF 01
356*4882a593Smuzhiyun			15 00 02 FB 01
357*4882a593Smuzhiyun			15 00 02 FF 02
358*4882a593Smuzhiyun			15 00 02 FB 01
359*4882a593Smuzhiyun			15 00 02 FF 04
360*4882a593Smuzhiyun			15 00 02 FB 01
361*4882a593Smuzhiyun			15 00 02 FF 00
362*4882a593Smuzhiyun			15 00 02 D3 06
363*4882a593Smuzhiyun			15 00 02 D4 04
364*4882a593Smuzhiyun			05 78 01 11
365*4882a593Smuzhiyun			15 00 02 FF 00
366*4882a593Smuzhiyun			15 00 02 35 00
367*4882a593Smuzhiyun			05 00 01 29
368*4882a593Smuzhiyun			15 78 02 FF 00
369*4882a593Smuzhiyun		];
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun		panel-exit-sequence = [
372*4882a593Smuzhiyun			05 00 01 28
373*4882a593Smuzhiyun			05 78 01 10
374*4882a593Smuzhiyun		];
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun		display-timings {
377*4882a593Smuzhiyun			native-mode = <&timing0>;
378*4882a593Smuzhiyun			compatible = "rockchip,display-timings";
379*4882a593Smuzhiyun			timing0: timing0 {
380*4882a593Smuzhiyun				    clock-frequency = <130000000>;
381*4882a593Smuzhiyun				    hactive = <1080>;
382*4882a593Smuzhiyun				    vactive = <1920>;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun				    hsync-len = <10>;
385*4882a593Smuzhiyun				    hback-porch = <8>;
386*4882a593Smuzhiyun				    hfront-porch = <40>;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun				    vsync-len = <3>;
389*4882a593Smuzhiyun				    vback-porch = <2>;
390*4882a593Smuzhiyun				    vfront-porch = <4>;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun				    hsync-active = <0>;
393*4882a593Smuzhiyun				    vsync-active = <0>;
394*4882a593Smuzhiyun				    de-active = <0>;
395*4882a593Smuzhiyun				    pixelclk-active = <0>;
396*4882a593Smuzhiyun			};
397*4882a593Smuzhiyun		};
398*4882a593Smuzhiyun	};
399*4882a593Smuzhiyun};
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun&dsi0_in_vopl {
402*4882a593Smuzhiyun	status = "okay";
403*4882a593Smuzhiyun};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun&dsi0_in_vopb {
406*4882a593Smuzhiyun	status = "disabled";
407*4882a593Smuzhiyun};
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun&emmc {
410*4882a593Smuzhiyun	bus-width = <8>;
411*4882a593Smuzhiyun	cap-mmc-highspeed;
412*4882a593Smuzhiyun	disable-wp;
413*4882a593Smuzhiyun	non-removable;
414*4882a593Smuzhiyun	num-slots = <1>;
415*4882a593Smuzhiyun	pinctrl-names = "default";
416*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
417*4882a593Smuzhiyun	max-frequency = <100000000>;
418*4882a593Smuzhiyun	mmc-hs200-1_8v;
419*4882a593Smuzhiyun	mmc-ddr-1_8v;
420*4882a593Smuzhiyun	status = "okay";
421*4882a593Smuzhiyun};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun&gmac {
424*4882a593Smuzhiyun	phy-supply = <&vccio_pmu>;
425*4882a593Smuzhiyun	phy-mode = "rgmii";
426*4882a593Smuzhiyun	clock_in_out = "output";
427*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC>;
428*4882a593Smuzhiyun	assigned-clock-parents = <&cru PLL_NPLL>;
429*4882a593Smuzhiyun	assigned-clock-rates = <125000000>;
430*4882a593Smuzhiyun	snps,reset-gpio = <&gpio4 7 0>;
431*4882a593Smuzhiyun	snps,reset-active-low;
432*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
433*4882a593Smuzhiyun	pinctrl-names = "default";
434*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
435*4882a593Smuzhiyun	tx_delay = <0x30>;
436*4882a593Smuzhiyun	rx_delay = <0x10>;
437*4882a593Smuzhiyun	max-speed = <100>;
438*4882a593Smuzhiyun	status = "okay";
439*4882a593Smuzhiyun};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun&gpu {
442*4882a593Smuzhiyun	status = "okay";
443*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&hevc_service {
447*4882a593Smuzhiyun	status = "okay";
448*4882a593Smuzhiyun};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun&i2c0 {
451*4882a593Smuzhiyun	status = "okay";
452*4882a593Smuzhiyun	clock-frequency = <400000>;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun	vdd_cpu: syr827@40 {
455*4882a593Smuzhiyun		compatible = "silergy,syr827";
456*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
457*4882a593Smuzhiyun		reg = <0x40>;
458*4882a593Smuzhiyun		regulator-name = "vdd_cpu";
459*4882a593Smuzhiyun		regulator-min-microvolt = <850000>;
460*4882a593Smuzhiyun		regulator-max-microvolt = <1350000>;
461*4882a593Smuzhiyun		regulator-always-on;
462*4882a593Smuzhiyun		regulator-boot-on;
463*4882a593Smuzhiyun		regulator-enable-ramp-delay = <300>;
464*4882a593Smuzhiyun		regulator-ramp-delay = <8000>;
465*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
466*4882a593Smuzhiyun		regulator-state-mem {
467*4882a593Smuzhiyun			regulator-off-in-suspend;
468*4882a593Smuzhiyun		};
469*4882a593Smuzhiyun	};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun	vdd_gpu: syr828@41 {
472*4882a593Smuzhiyun		compatible = "silergy,syr828";
473*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
474*4882a593Smuzhiyun		reg = <0x41>;
475*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
476*4882a593Smuzhiyun		regulator-min-microvolt = <850000>;
477*4882a593Smuzhiyun		regulator-max-microvolt = <1350000>;
478*4882a593Smuzhiyun		regulator-always-on;
479*4882a593Smuzhiyun		regulator-ramp-delay = <6000>;
480*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
481*4882a593Smuzhiyun		regulator-state-mem {
482*4882a593Smuzhiyun			regulator-off-in-suspend;
483*4882a593Smuzhiyun		};
484*4882a593Smuzhiyun	};
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun	hym8563: hym8563@51 {
487*4882a593Smuzhiyun		compatible = "haoyu,hym8563";
488*4882a593Smuzhiyun		reg = <0x51>;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
491*4882a593Smuzhiyun		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun		pinctrl-names = "default";
494*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun		#clock-cells = <0>;
497*4882a593Smuzhiyun		clock-output-names = "xin32k";
498*4882a593Smuzhiyun	};
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun	act8846: act8846@5a {
501*4882a593Smuzhiyun		compatible = "active-semi,act8846";
502*4882a593Smuzhiyun		reg = <0x5a>;
503*4882a593Smuzhiyun		system-power-controller;
504*4882a593Smuzhiyun		status = "okay";
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun		vp1-supply = <&vcc_sys>;
507*4882a593Smuzhiyun		vp2-supply = <&vcc_sys>;
508*4882a593Smuzhiyun		vp3-supply = <&vcc_sys>;
509*4882a593Smuzhiyun		vp4-supply = <&vcc_sys>;
510*4882a593Smuzhiyun		inl1-supply = <&vcc_io>;
511*4882a593Smuzhiyun		inl2-supply = <&vcc_sys>;
512*4882a593Smuzhiyun		inl3-supply = <&vcc_20>;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun		regulators {
515*4882a593Smuzhiyun			vcc_ddr: REG1 {
516*4882a593Smuzhiyun				regulator-name = "VCC_DDR";
517*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
518*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
519*4882a593Smuzhiyun				regulator-always-on;
520*4882a593Smuzhiyun			};
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun			vcc_io: REG2 {
523*4882a593Smuzhiyun				regulator-name = "VCC_IO";
524*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
525*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
526*4882a593Smuzhiyun				regulator-always-on;
527*4882a593Smuzhiyun			};
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun			vdd_log: REG3 {
530*4882a593Smuzhiyun				regulator-name = "VDD_LOG";
531*4882a593Smuzhiyun				regulator-min-microvolt = <1150000>;
532*4882a593Smuzhiyun				regulator-max-microvolt = <1150000>;
533*4882a593Smuzhiyun				regulator-always-on;
534*4882a593Smuzhiyun			};
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun			vcc_20: REG4 {
537*4882a593Smuzhiyun				regulator-name = "VCC_20";
538*4882a593Smuzhiyun				regulator-min-microvolt = <2000000>;
539*4882a593Smuzhiyun				regulator-max-microvolt = <2000000>;
540*4882a593Smuzhiyun				regulator-always-on;
541*4882a593Smuzhiyun			};
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun			vccio_sd: REG5 {
544*4882a593Smuzhiyun				regulator-name = "VCCIO_SD";
545*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
546*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
547*4882a593Smuzhiyun				regulator-always-on;
548*4882a593Smuzhiyun			};
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun			vdd10_lcd: REG6 {
551*4882a593Smuzhiyun				regulator-name = "VDD10_LCD";
552*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
553*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
554*4882a593Smuzhiyun				regulator-always-on;
555*4882a593Smuzhiyun			};
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun			vcca_codec: REG7 {
558*4882a593Smuzhiyun				regulator-name = "VCCA_CODEC";
559*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
560*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
561*4882a593Smuzhiyun				regulator-always-on;
562*4882a593Smuzhiyun			};
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun			vcca_tp: REG8 {
565*4882a593Smuzhiyun				regulator-name = "VCCA_TP";
566*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
567*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
568*4882a593Smuzhiyun				regulator-always-on;
569*4882a593Smuzhiyun			};
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun			vccio_pmu: REG9 {
572*4882a593Smuzhiyun				regulator-name = "VCCIO_PMU";
573*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
574*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
575*4882a593Smuzhiyun				regulator-always-on;
576*4882a593Smuzhiyun			};
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun			vdd_10: REG10 {
579*4882a593Smuzhiyun				regulator-name = "VDD_10";
580*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
581*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
582*4882a593Smuzhiyun				regulator-always-on;
583*4882a593Smuzhiyun			};
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun			vcc_18: REG11 {
586*4882a593Smuzhiyun				regulator-name = "VCC_18";
587*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
588*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
589*4882a593Smuzhiyun				regulator-always-on;
590*4882a593Smuzhiyun			};
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun			vcc18_lcd: REG12 {
593*4882a593Smuzhiyun				regulator-name = "VCC18_LCD";
594*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
595*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
596*4882a593Smuzhiyun				regulator-always-on;
597*4882a593Smuzhiyun			};
598*4882a593Smuzhiyun		};
599*4882a593Smuzhiyun	};
600*4882a593Smuzhiyun};
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun&i2c4 {
603*4882a593Smuzhiyun	status = "okay";
604*4882a593Smuzhiyun	clock-frequency = <100000>;
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun	vdd_core_rk1608: syr827_rk1608@40 {
607*4882a593Smuzhiyun		compatible = "silergy,syr827";
608*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
609*4882a593Smuzhiyun		reg = <0x40>;
610*4882a593Smuzhiyun		regulator-name = "vdd_core_rk1608";
611*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
612*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
613*4882a593Smuzhiyun		regulator-always-on;
614*4882a593Smuzhiyun		regulator-boot-on;
615*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
616*4882a593Smuzhiyun		regulator-state-mem {
617*4882a593Smuzhiyun			regulator-off-in-suspend;
618*4882a593Smuzhiyun		};
619*4882a593Smuzhiyun	};
620*4882a593Smuzhiyun};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun&io_domains {
623*4882a593Smuzhiyun	status = "okay";
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun	bb-supply = <&vcc_18>;
626*4882a593Smuzhiyun	sdcard-supply = <&vccio_sd>;
627*4882a593Smuzhiyun	wifi-supply = <&vcc_18>;
628*4882a593Smuzhiyun};
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun&isp {
631*4882a593Smuzhiyun	status = "okay";
632*4882a593Smuzhiyun};
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun&isp_mmu {
635*4882a593Smuzhiyun	status = "okay";
636*4882a593Smuzhiyun};
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun&pinctrl {
639*4882a593Smuzhiyun	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
640*4882a593Smuzhiyun		drive-strength = <8>;
641*4882a593Smuzhiyun	};
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
644*4882a593Smuzhiyun		bias-pull-up;
645*4882a593Smuzhiyun		drive-strength = <8>;
646*4882a593Smuzhiyun	};
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun	backlight {
649*4882a593Smuzhiyun		bl_en: bl-en {
650*4882a593Smuzhiyun			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
651*4882a593Smuzhiyun		};
652*4882a593Smuzhiyun	};
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun	lcd {
655*4882a593Smuzhiyun		lcd_en: lcd-en  {
656*4882a593Smuzhiyun			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
657*4882a593Smuzhiyun		};
658*4882a593Smuzhiyun	};
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun	pmic {
661*4882a593Smuzhiyun		pmic_int: pmic-int {
662*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
663*4882a593Smuzhiyun		};
664*4882a593Smuzhiyun	};
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun	sdio-pwrseq {
667*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
668*4882a593Smuzhiyun			rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
669*4882a593Smuzhiyun		};
670*4882a593Smuzhiyun	};
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun	sdmmc {
673*4882a593Smuzhiyun		/*
674*4882a593Smuzhiyun		 * Default drive strength isn't enough to achieve even
675*4882a593Smuzhiyun		 * high-speed mode on EVB board so bump up to 8ma.
676*4882a593Smuzhiyun		 */
677*4882a593Smuzhiyun		sdmmc_bus4: sdmmc-bus4 {
678*4882a593Smuzhiyun			rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>,
679*4882a593Smuzhiyun					<6 RK_PC1 1 &pcfg_pull_up_drv_8ma>,
680*4882a593Smuzhiyun					<6 RK_PC2 1 &pcfg_pull_up_drv_8ma>,
681*4882a593Smuzhiyun					<6 RK_PC3 1 &pcfg_pull_up_drv_8ma>;
682*4882a593Smuzhiyun		};
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun		sdmmc_clk: sdmmc-clk {
685*4882a593Smuzhiyun			rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
686*4882a593Smuzhiyun		};
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun		sdmmc_cmd: sdmmc-cmd {
689*4882a593Smuzhiyun			rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>;
690*4882a593Smuzhiyun		};
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun		sdmmc_pwr: sdmmc-pwr {
693*4882a593Smuzhiyun			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
694*4882a593Smuzhiyun		};
695*4882a593Smuzhiyun	};
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun	usb {
698*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
699*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
700*4882a593Smuzhiyun		};
701*4882a593Smuzhiyun	};
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun	wireless-bluetooth {
704*4882a593Smuzhiyun		uart0_gpios: uart0-gpios {
705*4882a593Smuzhiyun			rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
706*4882a593Smuzhiyun		};
707*4882a593Smuzhiyun	};
708*4882a593Smuzhiyun};
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun&pwm0 {
711*4882a593Smuzhiyun	status = "okay";
712*4882a593Smuzhiyun};
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun&rga {
715*4882a593Smuzhiyun	status = "okay";
716*4882a593Smuzhiyun};
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun&route_dsi0 {
719*4882a593Smuzhiyun	status = "okay";
720*4882a593Smuzhiyun};
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun&saradc {
723*4882a593Smuzhiyun	vref-supply = <&vcc_18>;
724*4882a593Smuzhiyun	status = "okay";
725*4882a593Smuzhiyun};
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun&sdio0 {
728*4882a593Smuzhiyun	status = "okay";
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun	clock-frequency = <50000000>;
731*4882a593Smuzhiyun	clock-freq-min-max = <200000 50000000>;
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun	bus-width = <4>;
734*4882a593Smuzhiyun	cap-sd-highspeed;
735*4882a593Smuzhiyun	cap-sdio-irq;
736*4882a593Smuzhiyun	disable-wp;
737*4882a593Smuzhiyun	keep-power-in-suspend;
738*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
739*4882a593Smuzhiyun	non-removable;
740*4882a593Smuzhiyun	num-slots = <1>;
741*4882a593Smuzhiyun	pinctrl-names = "default";
742*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>;
743*4882a593Smuzhiyun	sd-uhs-sdr104;
744*4882a593Smuzhiyun	no-sd;
745*4882a593Smuzhiyun	no-mmc;
746*4882a593Smuzhiyun};
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun&sdmmc {
749*4882a593Smuzhiyun	no-sdio;
750*4882a593Smuzhiyun	no-mmc;
751*4882a593Smuzhiyun	bus-width = <4>;
752*4882a593Smuzhiyun	cap-mmc-highspeed;
753*4882a593Smuzhiyun	sd-uhs-sdr12;
754*4882a593Smuzhiyun	sd-uhs-sdr25;
755*4882a593Smuzhiyun	sd-uhs-sdr50;
756*4882a593Smuzhiyun	sd-uhs-sdr104;
757*4882a593Smuzhiyun	cap-sd-highspeed;
758*4882a593Smuzhiyun	card-detect-delay = <200>;
759*4882a593Smuzhiyun	disable-wp;			/* wp not hooked up */
760*4882a593Smuzhiyun	num-slots = <1>;
761*4882a593Smuzhiyun	pinctrl-names = "default";
762*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
763*4882a593Smuzhiyun	status = "okay";
764*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
765*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
766*4882a593Smuzhiyun	no-sdio;
767*4882a593Smuzhiyun	no-mmc;
768*4882a593Smuzhiyun};
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun&tsadc {
771*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
772*4882a593Smuzhiyun	status = "okay";
773*4882a593Smuzhiyun};
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun&uart0 {
776*4882a593Smuzhiyun	pinctrl-names = "default";
777*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts>;
778*4882a593Smuzhiyun	status = "okay";
779*4882a593Smuzhiyun};
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun&uart2 {
782*4882a593Smuzhiyun	status = "okay";
783*4882a593Smuzhiyun};
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun&usbphy {
786*4882a593Smuzhiyun	status = "okay";
787*4882a593Smuzhiyun};
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun&usb_host0_ehci {
790*4882a593Smuzhiyun	rockchip-relinquish-port;
791*4882a593Smuzhiyun	status = "okay";
792*4882a593Smuzhiyun};
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun&usb_host0_ohci {
795*4882a593Smuzhiyun	status = "okay";
796*4882a593Smuzhiyun};
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun&usb_host1 {
799*4882a593Smuzhiyun	status = "okay";
800*4882a593Smuzhiyun};
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun&usb_otg {
803*4882a593Smuzhiyun	status = "okay";
804*4882a593Smuzhiyun};
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun&vopb {
807*4882a593Smuzhiyun	status = "okay";
808*4882a593Smuzhiyun};
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun&vopb_mmu {
811*4882a593Smuzhiyun	status = "okay";
812*4882a593Smuzhiyun};
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun&vopl {
815*4882a593Smuzhiyun	status = "okay";
816*4882a593Smuzhiyun};
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun&vopl_mmu {
819*4882a593Smuzhiyun	status = "okay";
820*4882a593Smuzhiyun};
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun&vpu_service {
823*4882a593Smuzhiyun	status = "okay";
824*4882a593Smuzhiyun};
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun&wdt {
827*4882a593Smuzhiyun	status = "okay";
828*4882a593Smuzhiyun};
829