xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3288-evb-android-rk818-edp.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
7*4882a593Smuzhiyun * whole.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
10*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
11*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
12*4882a593Smuzhiyun *     License, or (at your option) any later version.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*4882a593Smuzhiyun *     GNU General Public License for more details.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * Or, alternatively,
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
22*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
23*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
24*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
25*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
26*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
27*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
28*4882a593Smuzhiyun *     conditions:
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
31*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun/dts-v1/;
44*4882a593Smuzhiyun#include "rk3288-evb.dtsi"
45*4882a593Smuzhiyun#include "rk3288-android.dtsi"
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun/ {
48*4882a593Smuzhiyun	compatible = "rockchip,rk3288-evb-android-rk818", "rockchip,rk3288";
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
51*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
52*4882a593Smuzhiyun		clocks = <&rk818 1>;
53*4882a593Smuzhiyun		clock-names = "ext_clock";
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		/*
56*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
57*4882a593Smuzhiyun		 * on the actual card populated):
58*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
59*4882a593Smuzhiyun		 * - PDN (power down when low)
60*4882a593Smuzhiyun		 */
61*4882a593Smuzhiyun		reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	wireless-bluetooth {
65*4882a593Smuzhiyun		clocks = <&rk818 1>;
66*4882a593Smuzhiyun		clock-names = "ext_clock";
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	/delete-node/ sdmmc-regulator;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	vcc_lcd: vcc-lcd {
72*4882a593Smuzhiyun		compatible = "regulator-fixed";
73*4882a593Smuzhiyun		regulator-boot-on;
74*4882a593Smuzhiyun		enable-active-high;
75*4882a593Smuzhiyun		gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>;
76*4882a593Smuzhiyun		pinctrl-names = "default";
77*4882a593Smuzhiyun		pinctrl-0 = <&lcd_en>;
78*4882a593Smuzhiyun		regulator-name = "vcc_lcd";
79*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
80*4882a593Smuzhiyun	};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun	xin32k: xin32k {
83*4882a593Smuzhiyun		compatible = "fixed-clock";
84*4882a593Smuzhiyun		clock-frequency = <32768>;
85*4882a593Smuzhiyun		clock-output-names = "xin32k";
86*4882a593Smuzhiyun		#clock-cells = <0>;
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&cpu0 {
91*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&dfi {
95*4882a593Smuzhiyun	status = "okay";
96*4882a593Smuzhiyun};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun&dmc {
99*4882a593Smuzhiyun	center-supply = <&vdd_logic>;
100*4882a593Smuzhiyun	status = "okay";
101*4882a593Smuzhiyun};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun&edp {
104*4882a593Smuzhiyun	status = "okay";
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun&edp_panel {
108*4882a593Smuzhiyun	compatible ="lg,lp079qx1-sp0v", "simple-panel";
109*4882a593Smuzhiyun	backlight = <&backlight>;
110*4882a593Smuzhiyun	enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
111*4882a593Smuzhiyun	enable-delay-ms = <120>;
112*4882a593Smuzhiyun	pinctrl-0 = <&lcd_cs>;
113*4882a593Smuzhiyun	power-supply = <&vcc_lcd>;
114*4882a593Smuzhiyun	status = "okay";
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun	disp_timings: display-timings {
117*4882a593Smuzhiyun		native-mode = <&timing0>;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun		timing0: timing0 {
120*4882a593Smuzhiyun			clock-frequency = <200000000>;
121*4882a593Smuzhiyun			hactive = <1536>;
122*4882a593Smuzhiyun			vactive = <2048>;
123*4882a593Smuzhiyun			hfront-porch = <12>;
124*4882a593Smuzhiyun			hsync-len = <16>;
125*4882a593Smuzhiyun			hback-porch = <48>;
126*4882a593Smuzhiyun			vfront-porch = <8>;
127*4882a593Smuzhiyun			vsync-len = <4>;
128*4882a593Smuzhiyun			vback-porch = <8>;
129*4882a593Smuzhiyun			hsync-active = <0>;
130*4882a593Smuzhiyun			vsync-active = <0>;
131*4882a593Smuzhiyun			de-active = <0>;
132*4882a593Smuzhiyun			pixelclk-active = <0>;
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun&route_edp {
138*4882a593Smuzhiyun	status = "okay";
139*4882a593Smuzhiyun};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun&gpu {
142*4882a593Smuzhiyun	status = "okay";
143*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
144*4882a593Smuzhiyun};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun&hdmi_analog_sound {
147*4882a593Smuzhiyun	status = "okay";
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&i2c0 {
151*4882a593Smuzhiyun	clock-frequency = <400000>;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun	vdd_cpu: syr827@40 {
154*4882a593Smuzhiyun		compatible = "silergy,syr827";
155*4882a593Smuzhiyun		reg = <0x40>;
156*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
157*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
158*4882a593Smuzhiyun		pinctrl-0 = <&vsel1_gpio>;
159*4882a593Smuzhiyun		vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
160*4882a593Smuzhiyun		regulator-name = "vdd_cpu";
161*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
162*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
163*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
164*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
165*4882a593Smuzhiyun		regulator-always-on;
166*4882a593Smuzhiyun		regulator-boot-on;
167*4882a593Smuzhiyun		regulator-initial-state = <3>;
168*4882a593Smuzhiyun		regulator-state-mem {
169*4882a593Smuzhiyun			regulator-off-in-suspend;
170*4882a593Smuzhiyun		};
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun	rk818: pmic@1c {
174*4882a593Smuzhiyun		compatible = "rockchip,rk818";
175*4882a593Smuzhiyun		reg = <0x1c>;
176*4882a593Smuzhiyun		status = "okay";
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun		clock-output-names = "rk818-clkout1", "wifibt_32kin";
179*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
180*4882a593Smuzhiyun		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
181*4882a593Smuzhiyun		pinctrl-names = "default";
182*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
183*4882a593Smuzhiyun		rockchip,system-power-controller;
184*4882a593Smuzhiyun		wakeup-source;
185*4882a593Smuzhiyun		#clock-cells = <1>;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
188*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
189*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
190*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
191*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
192*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
193*4882a593Smuzhiyun		vcc8-supply = <&vcc_sys>;
194*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
195*4882a593Smuzhiyun		boost-supply = <&vcc_sys>;
196*4882a593Smuzhiyun		h_5v-supply = <&boost>;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun		regulators {
199*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
200*4882a593Smuzhiyun				regulator-name = "vdd_logic";
201*4882a593Smuzhiyun				regulator-always-on;
202*4882a593Smuzhiyun				regulator-boot-on;
203*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
204*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
205*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
206*4882a593Smuzhiyun				regulator-state-mem {
207*4882a593Smuzhiyun					regulator-on-in-suspend;
208*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
209*4882a593Smuzhiyun				};
210*4882a593Smuzhiyun			};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
213*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
214*4882a593Smuzhiyun				regulator-always-on;
215*4882a593Smuzhiyun				regulator-boot-on;
216*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
217*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
218*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
219*4882a593Smuzhiyun				regulator-state-mem {
220*4882a593Smuzhiyun					regulator-on-in-suspend;
221*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
222*4882a593Smuzhiyun				};
223*4882a593Smuzhiyun			};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
226*4882a593Smuzhiyun				regulator-always-on;
227*4882a593Smuzhiyun				regulator-boot-on;
228*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
229*4882a593Smuzhiyun				regulator-state-mem {
230*4882a593Smuzhiyun					regulator-on-in-suspend;
231*4882a593Smuzhiyun				};
232*4882a593Smuzhiyun			};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
235*4882a593Smuzhiyun				regulator-always-on;
236*4882a593Smuzhiyun				regulator-boot-on;
237*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
238*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
239*4882a593Smuzhiyun				regulator-name = "vcc_io";
240*4882a593Smuzhiyun				regulator-state-mem {
241*4882a593Smuzhiyun					regulator-off-in-suspend;
242*4882a593Smuzhiyun				};
243*4882a593Smuzhiyun			};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun			boost: DCDC_BOOST {
246*4882a593Smuzhiyun				regulator-always-on;
247*4882a593Smuzhiyun				regulator-boot-on;
248*4882a593Smuzhiyun				regulator-min-microvolt = <5000000>;
249*4882a593Smuzhiyun				regulator-max-microvolt = <5000000>;
250*4882a593Smuzhiyun				regulator-name = "boost";
251*4882a593Smuzhiyun				regulator-state-mem {
252*4882a593Smuzhiyun					regulator-on-in-suspend;
253*4882a593Smuzhiyun				};
254*4882a593Smuzhiyun			};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun			vcca_codec: LDO_REG1 {
257*4882a593Smuzhiyun				regulator-always-on;
258*4882a593Smuzhiyun				regulator-boot-on;
259*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
260*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
261*4882a593Smuzhiyun				regulator-name = "vcca_codec";
262*4882a593Smuzhiyun				regulator-state-mem {
263*4882a593Smuzhiyun					regulator-off-in-suspend;
264*4882a593Smuzhiyun				};
265*4882a593Smuzhiyun			};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun			vcc_tp: LDO_REG2 {
268*4882a593Smuzhiyun				regulator-always-on;
269*4882a593Smuzhiyun				regulator-boot-on;
270*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
271*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
272*4882a593Smuzhiyun				regulator-name = "vcc_tp";
273*4882a593Smuzhiyun				regulator-state-mem {
274*4882a593Smuzhiyun					regulator-off-in-suspend;
275*4882a593Smuzhiyun				};
276*4882a593Smuzhiyun			};
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
279*4882a593Smuzhiyun				regulator-always-on;
280*4882a593Smuzhiyun				regulator-boot-on;
281*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
282*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
283*4882a593Smuzhiyun				regulator-name = "vdd_10";
284*4882a593Smuzhiyun				regulator-state-mem {
285*4882a593Smuzhiyun					regulator-on-in-suspend;
286*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
287*4882a593Smuzhiyun				};
288*4882a593Smuzhiyun			};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun			vcc18_lcd: LDO_REG4 {
291*4882a593Smuzhiyun				regulator-always-on;
292*4882a593Smuzhiyun				regulator-boot-on;
293*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
294*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
295*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
296*4882a593Smuzhiyun				regulator-state-mem {
297*4882a593Smuzhiyun					regulator-off-in-suspend;
298*4882a593Smuzhiyun				};
299*4882a593Smuzhiyun			};
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun			vccio_pmu: LDO_REG5 {
302*4882a593Smuzhiyun				regulator-always-on;
303*4882a593Smuzhiyun				regulator-boot-on;
304*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
305*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
306*4882a593Smuzhiyun				regulator-name = "vccio_pmu";
307*4882a593Smuzhiyun				regulator-state-mem {
308*4882a593Smuzhiyun					regulator-on-in-suspend;
309*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
310*4882a593Smuzhiyun				};
311*4882a593Smuzhiyun			};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
314*4882a593Smuzhiyun				regulator-always-on;
315*4882a593Smuzhiyun				regulator-boot-on;
316*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
317*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
318*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
319*4882a593Smuzhiyun				regulator-state-mem {
320*4882a593Smuzhiyun					regulator-off-in-suspend;
321*4882a593Smuzhiyun				};
322*4882a593Smuzhiyun			};
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
325*4882a593Smuzhiyun				regulator-always-on;
326*4882a593Smuzhiyun				regulator-boot-on;
327*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
328*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
329*4882a593Smuzhiyun				regulator-name = "vcc_18";
330*4882a593Smuzhiyun				regulator-state-mem {
331*4882a593Smuzhiyun					regulator-on-in-suspend;
332*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
333*4882a593Smuzhiyun				};
334*4882a593Smuzhiyun			};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun			vccio_wl: LDO_REG8 {
337*4882a593Smuzhiyun				regulator-always-on;
338*4882a593Smuzhiyun				regulator-boot-on;
339*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
340*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
341*4882a593Smuzhiyun				regulator-name = "vccio_wl";
342*4882a593Smuzhiyun				regulator-state-mem {
343*4882a593Smuzhiyun					regulator-on-in-suspend;
344*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
345*4882a593Smuzhiyun				};
346*4882a593Smuzhiyun			};
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun			vccio_sd: LDO_REG9 {
349*4882a593Smuzhiyun				regulator-always-on;
350*4882a593Smuzhiyun				regulator-boot-on;
351*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
352*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
353*4882a593Smuzhiyun				regulator-name = "vccio_sd";
354*4882a593Smuzhiyun				regulator-state-mem {
355*4882a593Smuzhiyun					regulator-on-in-suspend;
356*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
357*4882a593Smuzhiyun				};
358*4882a593Smuzhiyun			};
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun			vcc_sd: SWITCH_REG {
361*4882a593Smuzhiyun				regulator-always-on;
362*4882a593Smuzhiyun				regulator-boot-on;
363*4882a593Smuzhiyun				regulator-name = "vcc_sd";
364*4882a593Smuzhiyun				regulator-state-mem {
365*4882a593Smuzhiyun					regulator-on-in-suspend;
366*4882a593Smuzhiyun				};
367*4882a593Smuzhiyun			};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun			h_5v: HDMI_SWITCH {
370*4882a593Smuzhiyun				regulator-always-on;
371*4882a593Smuzhiyun				regulator-boot-on;
372*4882a593Smuzhiyun				regulator-name = "h_5v";
373*4882a593Smuzhiyun				regulator-state-mem {
374*4882a593Smuzhiyun					regulator-on-in-suspend;
375*4882a593Smuzhiyun				};
376*4882a593Smuzhiyun			};
377*4882a593Smuzhiyun		};
378*4882a593Smuzhiyun	};
379*4882a593Smuzhiyun};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun&i2c1 {
382*4882a593Smuzhiyun	status = "okay";
383*4882a593Smuzhiyun	clock-frequency = <400000>;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun	mpu6050@68 {
386*4882a593Smuzhiyun		compatible = "invensense,mpu6050";
387*4882a593Smuzhiyun		status = "okay";
388*4882a593Smuzhiyun		pinctrl-names = "default";
389*4882a593Smuzhiyun		pinctrl-0 = <&mpu6050_irq_gpio>;
390*4882a593Smuzhiyun		reg = <0x68>;
391*4882a593Smuzhiyun		irq-gpio = <&gpio8 0 IRQ_TYPE_EDGE_RISING>;
392*4882a593Smuzhiyun		mpu-int_config = <0x10>;
393*4882a593Smuzhiyun		mpu-level_shifter = <0>;
394*4882a593Smuzhiyun		mpu-orientation = <0 1 0 1 0 0 0 0 1>;
395*4882a593Smuzhiyun		orientation-x= <0>;
396*4882a593Smuzhiyun		orientation-y= <1>;
397*4882a593Smuzhiyun		orientation-z= <0>;
398*4882a593Smuzhiyun		support-hw-poweroff = <1>;
399*4882a593Smuzhiyun		mpu-debug = <1>;
400*4882a593Smuzhiyun	};
401*4882a593Smuzhiyun};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun&lvds_panel {
404*4882a593Smuzhiyun	power-supply = <&vcc_lcd>;
405*4882a593Smuzhiyun};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun&rockchip_suspend {
408*4882a593Smuzhiyun	status = "okay";
409*4882a593Smuzhiyun};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun&tsadc {
412*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
413*4882a593Smuzhiyun};
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun&pinctrl {
416*4882a593Smuzhiyun	lcd {
417*4882a593Smuzhiyun		lcd_en: lcd-en  {
418*4882a593Smuzhiyun			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
419*4882a593Smuzhiyun		};
420*4882a593Smuzhiyun	};
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun	mpu6050 {
423*4882a593Smuzhiyun		mpu6050_irq_gpio: mpu6050-irq-gpio {
424*4882a593Smuzhiyun			rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
425*4882a593Smuzhiyun		};
426*4882a593Smuzhiyun	};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun	pmic {
429*4882a593Smuzhiyun		pmic_int: pmic-int {
430*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
431*4882a593Smuzhiyun		};
432*4882a593Smuzhiyun		vsel1_gpio: vsel1-gpio {
433*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
434*4882a593Smuzhiyun		};
435*4882a593Smuzhiyun	};
436*4882a593Smuzhiyun};
437