xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3288-evb-android-rk808-edp.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "rk3288-evb.dtsi"
9*4882a593Smuzhiyun#include "rk3288-android.dtsi"
10*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	panel {
14*4882a593Smuzhiyun		compatible = "simple-panel";
15*4882a593Smuzhiyun		backlight = <&backlight>;
16*4882a593Smuzhiyun		enable-gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_HIGH>;
17*4882a593Smuzhiyun		prepare-delay-ms = <120>;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun		display-timings {
20*4882a593Smuzhiyun			native-mode = <&timing0>;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun			timing0: timing0 {
23*4882a593Smuzhiyun				clock-frequency = <200000000>;
24*4882a593Smuzhiyun				hactive = <1536>;
25*4882a593Smuzhiyun				vactive = <2048>;
26*4882a593Smuzhiyun				hfront-porch = <12>;
27*4882a593Smuzhiyun				hsync-len = <16>;
28*4882a593Smuzhiyun				hback-porch = <48>;
29*4882a593Smuzhiyun				vfront-porch = <8>;
30*4882a593Smuzhiyun				vsync-len = <4>;
31*4882a593Smuzhiyun				vback-porch = <8>;
32*4882a593Smuzhiyun				hsync-active = <0>;
33*4882a593Smuzhiyun				vsync-active = <0>;
34*4882a593Smuzhiyun				de-active = <0>;
35*4882a593Smuzhiyun				pixelclk-active = <0>;
36*4882a593Smuzhiyun			};
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		port {
40*4882a593Smuzhiyun			panel_in_edp: endpoint {
41*4882a593Smuzhiyun				remote-endpoint = <&edp_out_panel>;
42*4882a593Smuzhiyun			};
43*4882a593Smuzhiyun		};
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
47*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
48*4882a593Smuzhiyun		clocks = <&rk808 1>;
49*4882a593Smuzhiyun		clock-names = "ext_clock";
50*4882a593Smuzhiyun		pinctrl-names = "default";
51*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		/*
54*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
55*4882a593Smuzhiyun		 * on the actual card populated):
56*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
57*4882a593Smuzhiyun		 * - PDN (power down when low)
58*4882a593Smuzhiyun		 */
59*4882a593Smuzhiyun		reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	test-power {
63*4882a593Smuzhiyun		status = "okay";
64*4882a593Smuzhiyun	};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	wireless-bluetooth {
67*4882a593Smuzhiyun		clocks = <&rk808 1>;
68*4882a593Smuzhiyun		clock-names = "ext_clock";
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	/delete-node/ sdmmc-regulator;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	vdd_log: vdd-logic {
74*4882a593Smuzhiyun		compatible = "pwm-regulator";
75*4882a593Smuzhiyun		rockchip,pwm_id = <1>;
76*4882a593Smuzhiyun		rockchip,pwm_voltage = <1100000>;
77*4882a593Smuzhiyun		pwms = <&pwm1 0 25000 1>;
78*4882a593Smuzhiyun		regulator-name = "vcc_log";
79*4882a593Smuzhiyun		regulator-min-microvolt = <860000>;
80*4882a593Smuzhiyun		regulator-max-microvolt = <1360000>;
81*4882a593Smuzhiyun		regulator-always-on;
82*4882a593Smuzhiyun		regulator-boot-on;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	xin32k: xin32k {
86*4882a593Smuzhiyun		compatible = "fixed-clock";
87*4882a593Smuzhiyun		clock-frequency = <32768>;
88*4882a593Smuzhiyun		clock-output-names = "xin32k";
89*4882a593Smuzhiyun		#clock-cells = <0>;
90*4882a593Smuzhiyun	};
91*4882a593Smuzhiyun};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun&backlight {
94*4882a593Smuzhiyun	pwms = <&pwm0 0 1000000 0>;
95*4882a593Smuzhiyun	enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
96*4882a593Smuzhiyun};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun&cpu0 {
99*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
100*4882a593Smuzhiyun};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun&cif_isp0 {
103*4882a593Smuzhiyun	status = "okay";
104*4882a593Smuzhiyun};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun&dfi {
107*4882a593Smuzhiyun	status = "okay";
108*4882a593Smuzhiyun};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun&dmc {
111*4882a593Smuzhiyun	center-supply = <&vdd_log>;
112*4882a593Smuzhiyun	status = "okay";
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun&edp {
116*4882a593Smuzhiyun	force-hpd;
117*4882a593Smuzhiyun	status = "okay";
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun	ports {
120*4882a593Smuzhiyun		port@1 {
121*4882a593Smuzhiyun			reg = <1>;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun			edp_out_panel: endpoint {
124*4882a593Smuzhiyun				remote-endpoint = <&panel_in_edp>;
125*4882a593Smuzhiyun			};
126*4882a593Smuzhiyun		};
127*4882a593Smuzhiyun	};
128*4882a593Smuzhiyun};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun&edp_in_vopb {
131*4882a593Smuzhiyun	status = "disabled";
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun&edp_in_vopl {
135*4882a593Smuzhiyun	status = "okay";
136*4882a593Smuzhiyun};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun&route_edp {
139*4882a593Smuzhiyun	connect = <&vopl_out_edp>;
140*4882a593Smuzhiyun	status = "okay";
141*4882a593Smuzhiyun};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun&gpu {
144*4882a593Smuzhiyun	status = "okay";
145*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
146*4882a593Smuzhiyun};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun&gmac {
149*4882a593Smuzhiyun	max-speed = <1000>;
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&hdmi_analog_sound {
153*4882a593Smuzhiyun	status = "disabled";
154*4882a593Smuzhiyun};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun&sound {
157*4882a593Smuzhiyun	status = "okay";
158*4882a593Smuzhiyun};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun&i2c0 {
161*4882a593Smuzhiyun	clock-frequency = <400000>;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun	rk808: pmic@1b {
164*4882a593Smuzhiyun		compatible = "rockchip,rk808";
165*4882a593Smuzhiyun		reg = <0x1b>;
166*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
167*4882a593Smuzhiyun		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
168*4882a593Smuzhiyun		pinctrl-names = "default";
169*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int &global_pwroff>;
170*4882a593Smuzhiyun		rockchip,system-power-controller;
171*4882a593Smuzhiyun		wakeup-source;
172*4882a593Smuzhiyun		#clock-cells = <1>;
173*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
176*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
177*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
178*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
179*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
180*4882a593Smuzhiyun		vcc8-supply = <&vcc_io>;
181*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
182*4882a593Smuzhiyun		vcc12-supply = <&vcc_io>;
183*4882a593Smuzhiyun		vddio-supply = <&vcc_io>;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun		regulators {
186*4882a593Smuzhiyun			vdd_cpu: DCDC_REG1 {
187*4882a593Smuzhiyun				regulator-always-on;
188*4882a593Smuzhiyun				regulator-boot-on;
189*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
190*4882a593Smuzhiyun				regulator-max-microvolt = <1400000>;
191*4882a593Smuzhiyun				regulator-name = "vdd_arm";
192*4882a593Smuzhiyun				regulator-state-mem {
193*4882a593Smuzhiyun					regulator-off-in-suspend;
194*4882a593Smuzhiyun				};
195*4882a593Smuzhiyun			};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
198*4882a593Smuzhiyun				regulator-always-on;
199*4882a593Smuzhiyun				regulator-boot-on;
200*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
201*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
202*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
203*4882a593Smuzhiyun				regulator-ramp-delay = <6000>;
204*4882a593Smuzhiyun				regulator-state-mem {
205*4882a593Smuzhiyun					regulator-off-in-suspend;
206*4882a593Smuzhiyun				};
207*4882a593Smuzhiyun			};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
210*4882a593Smuzhiyun				regulator-always-on;
211*4882a593Smuzhiyun				regulator-boot-on;
212*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
213*4882a593Smuzhiyun				regulator-state-mem {
214*4882a593Smuzhiyun					regulator-on-in-suspend;
215*4882a593Smuzhiyun				};
216*4882a593Smuzhiyun			};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
219*4882a593Smuzhiyun				regulator-always-on;
220*4882a593Smuzhiyun				regulator-boot-on;
221*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
222*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
223*4882a593Smuzhiyun				regulator-name = "vcc_io";
224*4882a593Smuzhiyun				regulator-state-mem {
225*4882a593Smuzhiyun					regulator-on-in-suspend;
226*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
227*4882a593Smuzhiyun				};
228*4882a593Smuzhiyun			};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun			vcc_tp: LDO_REG1 {
231*4882a593Smuzhiyun				regulator-always-on;
232*4882a593Smuzhiyun				regulator-boot-on;
233*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
234*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
235*4882a593Smuzhiyun				regulator-name = "vcc_tp";
236*4882a593Smuzhiyun				regulator-state-mem {
237*4882a593Smuzhiyun					regulator-off-in-suspend;
238*4882a593Smuzhiyun				};
239*4882a593Smuzhiyun			};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun			vcca_codec: LDO_REG2 {
242*4882a593Smuzhiyun				regulator-always-on;
243*4882a593Smuzhiyun				regulator-boot-on;
244*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
245*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
246*4882a593Smuzhiyun				regulator-name = "vcca_codec";
247*4882a593Smuzhiyun				regulator-state-mem {
248*4882a593Smuzhiyun					regulator-on-in-suspend;
249*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
250*4882a593Smuzhiyun				};
251*4882a593Smuzhiyun			};
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
254*4882a593Smuzhiyun				regulator-always-on;
255*4882a593Smuzhiyun				regulator-boot-on;
256*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
257*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
258*4882a593Smuzhiyun				regulator-name = "vdd_10";
259*4882a593Smuzhiyun				regulator-state-mem {
260*4882a593Smuzhiyun					regulator-on-in-suspend;
261*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
262*4882a593Smuzhiyun				};
263*4882a593Smuzhiyun			};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun			vcc_wl: LDO_REG4 {
266*4882a593Smuzhiyun				regulator-always-on;
267*4882a593Smuzhiyun				regulator-boot-on;
268*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
269*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
270*4882a593Smuzhiyun				regulator-name = "vcc_wl";
271*4882a593Smuzhiyun				regulator-state-mem {
272*4882a593Smuzhiyun					regulator-on-in-suspend;
273*4882a593Smuzhiyun				};
274*4882a593Smuzhiyun			};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun			vccio_sd: LDO_REG5 {
277*4882a593Smuzhiyun				regulator-always-on;
278*4882a593Smuzhiyun				regulator-boot-on;
279*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
280*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
281*4882a593Smuzhiyun				regulator-name = "vccio_sd";
282*4882a593Smuzhiyun				regulator-state-mem {
283*4882a593Smuzhiyun					regulator-off-in-suspend;
284*4882a593Smuzhiyun				};
285*4882a593Smuzhiyun			};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
288*4882a593Smuzhiyun				regulator-always-on;
289*4882a593Smuzhiyun				regulator-boot-on;
290*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
291*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
292*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
293*4882a593Smuzhiyun				regulator-state-mem {
294*4882a593Smuzhiyun					regulator-off-in-suspend;
295*4882a593Smuzhiyun				};
296*4882a593Smuzhiyun			};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
299*4882a593Smuzhiyun				regulator-always-on;
300*4882a593Smuzhiyun				regulator-boot-on;
301*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
302*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
303*4882a593Smuzhiyun				regulator-name = "vcc_18";
304*4882a593Smuzhiyun				regulator-state-mem {
305*4882a593Smuzhiyun					regulator-on-in-suspend;
306*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
307*4882a593Smuzhiyun				};
308*4882a593Smuzhiyun			};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun			vcc18_lcd: LDO_REG8 {
311*4882a593Smuzhiyun				regulator-always-on;
312*4882a593Smuzhiyun				regulator-boot-on;
313*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
314*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
315*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
316*4882a593Smuzhiyun				regulator-state-mem {
317*4882a593Smuzhiyun					regulator-off-in-suspend;
318*4882a593Smuzhiyun				};
319*4882a593Smuzhiyun			};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun			vcc_sd: SWITCH_REG1 {
322*4882a593Smuzhiyun				regulator-always-on;
323*4882a593Smuzhiyun				regulator-boot-on;
324*4882a593Smuzhiyun				regulator-name = "vcc_sd";
325*4882a593Smuzhiyun				regulator-state-mem {
326*4882a593Smuzhiyun					regulator-off-in-suspend;
327*4882a593Smuzhiyun				};
328*4882a593Smuzhiyun			};
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun			vcc_lcd: SWITCH_REG2 {
331*4882a593Smuzhiyun				regulator-always-on;
332*4882a593Smuzhiyun				regulator-boot-on;
333*4882a593Smuzhiyun				regulator-name = "vcc_lcd";
334*4882a593Smuzhiyun				regulator-state-mem {
335*4882a593Smuzhiyun					regulator-off-in-suspend;
336*4882a593Smuzhiyun				};
337*4882a593Smuzhiyun			};
338*4882a593Smuzhiyun		};
339*4882a593Smuzhiyun	};
340*4882a593Smuzhiyun};
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun&i2c1 {
343*4882a593Smuzhiyun	status = "okay";
344*4882a593Smuzhiyun	clock-frequency = <400000>;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun	mpu6050_acc: mpu-acc@68 {
347*4882a593Smuzhiyun		status = "okay";
348*4882a593Smuzhiyun		compatible = "mpu6500_acc";
349*4882a593Smuzhiyun		pinctrl-names = "default";
350*4882a593Smuzhiyun		pinctrl-0 = <&mpu6050_irq_gpio>;
351*4882a593Smuzhiyun		reg = <0x68>;
352*4882a593Smuzhiyun		irq-gpio = <&gpio8 0 IRQ_TYPE_EDGE_RISING>;
353*4882a593Smuzhiyun		irq_enable = <0>;
354*4882a593Smuzhiyun		poll_delay_ms = <30>;
355*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
356*4882a593Smuzhiyun		layout = <8>;
357*4882a593Smuzhiyun	};
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun	mpu6050_gyro: mpu-gyro@68 {
360*4882a593Smuzhiyun		status = "okay";
361*4882a593Smuzhiyun		compatible = "mpu6500_gyro";
362*4882a593Smuzhiyun		reg = <0x68>;
363*4882a593Smuzhiyun		irq_enable = <0>;
364*4882a593Smuzhiyun		poll_delay_ms = <30>;
365*4882a593Smuzhiyun		type = <SENSOR_TYPE_GYROSCOPE>;
366*4882a593Smuzhiyun		layout = <8>;
367*4882a593Smuzhiyun	};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun	ak8963_compass: ak8963-compass@0d {
370*4882a593Smuzhiyun		status = "okay";
371*4882a593Smuzhiyun		compatible = "ak8963";
372*4882a593Smuzhiyun		pinctrl-names = "default";
373*4882a593Smuzhiyun		pinctrl-0 = <&ak8963_irq_gpio>;
374*4882a593Smuzhiyun		reg = <0x0d>;
375*4882a593Smuzhiyun		type = <SENSOR_TYPE_COMPASS>;
376*4882a593Smuzhiyun		irq-gpio = <&gpio8 1 IRQ_TYPE_EDGE_RISING>;
377*4882a593Smuzhiyun		irq_enable = <0>;
378*4882a593Smuzhiyun		poll_delay_ms = <30>;
379*4882a593Smuzhiyun		layout = <1>;
380*4882a593Smuzhiyun	};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun&io_domains {
385*4882a593Smuzhiyun	status = "okay";
386*4882a593Smuzhiyun	audio-supply = <&vcc_io>;
387*4882a593Smuzhiyun	bb-supply = <&vcc_io>;
388*4882a593Smuzhiyun	dvp-supply = <&vcc_io>;
389*4882a593Smuzhiyun	flash0-supply = <&vcc_18>;
390*4882a593Smuzhiyun	flash1-supply = <&vcc_io>;
391*4882a593Smuzhiyun	gpio30-supply = <&vcc_io>;
392*4882a593Smuzhiyun	gpio1830 = <&vcc_io>;
393*4882a593Smuzhiyun	lcdc-supply = <&vcc_lcd>;
394*4882a593Smuzhiyun	sdcard-supply = <&vccio_sd>;
395*4882a593Smuzhiyun	wifi-supply = <&vcc_wl>;
396*4882a593Smuzhiyun};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun&rockchip_suspend {
399*4882a593Smuzhiyun	status = "okay";
400*4882a593Smuzhiyun	rockchip,pwm-regulator-config = <
401*4882a593Smuzhiyun	(0
402*4882a593Smuzhiyun	| PWM1_REGULATOR_EN
403*4882a593Smuzhiyun	)
404*4882a593Smuzhiyun	>;
405*4882a593Smuzhiyun};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun&pwm0 {
408*4882a593Smuzhiyun	status = "okay";
409*4882a593Smuzhiyun};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun&pwm1 {
412*4882a593Smuzhiyun	status = "okay";
413*4882a593Smuzhiyun	pinctrl-names = "active";
414*4882a593Smuzhiyun	pinctrl-0 = <&pwm1_pin_pull_down>;
415*4882a593Smuzhiyun};
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun&pinctrl {
418*4882a593Smuzhiyun	mpu6050 {
419*4882a593Smuzhiyun		mpu6050_irq_gpio: mpu6050-irq-gpio {
420*4882a593Smuzhiyun			rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
421*4882a593Smuzhiyun		};
422*4882a593Smuzhiyun	};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun	ak8963 {
425*4882a593Smuzhiyun		ak8963_irq_gpio: ak8963-irq-gpio {
426*4882a593Smuzhiyun			rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
427*4882a593Smuzhiyun		};
428*4882a593Smuzhiyun	};
429*4882a593Smuzhiyun};
430