1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/dts-v1/; 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 6*4882a593Smuzhiyun#include "rk3229.dtsi" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "Mecer Xtreme Mini S6"; 10*4882a593Smuzhiyun compatible = "mecer,xms6", "rockchip,rk3229"; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun memory@60000000 { 13*4882a593Smuzhiyun device_type = "memory"; 14*4882a593Smuzhiyun reg = <0x60000000 0x40000000>; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun dc_12v: dc-12v-regulator { 18*4882a593Smuzhiyun compatible = "regulator-fixed"; 19*4882a593Smuzhiyun regulator-name = "dc_12v"; 20*4882a593Smuzhiyun regulator-always-on; 21*4882a593Smuzhiyun regulator-boot-on; 22*4882a593Smuzhiyun regulator-min-microvolt = <12000000>; 23*4882a593Smuzhiyun regulator-max-microvolt = <12000000>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun ext_gmac: ext_gmac { 27*4882a593Smuzhiyun compatible = "fixed-clock"; 28*4882a593Smuzhiyun clock-frequency = <125000000>; 29*4882a593Smuzhiyun clock-output-names = "ext_gmac"; 30*4882a593Smuzhiyun #clock-cells = <0>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun power-led { 34*4882a593Smuzhiyun compatible = "gpio-leds"; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun blue_led: led-0 { 37*4882a593Smuzhiyun gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 38*4882a593Smuzhiyun default-state = "on"; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 43*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 44*4882a593Smuzhiyun reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, 45*4882a593Smuzhiyun <&gpio2 29 GPIO_ACTIVE_LOW>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun vcc_host: vcc-host-regulator { 49*4882a593Smuzhiyun compatible = "regulator-fixed"; 50*4882a593Smuzhiyun enable-active-high; 51*4882a593Smuzhiyun gpio = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; 52*4882a593Smuzhiyun pinctrl-names = "default"; 53*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 54*4882a593Smuzhiyun regulator-name = "vcc_host"; 55*4882a593Smuzhiyun regulator-always-on; 56*4882a593Smuzhiyun regulator-boot-on; 57*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 61*4882a593Smuzhiyun compatible = "regulator-fixed"; 62*4882a593Smuzhiyun enable-active-high; 63*4882a593Smuzhiyun regulator-name = "vcc_phy"; 64*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 65*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 66*4882a593Smuzhiyun regulator-always-on; 67*4882a593Smuzhiyun regulator-boot-on; 68*4882a593Smuzhiyun vin-supply = <&vccio_1v8>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun vcc_sys: vcc-sys-regulator { 72*4882a593Smuzhiyun compatible = "regulator-fixed"; 73*4882a593Smuzhiyun regulator-name = "vcc_sys"; 74*4882a593Smuzhiyun regulator-always-on; 75*4882a593Smuzhiyun regulator-boot-on; 76*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 77*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 78*4882a593Smuzhiyun vin-supply = <&dc_12v>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun vccio_1v8: vccio-1v8-regulator { 82*4882a593Smuzhiyun compatible = "regulator-fixed"; 83*4882a593Smuzhiyun regulator-name = "vccio_1v8"; 84*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 85*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 86*4882a593Smuzhiyun regulator-always-on; 87*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun vccio_3v3: vccio-3v3-regulator { 91*4882a593Smuzhiyun compatible = "regulator-fixed"; 92*4882a593Smuzhiyun regulator-name = "vccio_3v3"; 93*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 94*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 95*4882a593Smuzhiyun regulator-always-on; 96*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun vdd_arm: vdd-arm-regulator { 100*4882a593Smuzhiyun compatible = "pwm-regulator"; 101*4882a593Smuzhiyun pwms = <&pwm1 0 25000 1>; 102*4882a593Smuzhiyun pwm-supply = <&vcc_sys>; 103*4882a593Smuzhiyun regulator-name = "vdd_arm"; 104*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 105*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 106*4882a593Smuzhiyun regulator-always-on; 107*4882a593Smuzhiyun regulator-boot-on; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun vdd_log: vdd-log-regulator { 111*4882a593Smuzhiyun compatible = "pwm-regulator"; 112*4882a593Smuzhiyun pwms = <&pwm2 0 25000 1>; 113*4882a593Smuzhiyun pwm-supply = <&vcc_sys>; 114*4882a593Smuzhiyun regulator-name = "vdd_log"; 115*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 116*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 117*4882a593Smuzhiyun regulator-always-on; 118*4882a593Smuzhiyun regulator-boot-on; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun}; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun&cpu0 { 123*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 124*4882a593Smuzhiyun}; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun&cpu1 { 127*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 128*4882a593Smuzhiyun}; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun&cpu2 { 131*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 132*4882a593Smuzhiyun}; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun&cpu3 { 135*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 136*4882a593Smuzhiyun}; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun&emmc { 139*4882a593Smuzhiyun cap-mmc-highspeed; 140*4882a593Smuzhiyun non-removable; 141*4882a593Smuzhiyun status = "okay"; 142*4882a593Smuzhiyun}; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun&gmac { 145*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC_SRC>; 146*4882a593Smuzhiyun assigned-clock-rates = <50000000>; 147*4882a593Smuzhiyun clock_in_out = "output"; 148*4882a593Smuzhiyun phy-handle = <&phy>; 149*4882a593Smuzhiyun phy-mode = "rmii"; 150*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 151*4882a593Smuzhiyun status = "okay"; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun mdio { 154*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 155*4882a593Smuzhiyun #address-cells = <1>; 156*4882a593Smuzhiyun #size-cells = <0>; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun phy: ethernet-phy@0 { 159*4882a593Smuzhiyun compatible = "ethernet-phy-id1234.d400", 160*4882a593Smuzhiyun "ethernet-phy-ieee802.3-c22"; 161*4882a593Smuzhiyun reg = <0>; 162*4882a593Smuzhiyun clocks = <&cru SCLK_MAC_PHY>; 163*4882a593Smuzhiyun phy-is-integrated; 164*4882a593Smuzhiyun resets = <&cru SRST_MACPHY>; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun}; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun&gpu { 170*4882a593Smuzhiyun mali-supply = <&vdd_log>; 171*4882a593Smuzhiyun status = "okay"; 172*4882a593Smuzhiyun}; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun&hdmi { 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun}; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun&hdmi_phy { 179*4882a593Smuzhiyun status = "okay"; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun&iep_mmu { 183*4882a593Smuzhiyun status = "okay"; 184*4882a593Smuzhiyun}; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun&io_domains { 187*4882a593Smuzhiyun status = "okay"; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun vccio1-supply = <&vccio_3v3>; 190*4882a593Smuzhiyun vccio2-supply = <&vccio_1v8>; 191*4882a593Smuzhiyun vccio4-supply = <&vccio_3v3>; 192*4882a593Smuzhiyun}; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun&pinctrl { 195*4882a593Smuzhiyun usb { 196*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 197*4882a593Smuzhiyun rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun}; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun&pwm1 { 203*4882a593Smuzhiyun status = "okay"; 204*4882a593Smuzhiyun}; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun&pwm2 { 207*4882a593Smuzhiyun status = "okay"; 208*4882a593Smuzhiyun}; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun&sdio { 211*4882a593Smuzhiyun bus-width = <4>; 212*4882a593Smuzhiyun cap-sd-highspeed; 213*4882a593Smuzhiyun cap-sdio-irq; 214*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 215*4882a593Smuzhiyun non-removable; 216*4882a593Smuzhiyun vqmmc-supply = <&vccio_1v8>; 217*4882a593Smuzhiyun status = "okay"; 218*4882a593Smuzhiyun}; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun&sdmmc { 221*4882a593Smuzhiyun cap-mmc-highspeed; 222*4882a593Smuzhiyun disable-wp; 223*4882a593Smuzhiyun status = "okay"; 224*4882a593Smuzhiyun}; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun&tsadc { 227*4882a593Smuzhiyun rockchip,hw-tshut-mode = <0>; 228*4882a593Smuzhiyun status = "okay"; 229*4882a593Smuzhiyun}; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun&u2phy0 { 232*4882a593Smuzhiyun status = "okay"; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun u2phy0_host: host-port { 235*4882a593Smuzhiyun phy-supply = <&vcc_host>; 236*4882a593Smuzhiyun status = "okay"; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun u2phy0_otg: otg-port { 240*4882a593Smuzhiyun phy-supply = <&vcc_host>; 241*4882a593Smuzhiyun status = "okay"; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun}; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun&u2phy1 { 246*4882a593Smuzhiyun status = "okay"; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun u2phy1_host: host-port { 249*4882a593Smuzhiyun phy-supply = <&vcc_host>; 250*4882a593Smuzhiyun status = "okay"; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun u2phy1_otg: otg-port { 254*4882a593Smuzhiyun phy-supply = <&vcc_host>; 255*4882a593Smuzhiyun status = "okay"; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun}; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun&uart2 { 260*4882a593Smuzhiyun pinctrl-0 = <&uart21_xfer>; 261*4882a593Smuzhiyun status = "okay"; 262*4882a593Smuzhiyun}; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun&usb_host0_ehci { 265*4882a593Smuzhiyun status = "okay"; 266*4882a593Smuzhiyun}; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun&usb_host0_ohci { 269*4882a593Smuzhiyun status = "okay"; 270*4882a593Smuzhiyun}; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun&usb_host1_ehci { 273*4882a593Smuzhiyun status = "okay"; 274*4882a593Smuzhiyun}; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun&usb_host1_ohci { 277*4882a593Smuzhiyun status = "okay"; 278*4882a593Smuzhiyun}; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun&usb_host2_ehci { 281*4882a593Smuzhiyun status = "okay"; 282*4882a593Smuzhiyun}; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun&usb_host2_ohci { 285*4882a593Smuzhiyun status = "okay"; 286*4882a593Smuzhiyun}; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun&usb_otg { 289*4882a593Smuzhiyun status = "okay"; 290*4882a593Smuzhiyun}; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun&vop { 293*4882a593Smuzhiyun status = "okay"; 294*4882a593Smuzhiyun}; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun&vop_mmu { 297*4882a593Smuzhiyun status = "okay"; 298*4882a593Smuzhiyun}; 299