1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 12*4882a593Smuzhiyun * License, or (at your option) any later version. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 43*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun#include "rk3229-at-common.dtsi" 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun/ { 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun hdmi_sound: hdmi-sound { 50*4882a593Smuzhiyun status = "okay"; 51*4882a593Smuzhiyun compatible = "simple-audio-card"; 52*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 53*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 54*4882a593Smuzhiyun simple-audio-card,name = "rockchip,hdmi"; 55*4882a593Smuzhiyun simple-audio-card,cpu { 56*4882a593Smuzhiyun sound-dai = <&i2s0>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun simple-audio-card,codec { 59*4882a593Smuzhiyun sound-dai = <&hdmi>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun gva_codec: gva-codec{ 64*4882a593Smuzhiyun compatible = "rockchip,gva-codec"; 65*4882a593Smuzhiyun #sound-dai-cells = <0>; 66*4882a593Smuzhiyun status = "okay"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun gva-sound { 70*4882a593Smuzhiyun compatible = "simple-audio-card"; 71*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 72*4882a593Smuzhiyun simple-audio-card,name = "rockchip,rk3229-dummy"; 73*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 74*4882a593Smuzhiyun simple-audio-card,cpu { 75*4882a593Smuzhiyun sound-dai = <&i2s1>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun simple-audio-card,codec { 78*4882a593Smuzhiyun sound-dai = <&gva_codec>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun vcc_otg_vbus: otg-vbus-regulator { 83*4882a593Smuzhiyun compatible = "regulator-fixed"; 84*4882a593Smuzhiyun gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; 85*4882a593Smuzhiyun pinctrl-names = "default"; 86*4882a593Smuzhiyun pinctrl-0 = <&otg_vbus_drv>; 87*4882a593Smuzhiyun regulator-name = "vcc_otg_vbus"; 88*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 89*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 90*4882a593Smuzhiyun enable-active-high; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&hdmi { 95*4882a593Smuzhiyun status = "okay"; 96*4882a593Smuzhiyun #sound-dai-cells = <0>; 97*4882a593Smuzhiyun ddc-i2c-scl-high-time-ns = <9625>; 98*4882a593Smuzhiyun ddc-i2c-scl-low-time-ns = <10000>; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&hdmi_phy { 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&i2c0 { 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun cw2015@62 { 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun compatible = "cw201x"; 111*4882a593Smuzhiyun reg = <0x62>; 112*4882a593Smuzhiyun bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 113*4882a593Smuzhiyun 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32 114*4882a593Smuzhiyun 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 115*4882a593Smuzhiyun 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 116*4882a593Smuzhiyun 0x52 0x52 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 117*4882a593Smuzhiyun 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 118*4882a593Smuzhiyun 0x96 0xFF 0x7B 0xBB 0xCB 0x2F 0x7D 0x72 0xA5 119*4882a593Smuzhiyun 0xB5 0xC1 0x46 0xAE>; 120*4882a593Smuzhiyun monitor_sec = <5>; 121*4882a593Smuzhiyun virtual_power = <0>; 122*4882a593Smuzhiyun hw_id_check = <1>; 123*4882a593Smuzhiyun hw-id0-gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>; 124*4882a593Smuzhiyun hw-id1-gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun}; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun&i2c1 { 129*4882a593Smuzhiyun status = "okay"; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&i2c2 { 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun&i2s1 { 137*4882a593Smuzhiyun status = "okay"; 138*4882a593Smuzhiyun rockchip,i2s-broken-burst-len; 139*4882a593Smuzhiyun rockchip,playback-channels = <8>; 140*4882a593Smuzhiyun rockchip,capture-channels = <8>; 141*4882a593Smuzhiyun rockchip,bclk-fs = <64>; 142*4882a593Smuzhiyun #sound-dai-cells = <0>; 143*4882a593Smuzhiyun}; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun&pinctrl { 146*4882a593Smuzhiyun sdmmc { 147*4882a593Smuzhiyun sdmmc_gpio: sdmmc-gpio { 148*4882a593Smuzhiyun rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, 149*4882a593Smuzhiyun <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 150*4882a593Smuzhiyun <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, 151*4882a593Smuzhiyun <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>, 152*4882a593Smuzhiyun <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>, 153*4882a593Smuzhiyun <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>, 154*4882a593Smuzhiyun <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>, 155*4882a593Smuzhiyun <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun fixed_io { 160*4882a593Smuzhiyun fixed_gpio: fixed-gpio { 161*4882a593Smuzhiyun rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, 162*4882a593Smuzhiyun <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, 163*4882a593Smuzhiyun <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, 164*4882a593Smuzhiyun <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, 165*4882a593Smuzhiyun <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, 166*4882a593Smuzhiyun <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, 167*4882a593Smuzhiyun <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, 168*4882a593Smuzhiyun <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, 169*4882a593Smuzhiyun <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, 170*4882a593Smuzhiyun <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 171*4882a593Smuzhiyun <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, 172*4882a593Smuzhiyun <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, 173*4882a593Smuzhiyun <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, 174*4882a593Smuzhiyun <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, 175*4882a593Smuzhiyun <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, 176*4882a593Smuzhiyun <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, 177*4882a593Smuzhiyun <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>, 178*4882a593Smuzhiyun <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun ir { 183*4882a593Smuzhiyun ir_gpio: ir-gpio { 184*4882a593Smuzhiyun rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun pwm0 { 189*4882a593Smuzhiyun pwm0_gpio: pwm0-gpio { 190*4882a593Smuzhiyun rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun pwm2 { 195*4882a593Smuzhiyun pwm2_gpio: pwm2-gpio { 196*4882a593Smuzhiyun rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun spdif { 201*4882a593Smuzhiyun spdif_gpio: spdif-gpio { 202*4882a593Smuzhiyun rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun usb { 207*4882a593Smuzhiyun otg_vbus_drv: otg-vbus-drv { 208*4882a593Smuzhiyun rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun}; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun&rockchip_suspend { 214*4882a593Smuzhiyun status = "okay"; 215*4882a593Smuzhiyun rockchip,sleep-mode-config = < 216*4882a593Smuzhiyun (0 217*4882a593Smuzhiyun |RKPM_CTR_GTCLKS 218*4882a593Smuzhiyun |RKPM_CTR_IDLESRAM_MD 219*4882a593Smuzhiyun |RKPM_CTR_PMIC 220*4882a593Smuzhiyun ) 221*4882a593Smuzhiyun >; 222*4882a593Smuzhiyun}; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun&sdio { 225*4882a593Smuzhiyun bus-width = <4>; 226*4882a593Smuzhiyun cap-mmc-highspeed; 227*4882a593Smuzhiyun cap-sd-highspeed; 228*4882a593Smuzhiyun cap-sdio-irq; 229*4882a593Smuzhiyun non-removable; 230*4882a593Smuzhiyun ignore-pm-notify; 231*4882a593Smuzhiyun keep-power-in-suspend; 232*4882a593Smuzhiyun max-frequency = <150000000>; 233*4882a593Smuzhiyun no-sd; 234*4882a593Smuzhiyun no-mmc; 235*4882a593Smuzhiyun}; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun&spi0 { 238*4882a593Smuzhiyun status = "okay"; 239*4882a593Smuzhiyun max-freq = <48000000>; 240*4882a593Smuzhiyun pinctrl-names = "default"; 241*4882a593Smuzhiyun pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0 &spi1_cs1>; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun spi_slave@0 { 244*4882a593Smuzhiyun compatible = "rockchip,spidev"; 245*4882a593Smuzhiyun reg = <0>; 246*4882a593Smuzhiyun spi-max-frequency = <12000000>; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun spi_slave@1 { 250*4882a593Smuzhiyun compatible = "rockchip,spidev"; 251*4882a593Smuzhiyun reg = <1>; 252*4882a593Smuzhiyun spi-max-frequency = <12000000>; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun}; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun&u2phy0 { 257*4882a593Smuzhiyun status = "okay"; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun u2phy0_otg: otg-port { 260*4882a593Smuzhiyun vbus-supply = <&vcc_otg_vbus>; 261*4882a593Smuzhiyun status = "okay"; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun u2phy0_host: host-port { 265*4882a593Smuzhiyun status = "okay"; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun}; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun&u2phy1 { 270*4882a593Smuzhiyun status = "okay"; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun u2phy1_otg: otg-port { 273*4882a593Smuzhiyun status = "okay"; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun u2phy1_host: host-port { 277*4882a593Smuzhiyun status = "okay"; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun}; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun&usb_host0_ehci { 282*4882a593Smuzhiyun status = "okay"; 283*4882a593Smuzhiyun}; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun&usb_host0_ohci { 286*4882a593Smuzhiyun status = "okay"; 287*4882a593Smuzhiyun}; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun&uart0 { 290*4882a593Smuzhiyun pinctrl-names = "default"; 291*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer>; 292*4882a593Smuzhiyun status = "okay"; 293*4882a593Smuzhiyun}; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun&uart1 { 296*4882a593Smuzhiyun pinctrl-names = "default"; 297*4882a593Smuzhiyun pinctrl-0 = <&uart11_xfer &uart11_cts>; 298*4882a593Smuzhiyun status = "okay"; 299*4882a593Smuzhiyun}; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun&usb_otg { 302*4882a593Smuzhiyun status = "okay"; 303*4882a593Smuzhiyun}; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun&gmac { 306*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC_SRC>; 307*4882a593Smuzhiyun assigned-clock-rates = <50000000>; 308*4882a593Smuzhiyun clock_in_out = "output"; 309*4882a593Smuzhiyun phy-supply = <&vcc_18>; 310*4882a593Smuzhiyun phy-mode = "rmii"; 311*4882a593Smuzhiyun phy-is-integrated; 312*4882a593Smuzhiyun status = "okay"; 313*4882a593Smuzhiyun}; 314