xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3229-at-som.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1/*
2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This file is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This file is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 *  Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42#include <dt-bindings/pwm/pwm.h>
43#include <dt-bindings/input/input.h>
44
45#include "rk3229-at-common.dtsi"
46
47/ {
48
49	hdmi_sound: hdmi-sound {
50		status = "okay";
51		compatible = "simple-audio-card";
52		simple-audio-card,format = "i2s";
53		simple-audio-card,mclk-fs = <256>;
54		simple-audio-card,name = "rockchip,hdmi";
55		simple-audio-card,cpu {
56			sound-dai = <&i2s0>;
57		};
58		simple-audio-card,codec {
59			sound-dai = <&hdmi>;
60		};
61	};
62
63	gva_codec: gva-codec{
64		compatible = "rockchip,gva-codec";
65		#sound-dai-cells = <0>;
66		status = "okay";
67	};
68
69	gva-sound {
70		compatible = "simple-audio-card";
71		simple-audio-card,format = "i2s";
72		simple-audio-card,name = "rockchip,rk3229-dummy";
73		simple-audio-card,mclk-fs = <256>;
74		simple-audio-card,cpu {
75			sound-dai = <&i2s1>;
76		};
77		simple-audio-card,codec {
78			sound-dai = <&gva_codec>;
79		};
80	};
81
82	vcc_otg_vbus: otg-vbus-regulator {
83		compatible = "regulator-fixed";
84		gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
85		pinctrl-names = "default";
86		pinctrl-0 = <&otg_vbus_drv>;
87		regulator-name = "vcc_otg_vbus";
88		regulator-min-microvolt = <5000000>;
89		regulator-max-microvolt = <5000000>;
90		enable-active-high;
91	};
92};
93
94&hdmi {
95	status = "okay";
96	#sound-dai-cells = <0>;
97	ddc-i2c-scl-high-time-ns = <9625>;
98	ddc-i2c-scl-low-time-ns = <10000>;
99};
100
101&hdmi_phy {
102	status = "okay";
103};
104
105&i2c0 {
106	status = "okay";
107
108	cw2015@62 {
109		status = "okay";
110		compatible = "cw201x";
111		reg = <0x62>;
112		bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58
113		0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
114		0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45
115		0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D
116		0x52 0x52 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43
117		0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92
118		0x96 0xFF 0x7B 0xBB 0xCB 0x2F 0x7D 0x72 0xA5
119		0xB5 0xC1 0x46 0xAE>;
120		monitor_sec = <5>;
121		virtual_power = <0>;
122		hw_id_check = <1>;
123		hw-id0-gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;
124		hw-id1-gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
125	};
126};
127
128&i2c1 {
129	status = "okay";
130};
131
132&i2c2 {
133	status = "okay";
134};
135
136&i2s1 {
137	status = "okay";
138	rockchip,i2s-broken-burst-len;
139	rockchip,playback-channels = <8>;
140	rockchip,capture-channels = <8>;
141	rockchip,bclk-fs = <64>;
142	#sound-dai-cells = <0>;
143};
144
145&pinctrl {
146	sdmmc {
147		sdmmc_gpio: sdmmc-gpio {
148			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
149					<1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
150					<1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
151					<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>,
152					<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>,
153					<1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>,
154					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>,
155					<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
156		};
157	};
158
159	fixed_io {
160		fixed_gpio: fixed-gpio {
161			rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
162					<2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
163					<2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,
164					<2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
165					<2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
166					<2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
167					<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
168					<2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
169					<2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,
170					<2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
171					<2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
172					<2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
173					<1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,
174					<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>,
175					<1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,
176					<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
177					<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>,
178					<0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
179		};
180	};
181
182	ir {
183		ir_gpio: ir-gpio {
184			rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
185		};
186	};
187
188	pwm0 {
189		pwm0_gpio: pwm0-gpio {
190			rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
191		};
192	};
193
194	pwm2 {
195		pwm2_gpio: pwm2-gpio {
196			rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
197		};
198	};
199
200	spdif {
201		spdif_gpio: spdif-gpio {
202			rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
203		};
204	};
205
206	usb {
207		otg_vbus_drv: otg-vbus-drv {
208			rockchip,pins =	<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
209		};
210	};
211};
212
213&rockchip_suspend {
214	status = "okay";
215	rockchip,sleep-mode-config = <
216		(0
217		|RKPM_CTR_GTCLKS
218		|RKPM_CTR_IDLESRAM_MD
219		|RKPM_CTR_PMIC
220		)
221	>;
222};
223
224&sdio {
225	bus-width = <4>;
226	cap-mmc-highspeed;
227	cap-sd-highspeed;
228	cap-sdio-irq;
229	non-removable;
230	ignore-pm-notify;
231	keep-power-in-suspend;
232	max-frequency = <150000000>;
233	no-sd;
234	no-mmc;
235};
236
237&spi0 {
238	status = "okay";
239	max-freq = <48000000>;
240	pinctrl-names = "default";
241	pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0 &spi1_cs1>;
242
243	spi_slave@0 {
244		compatible = "rockchip,spidev";
245		reg = <0>;
246		spi-max-frequency = <12000000>;
247	};
248
249	spi_slave@1 {
250		compatible = "rockchip,spidev";
251		reg = <1>;
252		spi-max-frequency = <12000000>;
253	};
254};
255
256&u2phy0 {
257	status = "okay";
258
259	u2phy0_otg: otg-port {
260		vbus-supply = <&vcc_otg_vbus>;
261		status = "okay";
262	};
263
264	u2phy0_host: host-port {
265		status = "okay";
266	};
267};
268
269&u2phy1 {
270	status = "okay";
271
272	u2phy1_otg: otg-port {
273		status = "okay";
274	};
275
276	u2phy1_host: host-port {
277		status = "okay";
278	};
279};
280
281&usb_host0_ehci {
282	status = "okay";
283};
284
285&usb_host0_ohci {
286	status = "okay";
287};
288
289&uart0 {
290	pinctrl-names = "default";
291	pinctrl-0 = <&uart0_xfer>;
292	status = "okay";
293};
294
295&uart1 {
296	pinctrl-names = "default";
297	pinctrl-0 = <&uart11_xfer &uart11_cts>;
298	status = "okay";
299};
300
301&usb_otg {
302	status = "okay";
303};
304
305&gmac {
306	assigned-clocks = <&cru SCLK_MAC_SRC>;
307	assigned-clock-rates = <50000000>;
308	clock_in_out = "output";
309	phy-supply = <&vcc_18>;
310	phy-mode = "rmii";
311	phy-is-integrated;
312	status = "okay";
313};
314