1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 12*4882a593Smuzhiyun * License, or (at your option) any later version. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun/dts-v1/; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun#include "rk3229-at-som.dtsi" 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun/ { 48*4882a593Smuzhiyun model = "RK3229 ANDROID THINGS GVA Board"; 49*4882a593Smuzhiyun compatible = "rockchip,rk3229-at-gva", "rockchip,rk3229"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 52*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 53*4882a593Smuzhiyun clocks = <&rk805 1>; 54*4882a593Smuzhiyun clock-names = "ext_clock"; 55*4882a593Smuzhiyun pinctrl-names = "default"; 56*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* 59*4882a593Smuzhiyun * On the module itself this is one of these (depending 60*4882a593Smuzhiyun * on the actual card populated): 61*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 62*4882a593Smuzhiyun * - PDN (power down when low) 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* GPIO3_B7 */ 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun wireless-bluetooth { 68*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 69*4882a593Smuzhiyun clocks = <&rk805 1>; 70*4882a593Smuzhiyun clock-names = "ext_clock"; 71*4882a593Smuzhiyun uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; 72*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 73*4882a593Smuzhiyun pinctrl-0 = <&uart11_rts>; 74*4882a593Smuzhiyun pinctrl-1 = <&uart11_rts_gpio>; 75*4882a593Smuzhiyun BT,reset_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; 76*4882a593Smuzhiyun BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>; 77*4882a593Smuzhiyun BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>; 78*4882a593Smuzhiyun status = "okay"; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun wireless-wlan { 82*4882a593Smuzhiyun compatible = "wlan-platdata"; 83*4882a593Smuzhiyun rockchip,grf = <&grf>; 84*4882a593Smuzhiyun wifi_chip_type = "ap6255"; 85*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>; 86*4882a593Smuzhiyun status = "okay"; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun gpio_keys { 90*4882a593Smuzhiyun compatible = "gpio-keys"; 91*4882a593Smuzhiyun #address-cells = <1>; 92*4882a593Smuzhiyun #size-cells = <0>; 93*4882a593Smuzhiyun autorepeat; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&pwr_key>; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun power_key { 99*4882a593Smuzhiyun label = "GPIO Key Power"; 100*4882a593Smuzhiyun gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 101*4882a593Smuzhiyun linux,code = <116>; 102*4882a593Smuzhiyun debounce-interval = <100>; 103*4882a593Smuzhiyun wakeup-source; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun}; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun&emmc { 110*4882a593Smuzhiyun /* 111*4882a593Smuzhiyun * enable emmc ddr mode, choose the 112*4882a593Smuzhiyun * according parameter base on the emmc 113*4882a593Smuzhiyun * io voltage. 114*4882a593Smuzhiyun */ 115*4882a593Smuzhiyun mmc-ddr-1_8v; 116*4882a593Smuzhiyun //mmc-ddr-1_2v; 117*4882a593Smuzhiyun status = "okay"; 118*4882a593Smuzhiyun}; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun&gpu { 121*4882a593Smuzhiyun status = "okay"; 122*4882a593Smuzhiyun}; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun&nandc { 125*4882a593Smuzhiyun status = "disabled"; 126*4882a593Smuzhiyun}; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun&pinctrl { 129*4882a593Smuzhiyun pinctrl-names = "default"; 130*4882a593Smuzhiyun /* 131*4882a593Smuzhiyun * sdmmc, pwm0, pwm2, ir, and spdif pins are defaultly set as gpio, 132*4882a593Smuzhiyun * if you want to enable it, please remove below besides fixed_gpio. 133*4882a593Smuzhiyun */ 134*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_gpio &pwm0_gpio &pwm2_gpio 135*4882a593Smuzhiyun &ir_gpio &spdif_gpio &fixed_gpio>; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun keys { 138*4882a593Smuzhiyun pwr_key: pwr-key { 139*4882a593Smuzhiyun rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_down>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun sdio-pwrseq { 144*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 145*4882a593Smuzhiyun rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun}; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun&reboot_mode { 151*4882a593Smuzhiyun /delete-property/ mode-bootloader; 152*4882a593Smuzhiyun}; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun&sdio { 155*4882a593Smuzhiyun max-frequency = <150000000>; 156*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 157*4882a593Smuzhiyun num-slots = <1>; 158*4882a593Smuzhiyun sd-uhs-sdr104; 159*4882a593Smuzhiyun status = "okay"; 160*4882a593Smuzhiyun}; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun/* 163*4882a593Smuzhiyun * If sdmmc is enabled on hardware, set status to okay. 164*4882a593Smuzhiyun * and remove the sdmmc_gpio from pinctrl-0 above. 165*4882a593Smuzhiyun */ 166*4882a593Smuzhiyun&sdmmc { 167*4882a593Smuzhiyun bus-width = <4>; 168*4882a593Smuzhiyun cap-mmc-highspeed; 169*4882a593Smuzhiyun cap-sd-highspeed; 170*4882a593Smuzhiyun card-detect-delay = <200>; 171*4882a593Smuzhiyun disable-wp; 172*4882a593Smuzhiyun max-frequency = <50000000>; 173*4882a593Smuzhiyun num-slots = <1>; 174*4882a593Smuzhiyun no-sdio; 175*4882a593Smuzhiyun no-mmc; 176*4882a593Smuzhiyun status = "disabled"; 177*4882a593Smuzhiyun}; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun&vop { 180*4882a593Smuzhiyun assigned-clocks = <&cru DCLK_VOP>; 181*4882a593Smuzhiyun assigned-clock-parents = <&cru HDMIPHY>; 182*4882a593Smuzhiyun status = "okay"; 183*4882a593Smuzhiyun}; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun&vop_mmu { 186*4882a593Smuzhiyun status = "okay"; 187*4882a593Smuzhiyun}; 188