1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0+ OR MIT). 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include "rk3229-at-som.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "RK3229 ANDROID THINGS Full Function Board"; 13*4882a593Smuzhiyun compatible = "rockchip,rk3229-at-3nod", "rockchip,rk3229"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun gpio_keys { 16*4882a593Smuzhiyun compatible = "gpio-keys"; 17*4882a593Smuzhiyun #address-cells = <1>; 18*4882a593Smuzhiyun #size-cells = <0>; 19*4882a593Smuzhiyun autorepeat; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun pinctrl-names = "default"; 22*4882a593Smuzhiyun pinctrl-0 = <&pwr_key>; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun power_key { 25*4882a593Smuzhiyun label = "GPIO Key Power"; 26*4882a593Smuzhiyun gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 27*4882a593Smuzhiyun linux,code = <116>; 28*4882a593Smuzhiyun debounce-interval = <100>; 29*4882a593Smuzhiyun wakeup-source; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 34*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 35*4882a593Smuzhiyun clocks = <&rk805 1>; 36*4882a593Smuzhiyun clock-names = "ext_clock"; 37*4882a593Smuzhiyun pinctrl-names = "default"; 38*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* 41*4882a593Smuzhiyun * On the module itself this is one of these (depending 42*4882a593Smuzhiyun * on the actual card populated): 43*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 44*4882a593Smuzhiyun * - PDN (power down when low) 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* GPIO3_B7 */ 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun wireless-bluetooth { 50*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 51*4882a593Smuzhiyun clocks = <&rk805 1>; 52*4882a593Smuzhiyun clock-names = "ext_clock"; 53*4882a593Smuzhiyun uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; 54*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 55*4882a593Smuzhiyun pinctrl-0 = <&uart11_rts>; 56*4882a593Smuzhiyun pinctrl-1 = <&uart11_rts_gpio>; 57*4882a593Smuzhiyun BT,reset_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; 58*4882a593Smuzhiyun BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>; 59*4882a593Smuzhiyun BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>; 60*4882a593Smuzhiyun status = "okay"; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun wireless-wlan { 64*4882a593Smuzhiyun compatible = "wlan-platdata"; 65*4882a593Smuzhiyun rockchip,grf = <&grf>; 66*4882a593Smuzhiyun wifi_chip_type = "ap6255"; 67*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>; 68*4882a593Smuzhiyun status = "okay"; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&emmc { 73*4882a593Smuzhiyun /* 74*4882a593Smuzhiyun * enable emmc ddr mode, choose the 75*4882a593Smuzhiyun * according parameter base on the emmc 76*4882a593Smuzhiyun * io voltage. 77*4882a593Smuzhiyun */ 78*4882a593Smuzhiyun mmc-ddr-1_8v; 79*4882a593Smuzhiyun status = "okay"; 80*4882a593Smuzhiyun}; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun&gpu { 83*4882a593Smuzhiyun status = "okay"; 84*4882a593Smuzhiyun}; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun&nandc { 87*4882a593Smuzhiyun status = "disabled"; 88*4882a593Smuzhiyun}; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun&pinctrl { 91*4882a593Smuzhiyun pinctrl-names = "default"; 92*4882a593Smuzhiyun /* 93*4882a593Smuzhiyun * sdmmc, pwm0, pwm2, ir, and spdif pins are defaultly set as gpio, 94*4882a593Smuzhiyun * if you want to enable it, please remove below besides fixed_gpio. 95*4882a593Smuzhiyun */ 96*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_gpio &pwm0_gpio &pwm2_gpio 97*4882a593Smuzhiyun &ir_gpio &spdif_gpio &fixed_gpio>; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun keys { 100*4882a593Smuzhiyun pwr_key: pwr-key { 101*4882a593Smuzhiyun rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_down>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun sdio-pwrseq { 106*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 107*4882a593Smuzhiyun rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun&reboot_mode { 113*4882a593Smuzhiyun /delete-property/ mode-bootloader; 114*4882a593Smuzhiyun}; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun&sdio { 117*4882a593Smuzhiyun max-frequency = <150000000>; 118*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 119*4882a593Smuzhiyun num-slots = <1>; 120*4882a593Smuzhiyun sd-uhs-sdr104; 121*4882a593Smuzhiyun status = "okay"; 122*4882a593Smuzhiyun}; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun&vop { 125*4882a593Smuzhiyun assigned-clocks = <&cru DCLK_VOP>; 126*4882a593Smuzhiyun assigned-clock-parents = <&cru HDMIPHY>; 127*4882a593Smuzhiyun status = "okay"; 128*4882a593Smuzhiyun}; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun&vop_mmu { 131*4882a593Smuzhiyun status = "okay"; 132*4882a593Smuzhiyun}; 133