xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3188-px3-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2016 Andy Yan <andy.yan@rock-chips.com>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
8*4882a593Smuzhiyun#include "rk3188.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Rockchip PX3-EVB";
12*4882a593Smuzhiyun	compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		stdout-path = "serial2:115200n8";
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	memory@60000000 {
19*4882a593Smuzhiyun		reg = <0x60000000 0x80000000>;
20*4882a593Smuzhiyun		device_type = "memory";
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	gpio-keys {
24*4882a593Smuzhiyun		compatible = "gpio-keys";
25*4882a593Smuzhiyun		autorepeat;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		power {
28*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
29*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
30*4882a593Smuzhiyun			label = "GPIO Key Power";
31*4882a593Smuzhiyun			linux,input-type = <1>;
32*4882a593Smuzhiyun			wakeup-source;
33*4882a593Smuzhiyun			debounce-interval = <100>;
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	vcc_sys: vsys-regulator {
38*4882a593Smuzhiyun		compatible = "regulator-fixed";
39*4882a593Smuzhiyun		regulator-name = "vsys";
40*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
41*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
42*4882a593Smuzhiyun		regulator-boot-on;
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun&cpu0 {
47*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
48*4882a593Smuzhiyun};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun&cpu1 {
51*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
52*4882a593Smuzhiyun};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun&cpu2 {
55*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
56*4882a593Smuzhiyun};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun&cpu3 {
59*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
60*4882a593Smuzhiyun};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun&emmc {
63*4882a593Smuzhiyun	bus-width = <8>;
64*4882a593Smuzhiyun	cap-mmc-highspeed;
65*4882a593Smuzhiyun	non-removable;
66*4882a593Smuzhiyun	pinctrl-names = "default";
67*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_rst>;
68*4882a593Smuzhiyun	status = "okay";
69*4882a593Smuzhiyun};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun&i2c0 {
72*4882a593Smuzhiyun	status = "okay";
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun	accelerometer@18 {
75*4882a593Smuzhiyun		compatible = "bosch,bma250";
76*4882a593Smuzhiyun		reg = <0x18>;
77*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
78*4882a593Smuzhiyun		interrupts = <RK_PB7 IRQ_TYPE_LEVEL_LOW>;
79*4882a593Smuzhiyun	};
80*4882a593Smuzhiyun};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun&i2c1 {
83*4882a593Smuzhiyun	status = "okay";
84*4882a593Smuzhiyun	clock-frequency = <400000>;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	rk808: pmic@1c {
87*4882a593Smuzhiyun		compatible = "rockchip,rk818";
88*4882a593Smuzhiyun		reg = <0x1c>;
89*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
90*4882a593Smuzhiyun		interrupts = <RK_PB3 IRQ_TYPE_LEVEL_LOW>;
91*4882a593Smuzhiyun		rockchip,system-power-controller;
92*4882a593Smuzhiyun		wakeup-source;
93*4882a593Smuzhiyun		#clock-cells = <1>;
94*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
97*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
98*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
99*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
100*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
101*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
102*4882a593Smuzhiyun		vcc8-supply = <&vcc_io>;
103*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun		regulators {
106*4882a593Smuzhiyun			vdd_cpu: DCDC_REG1 {
107*4882a593Smuzhiyun				regulator-always-on;
108*4882a593Smuzhiyun				regulator-boot-on;
109*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
110*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
111*4882a593Smuzhiyun				regulator-name = "vdd_arm";
112*4882a593Smuzhiyun				regulator-state-mem {
113*4882a593Smuzhiyun					regulator-off-in-suspend;
114*4882a593Smuzhiyun				};
115*4882a593Smuzhiyun			};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
118*4882a593Smuzhiyun				regulator-always-on;
119*4882a593Smuzhiyun				regulator-boot-on;
120*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
121*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
122*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
123*4882a593Smuzhiyun				regulator-state-mem {
124*4882a593Smuzhiyun					regulator-on-in-suspend;
125*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
126*4882a593Smuzhiyun				};
127*4882a593Smuzhiyun			};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
130*4882a593Smuzhiyun				regulator-always-on;
131*4882a593Smuzhiyun				regulator-boot-on;
132*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
133*4882a593Smuzhiyun				regulator-state-mem {
134*4882a593Smuzhiyun					regulator-on-in-suspend;
135*4882a593Smuzhiyun				};
136*4882a593Smuzhiyun			};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
139*4882a593Smuzhiyun				regulator-always-on;
140*4882a593Smuzhiyun				regulator-boot-on;
141*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
142*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
143*4882a593Smuzhiyun				regulator-name = "vcc_io";
144*4882a593Smuzhiyun				regulator-state-mem {
145*4882a593Smuzhiyun					regulator-on-in-suspend;
146*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
147*4882a593Smuzhiyun				};
148*4882a593Smuzhiyun			};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun			vcc_cif: LDO_REG1 {
151*4882a593Smuzhiyun				 regulator-min-microvolt = <3300000>;
152*4882a593Smuzhiyun				 regulator-max-microvolt = <3300000>;
153*4882a593Smuzhiyun				 regulator-name = "vcc_cif";
154*4882a593Smuzhiyun			};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun			vcc_jetta33: LDO_REG2 {
157*4882a593Smuzhiyun				regulator-always-on;
158*4882a593Smuzhiyun				regulator-boot-on;
159*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
160*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
161*4882a593Smuzhiyun				regulator-name = "vcc_jetta33";
162*4882a593Smuzhiyun			};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
165*4882a593Smuzhiyun				regulator-always-on;
166*4882a593Smuzhiyun				regulator-boot-on;
167*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
168*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
169*4882a593Smuzhiyun				regulator-name = "vdd_10";
170*4882a593Smuzhiyun				regulator-state-mem {
171*4882a593Smuzhiyun					regulator-on-in-suspend;
172*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
173*4882a593Smuzhiyun				};
174*4882a593Smuzhiyun			};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun			lvds_12: LDO_REG4 {
177*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
178*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
179*4882a593Smuzhiyun				regulator-name = "lvds_12";
180*4882a593Smuzhiyun			};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun			lvds_25: LDO_REG5 {
183*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
184*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
185*4882a593Smuzhiyun				regulator-name = "lvds_25";
186*4882a593Smuzhiyun			};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun			cif_18: LDO_REG6 {
189*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
190*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
191*4882a593Smuzhiyun				regulator-name = "cif_18";
192*4882a593Smuzhiyun			};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun			vcc_sd: LDO_REG7 {
195*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
196*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
197*4882a593Smuzhiyun				regulator-name = "vcc_sd";
198*4882a593Smuzhiyun				regulator-state-mem {
199*4882a593Smuzhiyun					regulator-on-in-suspend;
200*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
201*4882a593Smuzhiyun				};
202*4882a593Smuzhiyun			};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun			wl_18: LDO_REG8 {
205*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
206*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
207*4882a593Smuzhiyun				regulator-name = "wl_18";
208*4882a593Smuzhiyun			};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun			lcd_33: SWITCH_REG1 {
211*4882a593Smuzhiyun				regulator-name = "lcd_33";
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun		};
214*4882a593Smuzhiyun	};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun&i2c2 {
219*4882a593Smuzhiyun	gsl1680: touchscreen@40 {
220*4882a593Smuzhiyun		compatible = "silead,gsl1680";
221*4882a593Smuzhiyun		reg = <0x40>;
222*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
223*4882a593Smuzhiyun		interrupts = <RK_PB7 IRQ_TYPE_EDGE_FALLING>;
224*4882a593Smuzhiyun		power-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
225*4882a593Smuzhiyun		touchscreen-size-x = <800>;
226*4882a593Smuzhiyun		touchscreen-size-y = <1280>;
227*4882a593Smuzhiyun		silead,max-fingers = <5>;
228*4882a593Smuzhiyun	};
229*4882a593Smuzhiyun};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun&mmc0 {
232*4882a593Smuzhiyun	status = "okay";
233*4882a593Smuzhiyun	pinctrl-names = "default";
234*4882a593Smuzhiyun	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
235*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun	bus-width = <4>;
238*4882a593Smuzhiyun	cap-mmc-highspeed;
239*4882a593Smuzhiyun	cap-sd-highspeed;
240*4882a593Smuzhiyun	disable-wp;
241*4882a593Smuzhiyun};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun&pinctrl {
244*4882a593Smuzhiyun	pcfg_output_low: pcfg-output-low {
245*4882a593Smuzhiyun		output-low;
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun	usb {
249*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
250*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
251*4882a593Smuzhiyun		};
252*4882a593Smuzhiyun		otg_vbus_drv: otg-vbus-drv {
253*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
254*4882a593Smuzhiyun		};
255*4882a593Smuzhiyun	};
256*4882a593Smuzhiyun};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun&pwm1 {
259*4882a593Smuzhiyun	status = "okay";
260*4882a593Smuzhiyun};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun&pwm2 {
263*4882a593Smuzhiyun	status = "okay";
264*4882a593Smuzhiyun};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun&pwm3 {
267*4882a593Smuzhiyun	status = "okay";
268*4882a593Smuzhiyun};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun&uart0 {
271*4882a593Smuzhiyun	status = "okay";
272*4882a593Smuzhiyun};
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun&uart1 {
275*4882a593Smuzhiyun	status = "okay";
276*4882a593Smuzhiyun};
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun&uart2 {
279*4882a593Smuzhiyun	status = "okay";
280*4882a593Smuzhiyun};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun&uart3 {
283*4882a593Smuzhiyun	status = "okay";
284*4882a593Smuzhiyun};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun&usbphy {
287*4882a593Smuzhiyun	status = "okay";
288*4882a593Smuzhiyun};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun&usb_host {
291*4882a593Smuzhiyun	status = "okay";
292*4882a593Smuzhiyun};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun&usb_otg {
295*4882a593Smuzhiyun	status = "okay";
296*4882a593Smuzhiyun};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun&wdt {
299*4882a593Smuzhiyun	status = "okay";
300*4882a593Smuzhiyun};
301