1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "rk3128x.dtsi" 9*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 10*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun chosen: chosen { 14*4882a593Smuzhiyun bootargs = "earlycon=uart8250,mmio32,0x11030000"; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun fiq_debugger: fiq-debugger { 18*4882a593Smuzhiyun compatible = "rockchip,fiq-debugger"; 19*4882a593Smuzhiyun interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 20*4882a593Smuzhiyun rockchip,serial-id = <2>; 21*4882a593Smuzhiyun rockchip,signal-irq = <159>; 22*4882a593Smuzhiyun rockchip,wake-irq = <0>; 23*4882a593Smuzhiyun rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ 24*4882a593Smuzhiyun rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 25*4882a593Smuzhiyun pinctrl-names = "default"; 26*4882a593Smuzhiyun pinctrl-0 = <&uart21_xfer>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun firmware { 30*4882a593Smuzhiyun firmware_android: android {}; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun reserved_memory: reserved-memory { 34*4882a593Smuzhiyun #address-cells = <1>; 35*4882a593Smuzhiyun #size-cells = <1>; 36*4882a593Smuzhiyun ranges; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun drm_logo: drm-logo@00000000 { 39*4882a593Smuzhiyun compatible = "rockchip,drm-logo"; 40*4882a593Smuzhiyun reg = <0x0 0x0>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun secure_memory: secure-memory@80000000 { 44*4882a593Smuzhiyun compatible = "rockchip,secure-memory"; 45*4882a593Smuzhiyun reg = <0x80000000 0x0>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun ramoops: ramoops@62e00000 { 49*4882a593Smuzhiyun compatible = "ramoops"; 50*4882a593Smuzhiyun reg = <0x62e00000 0xf0000>; 51*4882a593Smuzhiyun record-size = <0x20000>; 52*4882a593Smuzhiyun console-size = <0x80000>; 53*4882a593Smuzhiyun ftrace-size = <0x00000>; 54*4882a593Smuzhiyun pmsg-size = <0x50000>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun gpio_keys: gpio-keys { 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun compatible = "gpio-keys"; 61*4882a593Smuzhiyun #address-cells = <1>; 62*4882a593Smuzhiyun #size-cells = <0>; 63*4882a593Smuzhiyun autorepeat; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun pinctrl-names = "default"; 66*4882a593Smuzhiyun pinctrl-0 = <&pwr_key &volume_up_key>; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun power_key: power-key { 69*4882a593Smuzhiyun label = "GPIO Key Power"; 70*4882a593Smuzhiyun gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 71*4882a593Smuzhiyun linux,code = <KEY_POWER>; 72*4882a593Smuzhiyun debounce-interval = <100>; 73*4882a593Smuzhiyun wakeup-source; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun volume_up: volume-up-key { 77*4882a593Smuzhiyun label = "GPIO Key Power"; 78*4882a593Smuzhiyun gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 79*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun sound: sound { 84*4882a593Smuzhiyun compatible = "simple-audio-card"; 85*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 86*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 87*4882a593Smuzhiyun simple-audio-card,name = "rockchip-rk3229"; 88*4882a593Smuzhiyun simple-audio-card,cpu { 89*4882a593Smuzhiyun sound-dai = <&i2s1>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun simple-audio-card,codec { 92*4882a593Smuzhiyun sound-dai = <&codec>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun hdmi_sound: hdmi-sound { 97*4882a593Smuzhiyun status = "okay"; 98*4882a593Smuzhiyun compatible = "simple-audio-card"; 99*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 100*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 101*4882a593Smuzhiyun simple-audio-card,name = "rockchip-hdmi"; 102*4882a593Smuzhiyun simple-audio-card,cpu { 103*4882a593Smuzhiyun sound-dai = <&i2s0>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun simple-audio-card,codec { 106*4882a593Smuzhiyun sound-dai = <&hdmi>; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun regulators: regulators { 111*4882a593Smuzhiyun compatible = "simple-bus"; 112*4882a593Smuzhiyun #address-cells = <1>; 113*4882a593Smuzhiyun #size-cells = <0>; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun vccio_1v8_reg: regulator@0 { 116*4882a593Smuzhiyun compatible = "regulator-fixed"; 117*4882a593Smuzhiyun regulator-name = "vccio_1v8"; 118*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 119*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 120*4882a593Smuzhiyun regulator-always-on; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun vccio_3v3_reg: regulator@1 { 124*4882a593Smuzhiyun compatible = "regulator-fixed"; 125*4882a593Smuzhiyun regulator-name = "vccio_3v3"; 126*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 127*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 128*4882a593Smuzhiyun regulator-always-on; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun rtc_fake: rtc-fake { 133*4882a593Smuzhiyun compatible = "rtc-fake"; 134*4882a593Smuzhiyun status = "okay"; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 138*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 139*4882a593Smuzhiyun clocks = <&hym8563>; 140*4882a593Smuzhiyun /* clock-names = "ext_clock"; */ 141*4882a593Smuzhiyun pinctrl-names = "default"; 142*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun /* 145*4882a593Smuzhiyun * On the module itself this is one of these (depending 146*4882a593Smuzhiyun * on the actual card populated): 147*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 148*4882a593Smuzhiyun * - PDN (power down when low) 149*4882a593Smuzhiyun */ 150*4882a593Smuzhiyun reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */ 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun spdif_out: spdif-out { 154*4882a593Smuzhiyun status = "okay"; 155*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 156*4882a593Smuzhiyun #sound-dai-cells = <0>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun spdif_sound: spdif-sound { 160*4882a593Smuzhiyun status = "okay"; 161*4882a593Smuzhiyun compatible = "simple-audio-card"; 162*4882a593Smuzhiyun simple-audio-card,name = "ROCKCHIP-SPDIF"; 163*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 164*4882a593Smuzhiyun simple-audio-card,cpu { 165*4882a593Smuzhiyun sound-dai = <&spdif>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun simple-audio-card,codec { 168*4882a593Smuzhiyun sound-dai = <&spdif_out>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun vcc_host: vcc-host-regulator { 173*4882a593Smuzhiyun compatible = "regulator-fixed"; 174*4882a593Smuzhiyun enable-active-high; 175*4882a593Smuzhiyun gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; 176*4882a593Smuzhiyun pinctrl-names = "default"; 177*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 178*4882a593Smuzhiyun regulator-name = "vcc_host"; 179*4882a593Smuzhiyun regulator-always-on; 180*4882a593Smuzhiyun regulator-boot-on; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun vcc_otg_vbus: otg-vbus-regulator { 184*4882a593Smuzhiyun compatible = "regulator-fixed"; 185*4882a593Smuzhiyun gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; 186*4882a593Smuzhiyun pinctrl-names = "default"; 187*4882a593Smuzhiyun pinctrl-0 = <&otg_vbus_drv>; 188*4882a593Smuzhiyun regulator-name = "vcc_otg_vbus"; 189*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 190*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 191*4882a593Smuzhiyun enable-active-high; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 195*4882a593Smuzhiyun compatible = "regulator-fixed"; 196*4882a593Smuzhiyun enable-active-high; 197*4882a593Smuzhiyun regulator-name = "vcc_phy"; 198*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 199*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 200*4882a593Smuzhiyun regulator-always-on; 201*4882a593Smuzhiyun regulator-boot-on; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun vdd_arm: vdd-arm-regulator { 205*4882a593Smuzhiyun compatible = "pwm-regulator"; 206*4882a593Smuzhiyun rockchip,pwm_id = <1>; 207*4882a593Smuzhiyun regulator-init-microvolt = <1200000>; 208*4882a593Smuzhiyun regulator-early-min-microvolt = <1200000>; 209*4882a593Smuzhiyun pwms = <&pwm1 0 5000 1>; 210*4882a593Smuzhiyun regulator-name = "vdd_arm"; 211*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 212*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 213*4882a593Smuzhiyun regulator-settling-time-up-us = <250>; 214*4882a593Smuzhiyun regulator-always-on; 215*4882a593Smuzhiyun regulator-boot-on; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun wireless_bluetooth: wireless-bluetooth { 219*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 220*4882a593Smuzhiyun clocks = <&hym8563>; 221*4882a593Smuzhiyun clock-names = "ext_clock"; 222*4882a593Smuzhiyun uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; 223*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 224*4882a593Smuzhiyun pinctrl-0 = <&uart11_rts>; 225*4882a593Smuzhiyun pinctrl-1 = <&uart11_rts_gpio>; 226*4882a593Smuzhiyun BT,power_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; 227*4882a593Smuzhiyun BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>; 228*4882a593Smuzhiyun status = "okay"; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun wireless_wlan: wireless-wlan { 232*4882a593Smuzhiyun compatible = "wlan-platdata"; 233*4882a593Smuzhiyun rockchip,grf = <&grf>; 234*4882a593Smuzhiyun wifi_chip_type = "ssv6051"; 235*4882a593Smuzhiyun sdio_vref = <1800>; 236*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>; 237*4882a593Smuzhiyun status = "okay"; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun}; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun&codec { 242*4882a593Smuzhiyun #sound-dai-cells = <0>; 243*4882a593Smuzhiyun status = "okay"; 244*4882a593Smuzhiyun}; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun&cpu0 { 247*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 248*4882a593Smuzhiyun}; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun&display_subsystem { 251*4882a593Smuzhiyun logo-memory-region = <&drm_logo>; 252*4882a593Smuzhiyun secure-memory-region = <&secure_memory>; 253*4882a593Smuzhiyun status = "okay"; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun route { 256*4882a593Smuzhiyun route_hdmi: route-hdmi { 257*4882a593Smuzhiyun status = "okay"; 258*4882a593Smuzhiyun logo,uboot = "logo.bmp"; 259*4882a593Smuzhiyun logo,kernel = "logo_kernel.bmp"; 260*4882a593Smuzhiyun logo,mode = "center"; 261*4882a593Smuzhiyun charge_logo,mode = "center"; 262*4882a593Smuzhiyun connect = <&vop_out_hdmi>; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun route_tve: route-tve { 266*4882a593Smuzhiyun status = "okay"; 267*4882a593Smuzhiyun logo,uboot = "logo.bmp"; 268*4882a593Smuzhiyun logo,kernel = "logo_kernel.bmp"; 269*4882a593Smuzhiyun logo,mode = "center"; 270*4882a593Smuzhiyun charge_logo,mode = "center"; 271*4882a593Smuzhiyun connect = <&vop_out_tve>; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun}; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun&dmc { 277*4882a593Smuzhiyun center-supply = <&vdd_arm>; 278*4882a593Smuzhiyun status = "okay"; 279*4882a593Smuzhiyun}; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun&emmc { 282*4882a593Smuzhiyun broken-cd; 283*4882a593Smuzhiyun bus-width = <8>; 284*4882a593Smuzhiyun cap-mmc-highspeed; 285*4882a593Smuzhiyun mmc-hs200-1_8v; 286*4882a593Smuzhiyun no-sdio; 287*4882a593Smuzhiyun no-sd; 288*4882a593Smuzhiyun disable-wp; 289*4882a593Smuzhiyun non-removable; 290*4882a593Smuzhiyun num-slots = <1>; 291*4882a593Smuzhiyun /delete-property/ default-sample-phase; 292*4882a593Smuzhiyun /delete-property/ pinctrl-names; 293*4882a593Smuzhiyun /delete-property/ pinctrl-0; 294*4882a593Smuzhiyun status = "okay"; 295*4882a593Smuzhiyun}; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun&gmac { 298*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC_SRC>; 299*4882a593Smuzhiyun assigned-clock-rates = <50000000>; 300*4882a593Smuzhiyun clock_in_out = "output"; 301*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 302*4882a593Smuzhiyun phy-mode = "rmii"; 303*4882a593Smuzhiyun phy-is-integrated; 304*4882a593Smuzhiyun status = "okay"; 305*4882a593Smuzhiyun}; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun&gpu { 308*4882a593Smuzhiyun status = "okay"; 309*4882a593Smuzhiyun mali-supply = <&vdd_arm>; 310*4882a593Smuzhiyun}; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun&hdmi { 313*4882a593Smuzhiyun status = "okay"; 314*4882a593Smuzhiyun #sound-dai-cells = <0>; 315*4882a593Smuzhiyun ddc-i2c-scl-high-time-ns = <9625>; 316*4882a593Smuzhiyun ddc-i2c-scl-low-time-ns = <10000>; 317*4882a593Smuzhiyun}; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun&hdmi_phy { 320*4882a593Smuzhiyun status = "okay"; 321*4882a593Smuzhiyun}; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun&io_domains { 324*4882a593Smuzhiyun status = "okay"; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun vccio1-supply = <&vccio_3v3_reg>; 327*4882a593Smuzhiyun vccio2-supply = <&vccio_3v3_reg>; 328*4882a593Smuzhiyun vccio4-supply = <&vccio_3v3_reg>; 329*4882a593Smuzhiyun}; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun&i2c0 { 332*4882a593Smuzhiyun status = "okay"; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun hym8563: hym8563@51 { 335*4882a593Smuzhiyun compatible = "haoyu,hym8563"; 336*4882a593Smuzhiyun reg = <0x51>; 337*4882a593Smuzhiyun #clock-cells = <0>; 338*4882a593Smuzhiyun clock-frequency = <32768>; 339*4882a593Smuzhiyun clock-output-names = "xin32k"; 340*4882a593Smuzhiyun }; 341*4882a593Smuzhiyun}; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun&i2s0 { 344*4882a593Smuzhiyun status = "okay"; 345*4882a593Smuzhiyun rockchip,bclk-fs = <128>; 346*4882a593Smuzhiyun #sound-dai-cells = <0>; 347*4882a593Smuzhiyun}; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun&i2s1 { 350*4882a593Smuzhiyun #sound-dai-cells = <0>; 351*4882a593Smuzhiyun status = "okay"; 352*4882a593Smuzhiyun}; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun&iep { 355*4882a593Smuzhiyun status = "okay"; 356*4882a593Smuzhiyun}; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun&iep_mmu { 359*4882a593Smuzhiyun status = "okay"; 360*4882a593Smuzhiyun}; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun&nandc { 363*4882a593Smuzhiyun status = "okay"; 364*4882a593Smuzhiyun}; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun&pinctrl { 367*4882a593Smuzhiyun keys { 368*4882a593Smuzhiyun pwr_key: pwr-key { 369*4882a593Smuzhiyun rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun volume_up_key: volume-up { 373*4882a593Smuzhiyun rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun }; 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun sdmmc { 378*4882a593Smuzhiyun sdmmc_pwr: sdmmc-pwr { 379*4882a593Smuzhiyun rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 380*4882a593Smuzhiyun }; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun sdio-pwrseq { 384*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 385*4882a593Smuzhiyun rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 386*4882a593Smuzhiyun }; 387*4882a593Smuzhiyun }; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun usb { 390*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 391*4882a593Smuzhiyun rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun otg_vbus_drv: otg-vbus-drv { 395*4882a593Smuzhiyun rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun}; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun&pwm1 { 401*4882a593Smuzhiyun status = "okay"; 402*4882a593Smuzhiyun pinctrl-names = "active"; 403*4882a593Smuzhiyun pinctrl-0 = <&pwm1_pin_pull_down>; 404*4882a593Smuzhiyun}; 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun&pwm2 { 407*4882a593Smuzhiyun status = "okay"; 408*4882a593Smuzhiyun}; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun&pwm3 { 411*4882a593Smuzhiyun status = "okay"; 412*4882a593Smuzhiyun pinctrl-names = "default"; 413*4882a593Smuzhiyun pinctrl-0 = <&pwm3_pin>; 414*4882a593Smuzhiyun compatible = "rockchip,remotectl-pwm"; 415*4882a593Smuzhiyun remote_pwm_id = <3>; 416*4882a593Smuzhiyun handle_cpu_id = <1>; 417*4882a593Smuzhiyun remote_support_psci = <1>; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun ir_key1 { 420*4882a593Smuzhiyun rockchip,usercode = <0x4040>; 421*4882a593Smuzhiyun rockchip,key_table = 422*4882a593Smuzhiyun <0xf2 KEY_REPLY>, 423*4882a593Smuzhiyun <0xba KEY_BACK>, 424*4882a593Smuzhiyun <0xf4 KEY_UP>, 425*4882a593Smuzhiyun <0xf1 KEY_DOWN>, 426*4882a593Smuzhiyun <0xef KEY_LEFT>, 427*4882a593Smuzhiyun <0xee KEY_RIGHT>, 428*4882a593Smuzhiyun <0xbd KEY_HOME>, 429*4882a593Smuzhiyun <0xea KEY_VOLUMEUP>, 430*4882a593Smuzhiyun <0xe3 KEY_VOLUMEDOWN>, 431*4882a593Smuzhiyun <0xe2 KEY_SEARCH>, 432*4882a593Smuzhiyun <0xb2 KEY_POWER>, 433*4882a593Smuzhiyun <0xbc KEY_MUTE>, 434*4882a593Smuzhiyun <0xec KEY_MENU>, 435*4882a593Smuzhiyun <0xbf 0x190>, 436*4882a593Smuzhiyun <0xe0 0x191>, 437*4882a593Smuzhiyun <0xe1 0x192>, 438*4882a593Smuzhiyun <0xe9 183>, 439*4882a593Smuzhiyun <0xe6 248>, 440*4882a593Smuzhiyun <0xe8 185>, 441*4882a593Smuzhiyun <0xe7 186>, 442*4882a593Smuzhiyun <0xf0 388>, 443*4882a593Smuzhiyun <0xbe 0x175>; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun ir_key2 { 447*4882a593Smuzhiyun rockchip,usercode = <0xff00>; 448*4882a593Smuzhiyun rockchip,key_table = 449*4882a593Smuzhiyun <0xf9 KEY_HOME>, 450*4882a593Smuzhiyun <0xbf KEY_BACK>, 451*4882a593Smuzhiyun <0xfb KEY_MENU>, 452*4882a593Smuzhiyun <0xaa KEY_REPLY>, 453*4882a593Smuzhiyun <0xb9 KEY_UP>, 454*4882a593Smuzhiyun <0xe9 KEY_DOWN>, 455*4882a593Smuzhiyun <0xb8 KEY_LEFT>, 456*4882a593Smuzhiyun <0xea KEY_RIGHT>, 457*4882a593Smuzhiyun <0xeb KEY_VOLUMEDOWN>, 458*4882a593Smuzhiyun <0xef KEY_VOLUMEUP>, 459*4882a593Smuzhiyun <0xf7 KEY_MUTE>, 460*4882a593Smuzhiyun <0xe7 KEY_POWER>, 461*4882a593Smuzhiyun <0xfc KEY_POWER>, 462*4882a593Smuzhiyun <0xa9 KEY_VOLUMEDOWN>, 463*4882a593Smuzhiyun <0xa8 KEY_PLAYPAUSE>, 464*4882a593Smuzhiyun <0xe0 KEY_VOLUMEDOWN>, 465*4882a593Smuzhiyun <0xa5 KEY_VOLUMEDOWN>, 466*4882a593Smuzhiyun <0xab 183>, 467*4882a593Smuzhiyun <0xb7 388>, 468*4882a593Smuzhiyun <0xe8 388>, 469*4882a593Smuzhiyun <0xf8 184>, 470*4882a593Smuzhiyun <0xaf 185>, 471*4882a593Smuzhiyun <0xed KEY_VOLUMEDOWN>, 472*4882a593Smuzhiyun <0xee 186>, 473*4882a593Smuzhiyun <0xb3 KEY_VOLUMEDOWN>, 474*4882a593Smuzhiyun <0xf1 KEY_VOLUMEDOWN>, 475*4882a593Smuzhiyun <0xf2 KEY_VOLUMEDOWN>, 476*4882a593Smuzhiyun <0xf3 KEY_SEARCH>, 477*4882a593Smuzhiyun <0xb4 KEY_VOLUMEDOWN>, 478*4882a593Smuzhiyun <0xa4 KEY_SETUP>, 479*4882a593Smuzhiyun <0xbe KEY_SEARCH>; 480*4882a593Smuzhiyun }; 481*4882a593Smuzhiyun 482*4882a593Smuzhiyun ir_key3 { 483*4882a593Smuzhiyun rockchip,usercode = <0x1dcc>; 484*4882a593Smuzhiyun rockchip,key_table = 485*4882a593Smuzhiyun <0xee KEY_REPLY>, 486*4882a593Smuzhiyun <0xf0 KEY_BACK>, 487*4882a593Smuzhiyun <0xf8 KEY_UP>, 488*4882a593Smuzhiyun <0xbb KEY_DOWN>, 489*4882a593Smuzhiyun <0xef KEY_LEFT>, 490*4882a593Smuzhiyun <0xed KEY_RIGHT>, 491*4882a593Smuzhiyun <0xfc KEY_HOME>, 492*4882a593Smuzhiyun <0xf1 KEY_VOLUMEUP>, 493*4882a593Smuzhiyun <0xfd KEY_VOLUMEDOWN>, 494*4882a593Smuzhiyun <0xb7 KEY_SEARCH>, 495*4882a593Smuzhiyun <0xff KEY_POWER>, 496*4882a593Smuzhiyun <0xf3 KEY_MUTE>, 497*4882a593Smuzhiyun <0xbf KEY_MENU>, 498*4882a593Smuzhiyun <0xf9 0x191>, 499*4882a593Smuzhiyun <0xf5 0x192>, 500*4882a593Smuzhiyun <0xb3 388>, 501*4882a593Smuzhiyun <0xbe KEY_1>, 502*4882a593Smuzhiyun <0xba KEY_2>, 503*4882a593Smuzhiyun <0xb2 KEY_3>, 504*4882a593Smuzhiyun <0xbd KEY_4>, 505*4882a593Smuzhiyun <0xf9 KEY_5>, 506*4882a593Smuzhiyun <0xb1 KEY_6>, 507*4882a593Smuzhiyun <0xfc KEY_7>, 508*4882a593Smuzhiyun <0xf8 KEY_8>, 509*4882a593Smuzhiyun <0xb0 KEY_9>, 510*4882a593Smuzhiyun <0xb6 KEY_0>, 511*4882a593Smuzhiyun <0xb5 KEY_BACKSPACE>; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun ir_key80{ 515*4882a593Smuzhiyun rockchip,usercode = <0x7f00>; 516*4882a593Smuzhiyun rockchip,key_table = <0xed KEY_POWER>; 517*4882a593Smuzhiyun }; 518*4882a593Smuzhiyun}; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun&rockchip_suspend { 521*4882a593Smuzhiyun status = "okay"; 522*4882a593Smuzhiyun rockchip,virtual-poweroff = <1>; 523*4882a593Smuzhiyun rockchip,sleep-mode-config = < 524*4882a593Smuzhiyun (0 525*4882a593Smuzhiyun |RKPM_CTR_GTCLKS 526*4882a593Smuzhiyun |RKPM_CTR_IDLESRAM_MD 527*4882a593Smuzhiyun |RKPM_CTR_PMIC 528*4882a593Smuzhiyun ) 529*4882a593Smuzhiyun >; 530*4882a593Smuzhiyun}; 531*4882a593Smuzhiyun 532*4882a593Smuzhiyun&sdio { 533*4882a593Smuzhiyun status = "okay"; 534*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 535*4882a593Smuzhiyun bus-width = <4>; 536*4882a593Smuzhiyun cap-mmc-highspeed; 537*4882a593Smuzhiyun cap-sd-highspeed; 538*4882a593Smuzhiyun cap-sdio-irq; 539*4882a593Smuzhiyun non-removable; 540*4882a593Smuzhiyun ignore-pm-notify; 541*4882a593Smuzhiyun keep-power-in-suspend; 542*4882a593Smuzhiyun max-frequency = <37500000>; 543*4882a593Smuzhiyun no-sd; 544*4882a593Smuzhiyun no-mmc; 545*4882a593Smuzhiyun}; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun&sdmmc { 548*4882a593Smuzhiyun status = "okay"; 549*4882a593Smuzhiyun pinctrl-names = "default"; 550*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_pwr &sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; 551*4882a593Smuzhiyun bus-width = <4>; 552*4882a593Smuzhiyun cap-mmc-highspeed; 553*4882a593Smuzhiyun cap-sd-highspeed; 554*4882a593Smuzhiyun card-detect-delay = <200>; 555*4882a593Smuzhiyun disable-wp; 556*4882a593Smuzhiyun max-frequency = <50000000>; 557*4882a593Smuzhiyun num-slots = <1>; 558*4882a593Smuzhiyun no-sdio; 559*4882a593Smuzhiyun no-mmc; 560*4882a593Smuzhiyun}; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun&spdif { 563*4882a593Smuzhiyun status = "okay"; 564*4882a593Smuzhiyun #sound-dai-cells = <0>; 565*4882a593Smuzhiyun}; 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun&threshold { 568*4882a593Smuzhiyun temperature = <90000>; /* millicelsius */ 569*4882a593Smuzhiyun}; 570*4882a593Smuzhiyun 571*4882a593Smuzhiyun&target { 572*4882a593Smuzhiyun temperature = <105000>; /* millicelsius */ 573*4882a593Smuzhiyun}; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun&soc_crit { 576*4882a593Smuzhiyun temperature = <115000>; /* millicelsius */ 577*4882a593Smuzhiyun}; 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun&tsadc { 580*4882a593Smuzhiyun rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ 581*4882a593Smuzhiyun rockchip,hw-tshut-temp = <120000>; 582*4882a593Smuzhiyun status = "okay"; 583*4882a593Smuzhiyun}; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun&tve { 586*4882a593Smuzhiyun status = "okay"; 587*4882a593Smuzhiyun}; 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun&u2phy0 { 590*4882a593Smuzhiyun status = "okay"; 591*4882a593Smuzhiyun 592*4882a593Smuzhiyun u2phy0_otg: otg-port { 593*4882a593Smuzhiyun status = "okay"; 594*4882a593Smuzhiyun }; 595*4882a593Smuzhiyun 596*4882a593Smuzhiyun u2phy0_host: host-port { 597*4882a593Smuzhiyun status = "okay"; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun}; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun&u2phy1 { 602*4882a593Smuzhiyun status = "okay"; 603*4882a593Smuzhiyun 604*4882a593Smuzhiyun u2phy1_otg: otg-port { 605*4882a593Smuzhiyun status = "okay"; 606*4882a593Smuzhiyun }; 607*4882a593Smuzhiyun 608*4882a593Smuzhiyun u2phy1_host: host-port { 609*4882a593Smuzhiyun status = "okay"; 610*4882a593Smuzhiyun }; 611*4882a593Smuzhiyun}; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun&uart1 { 614*4882a593Smuzhiyun pinctrl-names = "default"; 615*4882a593Smuzhiyun pinctrl-0 = <&uart11_xfer &uart11_cts>; 616*4882a593Smuzhiyun status = "okay"; 617*4882a593Smuzhiyun}; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun&usb_otg { 620*4882a593Smuzhiyun status = "okay"; 621*4882a593Smuzhiyun}; 622*4882a593Smuzhiyun 623*4882a593Smuzhiyun&u2phy0_host { 624*4882a593Smuzhiyun phy-supply = <&vcc_host>; 625*4882a593Smuzhiyun}; 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun&u2phy1_host { 628*4882a593Smuzhiyun phy-supply = <&vcc_host>; 629*4882a593Smuzhiyun}; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun&u2phy0_otg { 632*4882a593Smuzhiyun vbus-supply = <&vcc_otg_vbus>; 633*4882a593Smuzhiyun}; 634*4882a593Smuzhiyun 635*4882a593Smuzhiyun&usb_host0_ehci { 636*4882a593Smuzhiyun status = "okay"; 637*4882a593Smuzhiyun}; 638*4882a593Smuzhiyun 639*4882a593Smuzhiyun&usb_host0_ohci { 640*4882a593Smuzhiyun status = "okay"; 641*4882a593Smuzhiyun}; 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun&usb_host1_ehci { 644*4882a593Smuzhiyun status = "okay"; 645*4882a593Smuzhiyun}; 646*4882a593Smuzhiyun 647*4882a593Smuzhiyun&usb_host1_ohci { 648*4882a593Smuzhiyun status = "okay"; 649*4882a593Smuzhiyun}; 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun&usb_host2_ehci { 652*4882a593Smuzhiyun status = "okay"; 653*4882a593Smuzhiyun}; 654*4882a593Smuzhiyun 655*4882a593Smuzhiyun&usb_host2_ohci { 656*4882a593Smuzhiyun status = "okay"; 657*4882a593Smuzhiyun}; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun&vop { 660*4882a593Smuzhiyun assigned-clocks = <&cru DCLK_VOP>; 661*4882a593Smuzhiyun assigned-clock-parents = <&cru HDMIPHY>; 662*4882a593Smuzhiyun status = "okay"; 663*4882a593Smuzhiyun}; 664*4882a593Smuzhiyun 665*4882a593Smuzhiyun&vop_mmu { 666*4882a593Smuzhiyun status = "okay"; 667*4882a593Smuzhiyun}; 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun&vpu_service { 670*4882a593Smuzhiyun status = "okay"; 671*4882a593Smuzhiyun}; 672*4882a593Smuzhiyun 673*4882a593Smuzhiyun&vpu_mmu { 674*4882a593Smuzhiyun status = "okay"; 675*4882a593Smuzhiyun}; 676*4882a593Smuzhiyun 677*4882a593Smuzhiyun&rkvdec { 678*4882a593Smuzhiyun vcodec-supply = <&vdd_arm>; 679*4882a593Smuzhiyun status = "okay"; 680*4882a593Smuzhiyun}; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun&rkvdec_mmu { 683*4882a593Smuzhiyun status = "okay"; 684*4882a593Smuzhiyun}; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun&rk_rga { 687*4882a593Smuzhiyun status = "okay"; 688*4882a593Smuzhiyun}; 689