1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun#include <dt-bindings/input/rk-input.h> 9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 10*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 11*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h> 12*4882a593Smuzhiyun#include "rk3128.dtsi" 13*4882a593Smuzhiyun#include "rk312x-android.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "Rockchip RK3128 EVB DDR3 V10 Linux Board"; 17*4882a593Smuzhiyun compatible = "rockchip,rk3128"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun chosen { 20*4882a593Smuzhiyun bootargs = "earlycon=uart8250,mmio32,0x20068000 console=ttyFIQ0 root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 rootwait"; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun adc-keys { 24*4882a593Smuzhiyun compatible = "adc-keys"; 25*4882a593Smuzhiyun io-channels = <&saradc 1>; 26*4882a593Smuzhiyun io-channel-names = "buttons"; 27*4882a593Smuzhiyun poll-interval = <100>; 28*4882a593Smuzhiyun keyup-threshold-microvolt = <3300000>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun vol-up-key { 31*4882a593Smuzhiyun label = "volume Up"; 32*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 33*4882a593Smuzhiyun press-threshold-microvolt = <0>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun vol-down-key{ 37*4882a593Smuzhiyun label = "volume down"; 38*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 39*4882a593Smuzhiyun press-threshold-microvolt = <750000>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun menu-key{ 43*4882a593Smuzhiyun label = "menu"; 44*4882a593Smuzhiyun linux,code = <KEY_MENU>; 45*4882a593Smuzhiyun press-threshold-microvolt = <1240000>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun esc-key { 49*4882a593Smuzhiyun label = "esc"; 50*4882a593Smuzhiyun linux,code = <KEY_ESC>; 51*4882a593Smuzhiyun press-threshold-microvolt = <1980000>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun backlight: backlight { 56*4882a593Smuzhiyun compatible = "pwm-backlight"; 57*4882a593Smuzhiyun pwms = <&pwm0 0 25000 0>; 58*4882a593Smuzhiyun brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 59*4882a593Smuzhiyun 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 60*4882a593Smuzhiyun 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 61*4882a593Smuzhiyun 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 62*4882a593Smuzhiyun 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 63*4882a593Smuzhiyun 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 64*4882a593Smuzhiyun 105 106 107 108 109 110 111 112 113 114 115 116 117 65*4882a593Smuzhiyun 118 119 120 121 122 123 124 125 126 127 128 129 130 66*4882a593Smuzhiyun 131 132 133 134 135 136 137 138 139 140 141 142 143 67*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 152 153 154 155 156 68*4882a593Smuzhiyun 157 158 159 160 161 162 163 164 165 166 167 168 169 69*4882a593Smuzhiyun 170 171 172 173 174 175 176 177 178 179 180 181 182 70*4882a593Smuzhiyun 183 184 185 186 187 188 189 190 191 192 193 194 195 71*4882a593Smuzhiyun 196 197 198 199 200 201 202 203 204 205 206 207 208 72*4882a593Smuzhiyun 209 210 211 212 213 214 215 216 217 218 219 220 221 73*4882a593Smuzhiyun 222 223 224 225 226 227 228 229 230 231 232 233 234 74*4882a593Smuzhiyun 235 236 237 238 239 240 241 242 243 244 245 246 247 75*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 76*4882a593Smuzhiyun default-brightness-level = <128>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq{ 80*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 81*4882a593Smuzhiyun pinctrl-name = "default"; 82*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 83*4882a593Smuzhiyun reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun codec_sound: codec-sound { 87*4882a593Smuzhiyun compatible = "simple-audio-card"; 88*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 89*4882a593Smuzhiyun simple-audio-card,name = "rockchip,rk312x-codec"; 90*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 91*4882a593Smuzhiyun simple-audio-card,cpu { 92*4882a593Smuzhiyun sound-dai = <&i2s_8ch>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun simple-audio-card,codec { 95*4882a593Smuzhiyun sound-dai = <&codec>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun spdif_out: spdif-out { 100*4882a593Smuzhiyun status = "okay"; 101*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 102*4882a593Smuzhiyun #sound-dai-cells = <0>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun media_sound: media-sound { 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun compatible = "simple-audio-card"; 108*4882a593Smuzhiyun simple-audio-card,name = "rockchip,hdmi-spdif"; 109*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 110*4882a593Smuzhiyun simple-audio-card,dai-link@0 { 111*4882a593Smuzhiyun format = "spdif"; 112*4882a593Smuzhiyun cpu { 113*4882a593Smuzhiyun sound-dai = <&spdif>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun codec { 117*4882a593Smuzhiyun sound-dai = <&spdif_out>; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun simple-audio-card,dai-link@1 { 122*4882a593Smuzhiyun format = "spdif"; 123*4882a593Smuzhiyun cpu { 124*4882a593Smuzhiyun sound-dai = <&spdif>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun codec { 128*4882a593Smuzhiyun sound-dai = <&hdmi>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun wireless-wlan { 134*4882a593Smuzhiyun compatible = "wlan-platdata"; 135*4882a593Smuzhiyun wifi_chip_type = "ap6212"; 136*4882a593Smuzhiyun sdio_vref = <3300>; 137*4882a593Smuzhiyun rockchip,grf = <&grf>; 138*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>; 139*4882a593Smuzhiyun status = "okay"; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun wireless-bluetooth { 143*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 144*4882a593Smuzhiyun clocks = <&rk805 1>; 145*4882a593Smuzhiyun clock-names = "ext_clock"; 146*4882a593Smuzhiyun uart_rts_gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>; 147*4882a593Smuzhiyun pinctrl-names = "default","rts_gpio"; 148*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>; 149*4882a593Smuzhiyun pinctrl-1 = <&uart0_rts_gpio>; 150*4882a593Smuzhiyun BT,power_gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 151*4882a593Smuzhiyun BT,wake_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 152*4882a593Smuzhiyun BT,wake_host_irq = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; 153*4882a593Smuzhiyun status = "okay"; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 157*4882a593Smuzhiyun compatible = "regulator-fixed"; 158*4882a593Smuzhiyun enable-active-high; 159*4882a593Smuzhiyun regulator-name = "vcc_phy"; 160*4882a593Smuzhiyun regulator-always-on; 161*4882a593Smuzhiyun regulator-boot-on; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun vcc_2v8_cam: vcc-3v3-cam { 165*4882a593Smuzhiyun compatible = "regulator-fixed"; 166*4882a593Smuzhiyun regulator-name = "vcc_2v8_cam"; 167*4882a593Smuzhiyun gpio = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>; 168*4882a593Smuzhiyun enable-active-high; 169*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 170*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun vcc5v0_sys: vcc-sys { 174*4882a593Smuzhiyun compatible = "regulator-fixed"; 175*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 176*4882a593Smuzhiyun regulator-always-on; 177*4882a593Smuzhiyun regulator-boot-on; 178*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 179*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun vcc_host_5v: vcc-host-5v-regulator { 183*4882a593Smuzhiyun compatible = "regulator-fixed"; 184*4882a593Smuzhiyun enable-active-high; 185*4882a593Smuzhiyun gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>; 186*4882a593Smuzhiyun pinctrl-names = "default"; 187*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 188*4882a593Smuzhiyun regulator-name = "vcc_host_5v"; 189*4882a593Smuzhiyun regulator-always-on; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun vcc_hub_5v: vcc-hub-5v-regulator { 193*4882a593Smuzhiyun compatible = "regulator-fixed"; 194*4882a593Smuzhiyun regulator-name = "vcc_hub_5v"; 195*4882a593Smuzhiyun gpio = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>; 196*4882a593Smuzhiyun pinctrl-names = "default"; 197*4882a593Smuzhiyun pinctrl-0 = <&hub_rst>; 198*4882a593Smuzhiyun enable-active-high; 199*4882a593Smuzhiyun regulator-always-on; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun vcc_sdmmc: vcc-sdmmc{ 203*4882a593Smuzhiyun compatible = "regulator-fixed"; 204*4882a593Smuzhiyun gpio = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 205*4882a593Smuzhiyun pinctrl-names = "default"; 206*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_pwren>; 207*4882a593Smuzhiyun regulator-name = "vcc_sdmmc"; 208*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 209*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun vcc3v3_lcd_n: vcc3v3-lcd-n { 213*4882a593Smuzhiyun compatible = "regulator-fixed"; 214*4882a593Smuzhiyun regulator-name = "vcc3v3_lcd_n"; 215*4882a593Smuzhiyun pinctrl-names = "default"; 216*4882a593Smuzhiyun pinctrl-0 = <&lcd_en>; 217*4882a593Smuzhiyun gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; 218*4882a593Smuzhiyun enable-active-high; 219*4882a593Smuzhiyun regulator-boot-on; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun vccio_wifi: vccio-wifi { 223*4882a593Smuzhiyun compatible = "regulator-fixed"; 224*4882a593Smuzhiyun regulator-name = "vccio_wifi"; 225*4882a593Smuzhiyun pinctrl-names = "default"; 226*4882a593Smuzhiyun pinctrl-0 = <&wifi_pwren_l>; 227*4882a593Smuzhiyun gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; 228*4882a593Smuzhiyun regulator-boot-on; 229*4882a593Smuzhiyun regulator-always-on; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun xin32k: xin32k { 233*4882a593Smuzhiyun compatible = "fixed-clock"; 234*4882a593Smuzhiyun clock-frequency = <32768>; 235*4882a593Smuzhiyun clock-output-names = "xin32k"; 236*4882a593Smuzhiyun #clock-cells = <0>; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun}; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun&cif_new { 241*4882a593Smuzhiyun status = "okay"; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun ports { 244*4882a593Smuzhiyun port@0 { 245*4882a593Smuzhiyun cif_in_bcam: endpoint@0 { 246*4882a593Smuzhiyun remote-endpoint = <&gc2145_out>; 247*4882a593Smuzhiyun vsync-active = <0>; 248*4882a593Smuzhiyun hsync-active = <1>; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun}; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun&codec{ 255*4882a593Smuzhiyun spk-ctl-gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; 256*4882a593Smuzhiyun hp-ctl-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>; 257*4882a593Smuzhiyun spk-mute-delay = <200>; 258*4882a593Smuzhiyun hp-mute-delay = <100>; 259*4882a593Smuzhiyun rk312x_for_mid = <0>; 260*4882a593Smuzhiyun is_rk3128 = <1>; 261*4882a593Smuzhiyun spk_volume = <25>; 262*4882a593Smuzhiyun hp_volume = <25>; 263*4882a593Smuzhiyun capture_volume = <26>; 264*4882a593Smuzhiyun gpio_debug = <1>; 265*4882a593Smuzhiyun codec_hp_det = <1>; 266*4882a593Smuzhiyun #sound-dai-cells = <0>; 267*4882a593Smuzhiyun pinctrl-names = "default"; 268*4882a593Smuzhiyun pinctrl-0 = <&spk_ctl_h>, <&hp_ctl_h>; 269*4882a593Smuzhiyun status = "okay"; 270*4882a593Smuzhiyun}; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun&cpu0 { 273*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 274*4882a593Smuzhiyun}; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun&display_subsystem { 277*4882a593Smuzhiyun status = "okay"; 278*4882a593Smuzhiyun}; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun&dmc { 281*4882a593Smuzhiyun center-supply = <&vdd_logic>; 282*4882a593Smuzhiyun}; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun&dsi { 285*4882a593Smuzhiyun status = "okay"; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun panel@0 { 288*4882a593Smuzhiyun compatible = "sitronix,st7703", "simple-panel-dsi"; 289*4882a593Smuzhiyun reg = <0>; 290*4882a593Smuzhiyun backlight = <&backlight>; 291*4882a593Smuzhiyun power-supply = <&vcc3v3_lcd_n>; 292*4882a593Smuzhiyun reset-gpio = <&gpio0 RK_PD0 GPIO_ACTIVE_LOW>; 293*4882a593Smuzhiyun prepare-delay-ms = <0>; 294*4882a593Smuzhiyun reset-delay-ms = <0>; 295*4882a593Smuzhiyun init-delay-ms = <80>; 296*4882a593Smuzhiyun enable-delay-ms = <0>; 297*4882a593Smuzhiyun disable-delay-ms = <10>; 298*4882a593Smuzhiyun unprepare-delay-ms = <60>; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun width-mm = <68>; 301*4882a593Smuzhiyun height-mm = <121>; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 304*4882a593Smuzhiyun MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 305*4882a593Smuzhiyun dsi,format = <MIPI_DSI_FMT_RGB888>; 306*4882a593Smuzhiyun dsi,lanes = <4>; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun panel-init-sequence = [ 309*4882a593Smuzhiyun 39 00 04 ff 98 81 03 310*4882a593Smuzhiyun 15 00 02 01 00 311*4882a593Smuzhiyun 15 00 02 02 00 312*4882a593Smuzhiyun 15 00 02 03 53 313*4882a593Smuzhiyun 15 00 02 04 53 314*4882a593Smuzhiyun 15 00 02 05 13 315*4882a593Smuzhiyun 15 00 02 06 04 316*4882a593Smuzhiyun 15 00 02 07 02 317*4882a593Smuzhiyun 15 00 02 08 02 318*4882a593Smuzhiyun 15 00 02 09 00 319*4882a593Smuzhiyun 15 00 02 0a 00 320*4882a593Smuzhiyun 15 00 02 0b 00 321*4882a593Smuzhiyun 15 00 02 0c 00 322*4882a593Smuzhiyun 15 00 02 0d 00 323*4882a593Smuzhiyun 15 00 02 0e 00 324*4882a593Smuzhiyun 15 00 02 0f 00 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun 15 00 02 10 00 327*4882a593Smuzhiyun 15 00 02 11 00 328*4882a593Smuzhiyun 15 00 02 12 00 329*4882a593Smuzhiyun 15 00 02 13 00 330*4882a593Smuzhiyun 15 00 02 14 00 331*4882a593Smuzhiyun 15 00 02 15 08 332*4882a593Smuzhiyun 15 00 02 16 10 333*4882a593Smuzhiyun 15 00 02 17 00 334*4882a593Smuzhiyun 15 00 02 18 08 335*4882a593Smuzhiyun 15 00 02 19 00 336*4882a593Smuzhiyun 15 00 02 1a 00 337*4882a593Smuzhiyun 15 00 02 1b 00 338*4882a593Smuzhiyun 15 00 02 1c 00 339*4882a593Smuzhiyun 15 00 02 1d 00 340*4882a593Smuzhiyun 15 00 02 1e c0 341*4882a593Smuzhiyun 15 00 02 1f 80 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun 15 00 02 20 02 344*4882a593Smuzhiyun 15 00 02 21 09 345*4882a593Smuzhiyun 15 00 02 22 00 346*4882a593Smuzhiyun 15 00 02 23 00 347*4882a593Smuzhiyun 15 00 02 24 00 348*4882a593Smuzhiyun 15 00 02 25 00 349*4882a593Smuzhiyun 15 00 02 26 00 350*4882a593Smuzhiyun 15 00 02 27 00 351*4882a593Smuzhiyun 15 00 02 28 55 352*4882a593Smuzhiyun 15 00 02 29 03 353*4882a593Smuzhiyun 15 00 02 2a 00 354*4882a593Smuzhiyun 15 00 02 2b 00 355*4882a593Smuzhiyun 15 00 02 2c 00 356*4882a593Smuzhiyun 15 00 02 2d 00 357*4882a593Smuzhiyun 15 00 02 2e 00 358*4882a593Smuzhiyun 15 00 02 2f 00 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun 15 00 02 30 00 361*4882a593Smuzhiyun 15 00 02 31 00 362*4882a593Smuzhiyun 15 00 02 32 00 363*4882a593Smuzhiyun 15 00 02 33 00 364*4882a593Smuzhiyun 15 00 02 34 04 365*4882a593Smuzhiyun 15 00 02 35 05 366*4882a593Smuzhiyun 15 00 02 36 05 367*4882a593Smuzhiyun 15 00 02 37 00 368*4882a593Smuzhiyun 15 00 02 38 3c 369*4882a593Smuzhiyun 15 00 02 39 35 370*4882a593Smuzhiyun 15 00 02 3a 00 371*4882a593Smuzhiyun 15 00 02 3b 40 372*4882a593Smuzhiyun 15 00 02 3c 00 373*4882a593Smuzhiyun 15 00 02 3d 00 374*4882a593Smuzhiyun 15 00 02 3e 00 375*4882a593Smuzhiyun 15 00 02 3f 00 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun 15 00 02 40 00 378*4882a593Smuzhiyun 15 00 02 41 88 379*4882a593Smuzhiyun 15 00 02 42 00 380*4882a593Smuzhiyun 15 00 02 43 00 381*4882a593Smuzhiyun 15 00 02 44 1f 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun 15 00 02 50 01 384*4882a593Smuzhiyun 15 00 02 51 23 385*4882a593Smuzhiyun 15 00 02 52 45 386*4882a593Smuzhiyun 15 00 02 53 67 387*4882a593Smuzhiyun 15 00 02 54 89 388*4882a593Smuzhiyun 15 00 02 55 ab 389*4882a593Smuzhiyun 15 00 02 56 01 390*4882a593Smuzhiyun 15 00 02 57 23 391*4882a593Smuzhiyun 15 00 02 58 45 392*4882a593Smuzhiyun 15 00 02 59 67 393*4882a593Smuzhiyun 15 00 02 5a 89 394*4882a593Smuzhiyun 15 00 02 5b ab 395*4882a593Smuzhiyun 15 00 02 5c cd 396*4882a593Smuzhiyun 15 00 02 5d ef 397*4882a593Smuzhiyun 15 00 02 5e 03 398*4882a593Smuzhiyun 15 00 02 5f 14 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun 15 00 02 60 15 401*4882a593Smuzhiyun 15 00 02 61 0c 402*4882a593Smuzhiyun 15 00 02 62 0d 403*4882a593Smuzhiyun 15 00 02 63 0e 404*4882a593Smuzhiyun 15 00 02 64 0f 405*4882a593Smuzhiyun 15 00 02 65 10 406*4882a593Smuzhiyun 15 00 02 66 11 407*4882a593Smuzhiyun 15 00 02 67 08 408*4882a593Smuzhiyun 15 00 02 68 02 409*4882a593Smuzhiyun 15 00 02 69 0a 410*4882a593Smuzhiyun 15 00 02 6a 02 411*4882a593Smuzhiyun 15 00 02 6b 02 412*4882a593Smuzhiyun 15 00 02 6c 02 413*4882a593Smuzhiyun 15 00 02 6d 02 414*4882a593Smuzhiyun 15 00 02 6e 02 415*4882a593Smuzhiyun 15 00 02 6f 02 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun 15 00 02 70 02 418*4882a593Smuzhiyun 15 00 02 71 02 419*4882a593Smuzhiyun 15 00 02 72 06 420*4882a593Smuzhiyun 15 00 02 73 02 421*4882a593Smuzhiyun 15 00 02 74 02 422*4882a593Smuzhiyun 15 00 02 75 14 423*4882a593Smuzhiyun 15 00 02 76 15 424*4882a593Smuzhiyun 15 00 02 77 0f 425*4882a593Smuzhiyun 15 00 02 78 0e 426*4882a593Smuzhiyun 15 00 02 79 0d 427*4882a593Smuzhiyun 15 00 02 7a 0c 428*4882a593Smuzhiyun 15 00 02 7b 11 429*4882a593Smuzhiyun 15 00 02 7c 10 430*4882a593Smuzhiyun 15 00 02 7d 06 431*4882a593Smuzhiyun 15 00 02 7e 02 432*4882a593Smuzhiyun 15 00 02 7f 0a 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun 15 00 02 80 02 435*4882a593Smuzhiyun 15 00 02 81 02 436*4882a593Smuzhiyun 15 00 02 82 02 437*4882a593Smuzhiyun 15 00 02 83 02 438*4882a593Smuzhiyun 15 00 02 84 02 439*4882a593Smuzhiyun 15 00 02 85 02 440*4882a593Smuzhiyun 15 00 02 86 02 441*4882a593Smuzhiyun 15 00 02 87 02 442*4882a593Smuzhiyun 15 00 02 88 08 443*4882a593Smuzhiyun 15 00 02 89 02 444*4882a593Smuzhiyun 15 00 02 8a 02 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun 39 00 04 ff 98 81 04 447*4882a593Smuzhiyun 15 00 02 00 80 448*4882a593Smuzhiyun 15 00 02 70 00 449*4882a593Smuzhiyun 15 00 02 71 00 450*4882a593Smuzhiyun 15 00 02 66 fe 451*4882a593Smuzhiyun 15 00 02 82 15 452*4882a593Smuzhiyun 15 00 02 84 15 453*4882a593Smuzhiyun 15 00 02 85 15 454*4882a593Smuzhiyun 15 00 02 3a 24 455*4882a593Smuzhiyun 15 00 02 32 ac 456*4882a593Smuzhiyun 15 00 02 8c 80 457*4882a593Smuzhiyun 15 00 02 3c f5 458*4882a593Smuzhiyun 15 00 02 88 33 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun 39 00 04 ff 98 81 01 461*4882a593Smuzhiyun 15 00 02 22 0a 462*4882a593Smuzhiyun 15 00 02 31 00 463*4882a593Smuzhiyun 15 00 02 53 78 464*4882a593Smuzhiyun 15 00 02 50 5b 465*4882a593Smuzhiyun 15 00 02 51 5b 466*4882a593Smuzhiyun 15 00 02 60 20 467*4882a593Smuzhiyun 15 00 02 61 00 468*4882a593Smuzhiyun 15 00 02 62 0d 469*4882a593Smuzhiyun 15 00 02 63 00 470*4882a593Smuzhiyun 471*4882a593Smuzhiyun 15 00 02 a0 00 472*4882a593Smuzhiyun 15 00 02 a1 10 473*4882a593Smuzhiyun 15 00 02 a2 1c 474*4882a593Smuzhiyun 15 00 02 a3 13 475*4882a593Smuzhiyun 15 00 02 a4 15 476*4882a593Smuzhiyun 15 00 02 a5 26 477*4882a593Smuzhiyun 15 00 02 a6 1a 478*4882a593Smuzhiyun 15 00 02 a7 1d 479*4882a593Smuzhiyun 15 00 02 a8 67 480*4882a593Smuzhiyun 15 00 02 a9 1c 481*4882a593Smuzhiyun 15 00 02 aa 29 482*4882a593Smuzhiyun 15 00 02 ab 5b 483*4882a593Smuzhiyun 15 00 02 ac 26 484*4882a593Smuzhiyun 15 00 02 ad 28 485*4882a593Smuzhiyun 15 00 02 ae 5c 486*4882a593Smuzhiyun 15 00 02 af 30 487*4882a593Smuzhiyun 15 00 02 b0 31 488*4882a593Smuzhiyun 15 00 02 b1 2e 489*4882a593Smuzhiyun 15 00 02 b2 32 490*4882a593Smuzhiyun 15 00 02 b3 00 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun 15 00 02 c0 00 493*4882a593Smuzhiyun 15 00 02 c1 10 494*4882a593Smuzhiyun 15 00 02 c2 1c 495*4882a593Smuzhiyun 15 00 02 c3 13 496*4882a593Smuzhiyun 15 00 02 c4 15 497*4882a593Smuzhiyun 15 00 02 c5 26 498*4882a593Smuzhiyun 15 00 02 c6 1a 499*4882a593Smuzhiyun 15 00 02 c7 1d 500*4882a593Smuzhiyun 15 00 02 c8 67 501*4882a593Smuzhiyun 15 00 02 c9 1c 502*4882a593Smuzhiyun 15 00 02 ca 29 503*4882a593Smuzhiyun 15 00 02 cb 5b 504*4882a593Smuzhiyun 15 00 02 cc 26 505*4882a593Smuzhiyun 15 00 02 cd 28 506*4882a593Smuzhiyun 15 00 02 ce 5c 507*4882a593Smuzhiyun 15 00 02 cf 30 508*4882a593Smuzhiyun 15 00 02 d0 31 509*4882a593Smuzhiyun 15 00 02 d1 2e 510*4882a593Smuzhiyun 15 00 02 d2 32 511*4882a593Smuzhiyun 15 00 02 d3 00 512*4882a593Smuzhiyun 39 00 04 ff 98 81 00 513*4882a593Smuzhiyun 05 00 01 11 514*4882a593Smuzhiyun 05 01 01 29 515*4882a593Smuzhiyun ]; 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun panel-exit-sequence = [ 518*4882a593Smuzhiyun 05 00 01 28 519*4882a593Smuzhiyun 05 00 01 10 520*4882a593Smuzhiyun ]; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun display-timings { 523*4882a593Smuzhiyun native-mode = <&timing0>; 524*4882a593Smuzhiyun 525*4882a593Smuzhiyun timing0: timing0 { 526*4882a593Smuzhiyun clock-frequency = <65000000>; 527*4882a593Smuzhiyun hactive = <720>; 528*4882a593Smuzhiyun vactive = <1280>; 529*4882a593Smuzhiyun hfront-porch = <40>; 530*4882a593Smuzhiyun hsync-len = <10>; 531*4882a593Smuzhiyun hback-porch = <40>; 532*4882a593Smuzhiyun vfront-porch = <22>; 533*4882a593Smuzhiyun vsync-len = <4>; 534*4882a593Smuzhiyun vback-porch = <11>; 535*4882a593Smuzhiyun hsync-active = <0>; 536*4882a593Smuzhiyun vsync-active = <0>; 537*4882a593Smuzhiyun de-active = <0>; 538*4882a593Smuzhiyun pixelclk-active = <0>; 539*4882a593Smuzhiyun }; 540*4882a593Smuzhiyun }; 541*4882a593Smuzhiyun }; 542*4882a593Smuzhiyun}; 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun&emmc { 545*4882a593Smuzhiyun bus-width = <8>; 546*4882a593Smuzhiyun cap-mmc-highspeed; 547*4882a593Smuzhiyun supports-emmc; 548*4882a593Smuzhiyun disable-wp; 549*4882a593Smuzhiyun non-removable; 550*4882a593Smuzhiyun num-slots = <1>; 551*4882a593Smuzhiyun pinctrl-names = "default"; 552*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 553*4882a593Smuzhiyun status = "okay"; 554*4882a593Smuzhiyun}; 555*4882a593Smuzhiyun 556*4882a593Smuzhiyun&gmac { 557*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC_SRC>; 558*4882a593Smuzhiyun assigned-clock-rates = <50000000>; 559*4882a593Smuzhiyun clock_in_out = "output"; 560*4882a593Smuzhiyun pinctrl-names = "default"; 561*4882a593Smuzhiyun pinctrl-0 = <&rmii_pins>; 562*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 563*4882a593Smuzhiyun phy-mode = "rmii"; 564*4882a593Smuzhiyun snps,reset-active-low; 565*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 50000>; 566*4882a593Smuzhiyun snps,reset-gpio = <&gpio2 RK_PD0 GPIO_ACTIVE_LOW>; 567*4882a593Smuzhiyun status = "okay"; 568*4882a593Smuzhiyun}; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun&gpu { 571*4882a593Smuzhiyun status = "okay"; 572*4882a593Smuzhiyun mali-supply = <&vdd_logic>; 573*4882a593Smuzhiyun}; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun&hdmi { 576*4882a593Smuzhiyun rockchip,format = "spdif"; 577*4882a593Smuzhiyun #sound-dai-cells = <0>; 578*4882a593Smuzhiyun status = "okay"; 579*4882a593Smuzhiyun}; 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun&hevc { 582*4882a593Smuzhiyun status = "okay"; 583*4882a593Smuzhiyun}; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun&hevc_mmu { 586*4882a593Smuzhiyun status = "okay"; 587*4882a593Smuzhiyun}; 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun&i2c0 { 590*4882a593Smuzhiyun status = "okay"; 591*4882a593Smuzhiyun clock-frequency = <400000>; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun rtc@51 { 594*4882a593Smuzhiyun compatible = "rtc,hym8563"; 595*4882a593Smuzhiyun reg = <0x51>; 596*4882a593Smuzhiyun irq_gpio = <&gpio0 RK_PD4 IRQ_TYPE_EDGE_FALLING>; 597*4882a593Smuzhiyun wakeup-source; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun rk805: rk805@18 { 601*4882a593Smuzhiyun compatible = "rockchip,rk805"; 602*4882a593Smuzhiyun status = "okay"; 603*4882a593Smuzhiyun reg = <0x18>; 604*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 605*4882a593Smuzhiyun interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 606*4882a593Smuzhiyun pinctrl-names = "default"; 607*4882a593Smuzhiyun pinctrl-0 = <&pmic_int>; 608*4882a593Smuzhiyun rockchip,system-power-controller; 609*4882a593Smuzhiyun wakeup-source; 610*4882a593Smuzhiyun gpio-controller; 611*4882a593Smuzhiyun #gpio-cells = <2>; 612*4882a593Smuzhiyun #clock-cells = <1>; 613*4882a593Smuzhiyun clock-output-names = "rk805-clkout1", "rk805-clkout2"; 614*4882a593Smuzhiyun 615*4882a593Smuzhiyun vcc1-supply = <&vcc5v0_sys>; 616*4882a593Smuzhiyun vcc2-supply = <&vcc5v0_sys>; 617*4882a593Smuzhiyun vcc3-supply = <&vcc5v0_sys>; 618*4882a593Smuzhiyun vcc4-supply = <&vcc5v0_sys>; 619*4882a593Smuzhiyun vcc5-supply = <&vcc_io>; 620*4882a593Smuzhiyun vcc6-supply = <&vcc_io>; 621*4882a593Smuzhiyun 622*4882a593Smuzhiyun rtc { 623*4882a593Smuzhiyun status = "okay"; 624*4882a593Smuzhiyun }; 625*4882a593Smuzhiyun 626*4882a593Smuzhiyun pwrkey { 627*4882a593Smuzhiyun status = "okay"; 628*4882a593Smuzhiyun }; 629*4882a593Smuzhiyun 630*4882a593Smuzhiyun gpio { 631*4882a593Smuzhiyun status = "okay"; 632*4882a593Smuzhiyun }; 633*4882a593Smuzhiyun 634*4882a593Smuzhiyun regulators { 635*4882a593Smuzhiyun compatible = "rk805-regulator"; 636*4882a593Smuzhiyun status = "okay"; 637*4882a593Smuzhiyun #address-cells = <1>; 638*4882a593Smuzhiyun #size-cells = <0>; 639*4882a593Smuzhiyun 640*4882a593Smuzhiyun vdd_arm: DCDC_REG1 { 641*4882a593Smuzhiyun regulator-name = "vdd_arm"; 642*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 643*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 644*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 645*4882a593Smuzhiyun regulator-initial-state = <3>; 646*4882a593Smuzhiyun regulator-boot-on; 647*4882a593Smuzhiyun regulator-always-on; 648*4882a593Smuzhiyun regulator-state-mem { 649*4882a593Smuzhiyun regulator-state-mode = <0x2>; 650*4882a593Smuzhiyun regulator-state-enabled; 651*4882a593Smuzhiyun regulator-state-uv = <975000>; 652*4882a593Smuzhiyun }; 653*4882a593Smuzhiyun }; 654*4882a593Smuzhiyun 655*4882a593Smuzhiyun vdd_logic: DCDC_REG2 { 656*4882a593Smuzhiyun regulator-name = "vdd_logic"; 657*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 658*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 659*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 660*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 661*4882a593Smuzhiyun regulator-boot-on; 662*4882a593Smuzhiyun regulator-always-on; 663*4882a593Smuzhiyun regulator-state-mem { 664*4882a593Smuzhiyun regulator-mode = <0x2>; 665*4882a593Smuzhiyun regulator-on-in-suspend; 666*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 667*4882a593Smuzhiyun }; 668*4882a593Smuzhiyun }; 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 671*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 672*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 673*4882a593Smuzhiyun regulator-boot-on; 674*4882a593Smuzhiyun regulator-always-on; 675*4882a593Smuzhiyun regulator-state-mem { 676*4882a593Smuzhiyun regulator-mode = <0x2>; 677*4882a593Smuzhiyun regulator-on-in-suspend; 678*4882a593Smuzhiyun }; 679*4882a593Smuzhiyun }; 680*4882a593Smuzhiyun 681*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 682*4882a593Smuzhiyun regulator-name = "vcc_io"; 683*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 684*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 685*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 686*4882a593Smuzhiyun regulator-boot-on; 687*4882a593Smuzhiyun regulator-always-on; 688*4882a593Smuzhiyun regulator-state-mem { 689*4882a593Smuzhiyun regulator-mode = <0x2>; 690*4882a593Smuzhiyun regulator-on-in-suspend; 691*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 692*4882a593Smuzhiyun }; 693*4882a593Smuzhiyun }; 694*4882a593Smuzhiyun 695*4882a593Smuzhiyun vcca_33: LDO_REG1 { 696*4882a593Smuzhiyun regulator-name = "vcca_33"; 697*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 698*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 699*4882a593Smuzhiyun regulator-initial-state = <3>; 700*4882a593Smuzhiyun regulator-boot-on; 701*4882a593Smuzhiyun regulator-always-on; 702*4882a593Smuzhiyun regulator-state-mem { 703*4882a593Smuzhiyun regulator-on-in-suspend; 704*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 705*4882a593Smuzhiyun }; 706*4882a593Smuzhiyun }; 707*4882a593Smuzhiyun 708*4882a593Smuzhiyun vcc_1v8_cam: LDO_REG2 { 709*4882a593Smuzhiyun regulator-name = "vcc_1v8_cam"; 710*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 711*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 712*4882a593Smuzhiyun regulator-boot-on; 713*4882a593Smuzhiyun regulator-always-on; 714*4882a593Smuzhiyun regulator-state-mem { 715*4882a593Smuzhiyun regulator-on-in-suspend; 716*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 717*4882a593Smuzhiyun }; 718*4882a593Smuzhiyun }; 719*4882a593Smuzhiyun 720*4882a593Smuzhiyun vdd10_pmu: LDO_REG3 { 721*4882a593Smuzhiyun regulator-name = "vdd10_pmu"; 722*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 723*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 724*4882a593Smuzhiyun regulator-boot-on; 725*4882a593Smuzhiyun regulator-always-on; 726*4882a593Smuzhiyun regulator-state-mem { 727*4882a593Smuzhiyun regulator-on-in-suspend; 728*4882a593Smuzhiyun regulator-suspend-microvolt = <1100000>; 729*4882a593Smuzhiyun }; 730*4882a593Smuzhiyun }; 731*4882a593Smuzhiyun }; 732*4882a593Smuzhiyun }; 733*4882a593Smuzhiyun}; 734*4882a593Smuzhiyun 735*4882a593Smuzhiyun&i2c2 { 736*4882a593Smuzhiyun status = "okay"; 737*4882a593Smuzhiyun 738*4882a593Smuzhiyun gc2145@3c { 739*4882a593Smuzhiyun status = "okay"; 740*4882a593Smuzhiyun compatible = "galaxycore,gc2145"; 741*4882a593Smuzhiyun reg = <0x3c>; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun clocks = <&cru SCLK_CIF_OUT>; 744*4882a593Smuzhiyun clock-names = "xvclk"; 745*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun avdd-supply = <&vcc_2v8_cam>; 748*4882a593Smuzhiyun dovdd-supply = <&vcc_2v8_cam>; 749*4882a593Smuzhiyun dvdd-supply = <&vcc_1v8_cam>; 750*4882a593Smuzhiyun 751*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 752*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 753*4882a593Smuzhiyun rockchip,camera-module-name = "CameraKing"; 754*4882a593Smuzhiyun rockchip,camera-module-lens-name = "Largan"; 755*4882a593Smuzhiyun 756*4882a593Smuzhiyun port { 757*4882a593Smuzhiyun gc2145_out: endpoint { 758*4882a593Smuzhiyun remote-endpoint = <&cif_in_bcam>; 759*4882a593Smuzhiyun }; 760*4882a593Smuzhiyun }; 761*4882a593Smuzhiyun }; 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun gt1x: gt1x@14 { 764*4882a593Smuzhiyun status = "okay"; 765*4882a593Smuzhiyun compatible = "goodix,gt1x"; 766*4882a593Smuzhiyun reg = <0x14>; 767*4882a593Smuzhiyun power-supply = <&vcc3v3_lcd_n>; 768*4882a593Smuzhiyun pinctrl-names = "default"; 769*4882a593Smuzhiyun pinctrl-0 = <&tp_rst>, <&tp_irq>; 770*4882a593Smuzhiyun goodix,rst-gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_LOW>; 771*4882a593Smuzhiyun goodix,irq-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; 772*4882a593Smuzhiyun }; 773*4882a593Smuzhiyun 774*4882a593Smuzhiyun mma7660: mma7660@4c { 775*4882a593Smuzhiyun status = "okay"; 776*4882a593Smuzhiyun compatible = "gs_mma7660"; 777*4882a593Smuzhiyun reg = <0x4c>; 778*4882a593Smuzhiyun type = <SENSOR_TYPE_ACCEL>; 779*4882a593Smuzhiyun irq-gpio = <&gpio0 RK_PB4 IRQ_TYPE_LEVEL_LOW>; 780*4882a593Smuzhiyun irq_enable = <0>; 781*4882a593Smuzhiyun poll_delay_ms = <30>; 782*4882a593Smuzhiyun layout = <1>; 783*4882a593Smuzhiyun reprobe_en = <1>; 784*4882a593Smuzhiyun }; 785*4882a593Smuzhiyun}; 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun&i2s_8ch{ 788*4882a593Smuzhiyun status = "okay"; 789*4882a593Smuzhiyun #sound-dai-cells = <0>; 790*4882a593Smuzhiyun}; 791*4882a593Smuzhiyun 792*4882a593Smuzhiyun&mpp_srv { 793*4882a593Smuzhiyun status = "okay"; 794*4882a593Smuzhiyun}; 795*4882a593Smuzhiyun 796*4882a593Smuzhiyun&pinctrl { 797*4882a593Smuzhiyun codec{ 798*4882a593Smuzhiyun spk_ctl_h: spk-ctl-h{ 799*4882a593Smuzhiyun rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 800*4882a593Smuzhiyun }; 801*4882a593Smuzhiyun 802*4882a593Smuzhiyun hp_ctl_h: hp-ctl-h{ 803*4882a593Smuzhiyun rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 804*4882a593Smuzhiyun }; 805*4882a593Smuzhiyun }; 806*4882a593Smuzhiyun 807*4882a593Smuzhiyun lcd { 808*4882a593Smuzhiyun lcd_en: lcd-en { 809*4882a593Smuzhiyun rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 810*4882a593Smuzhiyun }; 811*4882a593Smuzhiyun 812*4882a593Smuzhiyun tp_rst: tp-rst { 813*4882a593Smuzhiyun rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 814*4882a593Smuzhiyun }; 815*4882a593Smuzhiyun 816*4882a593Smuzhiyun tp_irq: tp-irq { 817*4882a593Smuzhiyun rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 818*4882a593Smuzhiyun }; 819*4882a593Smuzhiyun }; 820*4882a593Smuzhiyun 821*4882a593Smuzhiyun pmic { 822*4882a593Smuzhiyun pmic_int: pmic-int { 823*4882a593Smuzhiyun rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_default>; 824*4882a593Smuzhiyun }; 825*4882a593Smuzhiyun 826*4882a593Smuzhiyun pmic_sleep: pmic-sleep { 827*4882a593Smuzhiyun rockchip,pins = <3 RK_PC1 2 &pcfg_pull_default>; 828*4882a593Smuzhiyun }; 829*4882a593Smuzhiyun }; 830*4882a593Smuzhiyun 831*4882a593Smuzhiyun sensor { 832*4882a593Smuzhiyun mma7660_irq_gpio: mma7660-irq-gpio { 833*4882a593Smuzhiyun rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 834*4882a593Smuzhiyun }; 835*4882a593Smuzhiyun }; 836*4882a593Smuzhiyun 837*4882a593Smuzhiyun usb2 { 838*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 839*4882a593Smuzhiyun rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 840*4882a593Smuzhiyun }; 841*4882a593Smuzhiyun 842*4882a593Smuzhiyun hub_rst: hub-rst { 843*4882a593Smuzhiyun rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 844*4882a593Smuzhiyun }; 845*4882a593Smuzhiyun }; 846*4882a593Smuzhiyun 847*4882a593Smuzhiyun uart0{ 848*4882a593Smuzhiyun uart0_rts_gpio: uart0-rts-gpio{ 849*4882a593Smuzhiyun rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 850*4882a593Smuzhiyun }; 851*4882a593Smuzhiyun }; 852*4882a593Smuzhiyun 853*4882a593Smuzhiyun wifi{ 854*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h{ 855*4882a593Smuzhiyun rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 856*4882a593Smuzhiyun }; 857*4882a593Smuzhiyun wifi_pwren_l: wifi-pwren-l{ 858*4882a593Smuzhiyun rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 859*4882a593Smuzhiyun }; 860*4882a593Smuzhiyun }; 861*4882a593Smuzhiyun}; 862*4882a593Smuzhiyun 863*4882a593Smuzhiyun&pwm0 { 864*4882a593Smuzhiyun status = "okay"; 865*4882a593Smuzhiyun}; 866*4882a593Smuzhiyun 867*4882a593Smuzhiyun&pwm3{ 868*4882a593Smuzhiyun interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 869*4882a593Smuzhiyun compatible = "rockchip,remotectl-pwm"; 870*4882a593Smuzhiyun pinctrl-names = "default"; 871*4882a593Smuzhiyun remote_pwm_id = <3>; 872*4882a593Smuzhiyun handle_cpu_id = <0>; 873*4882a593Smuzhiyun remote_support_psci = <0>; 874*4882a593Smuzhiyun status = "okay"; 875*4882a593Smuzhiyun ir_key1 { 876*4882a593Smuzhiyun rockchip,usercode = <0xff00>; 877*4882a593Smuzhiyun rockchip,key_table = 878*4882a593Smuzhiyun <0xeb KEY_POWER>, 879*4882a593Smuzhiyun <0xec KEY_COMPOSE>, 880*4882a593Smuzhiyun <0xfe KEY_BACK>, 881*4882a593Smuzhiyun <0xb7 KEY_HOME>, 882*4882a593Smuzhiyun <0xa3 KEY_WWW>, 883*4882a593Smuzhiyun <0xf4 KEY_VOLUMEUP>, 884*4882a593Smuzhiyun <0xa7 KEY_VOLUMEDOWN>, 885*4882a593Smuzhiyun <0xf8 KEY_ENTER>, 886*4882a593Smuzhiyun <0xfc KEY_UP>, 887*4882a593Smuzhiyun <0xfd KEY_DOWN>, 888*4882a593Smuzhiyun <0xf1 KEY_LEFT>, 889*4882a593Smuzhiyun <0xe5 KEY_RIGHT>; 890*4882a593Smuzhiyun }; 891*4882a593Smuzhiyun}; 892*4882a593Smuzhiyun 893*4882a593Smuzhiyun&rga { 894*4882a593Smuzhiyun status = "okay"; 895*4882a593Smuzhiyun}; 896*4882a593Smuzhiyun 897*4882a593Smuzhiyun&route_dsi{ 898*4882a593Smuzhiyun status = "okay"; 899*4882a593Smuzhiyun}; 900*4882a593Smuzhiyun 901*4882a593Smuzhiyun&saradc { 902*4882a593Smuzhiyun status = "okay"; 903*4882a593Smuzhiyun vref-supply = <&vcc_io>; 904*4882a593Smuzhiyun}; 905*4882a593Smuzhiyun 906*4882a593Smuzhiyun&sdio { 907*4882a593Smuzhiyun max-frequency = <50000000>; 908*4882a593Smuzhiyun supports-sdio; 909*4882a593Smuzhiyun disable-wp; 910*4882a593Smuzhiyun cap-sd-highspeed; 911*4882a593Smuzhiyun cap-sdio-irq; 912*4882a593Smuzhiyun keep-power-in-suspend; 913*4882a593Smuzhiyun pinctrl-names = "default"; 914*4882a593Smuzhiyun pinctrl-0 = <&sdio_cmd &sdio_clk &sdio_bus4>; 915*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 916*4882a593Smuzhiyun non-removable; 917*4882a593Smuzhiyun sd-uhs-sdr104; 918*4882a593Smuzhiyun status = "okay"; 919*4882a593Smuzhiyun}; 920*4882a593Smuzhiyun 921*4882a593Smuzhiyun&sdmmc { 922*4882a593Smuzhiyun cap-mmc-highspeed; 923*4882a593Smuzhiyun cap-sd-highspeed; 924*4882a593Smuzhiyun no-sdio; 925*4882a593Smuzhiyun no-mmc; 926*4882a593Smuzhiyun vmmc-supply = <&vcc_sdmmc>; 927*4882a593Smuzhiyun card-detect-delay = <800>; 928*4882a593Smuzhiyun pinctrl-names = "default"; 929*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4 &sdmmc_det>; 930*4882a593Smuzhiyun rockchip,default-sample-phase=<90>; 931*4882a593Smuzhiyun status = "disabled"; 932*4882a593Smuzhiyun}; 933*4882a593Smuzhiyun 934*4882a593Smuzhiyun&spdif{ 935*4882a593Smuzhiyun compatible = "rockchip,rk3188-spdif"; 936*4882a593Smuzhiyun status = "okay"; 937*4882a593Smuzhiyun i2c-scl-rising-time-ns = <450>; 938*4882a593Smuzhiyun i2c-scl-falling-time-ns = <15>; 939*4882a593Smuzhiyun #sound-dai-cells = <0>; 940*4882a593Smuzhiyun}; 941*4882a593Smuzhiyun 942*4882a593Smuzhiyun&tsadc { 943*4882a593Smuzhiyun status = "okay"; 944*4882a593Smuzhiyun}; 945*4882a593Smuzhiyun 946*4882a593Smuzhiyun&u2phy { 947*4882a593Smuzhiyun status = "okay"; 948*4882a593Smuzhiyun 949*4882a593Smuzhiyun u2phy_otg: otg-port { 950*4882a593Smuzhiyun status = "okay"; 951*4882a593Smuzhiyun }; 952*4882a593Smuzhiyun 953*4882a593Smuzhiyun u2phy_host: host-port { 954*4882a593Smuzhiyun phy-supply = <&vcc_host_5v>; 955*4882a593Smuzhiyun status = "okay"; 956*4882a593Smuzhiyun }; 957*4882a593Smuzhiyun}; 958*4882a593Smuzhiyun 959*4882a593Smuzhiyun&uart0{ 960*4882a593Smuzhiyun pinctrl-names = "default"; 961*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 962*4882a593Smuzhiyun status = "okay"; 963*4882a593Smuzhiyun}; 964*4882a593Smuzhiyun 965*4882a593Smuzhiyun&usb_host_ehci { 966*4882a593Smuzhiyun status = "okay"; 967*4882a593Smuzhiyun}; 968*4882a593Smuzhiyun 969*4882a593Smuzhiyun&usb_host_ohci { 970*4882a593Smuzhiyun status = "okay"; 971*4882a593Smuzhiyun}; 972*4882a593Smuzhiyun 973*4882a593Smuzhiyun&usb_otg { 974*4882a593Smuzhiyun status = "okay"; 975*4882a593Smuzhiyun}; 976*4882a593Smuzhiyun 977*4882a593Smuzhiyun&vdpu { 978*4882a593Smuzhiyun status = "okay"; 979*4882a593Smuzhiyun}; 980*4882a593Smuzhiyun 981*4882a593Smuzhiyun&vepu { 982*4882a593Smuzhiyun status = "okay"; 983*4882a593Smuzhiyun}; 984*4882a593Smuzhiyun 985*4882a593Smuzhiyun&vop { 986*4882a593Smuzhiyun status = "okay"; 987*4882a593Smuzhiyun}; 988*4882a593Smuzhiyun 989*4882a593Smuzhiyun&vop_mmu { 990*4882a593Smuzhiyun status = "okay"; 991*4882a593Smuzhiyun}; 992*4882a593Smuzhiyun 993*4882a593Smuzhiyun&vpu_mmu { 994*4882a593Smuzhiyun status = "okay"; 995*4882a593Smuzhiyun}; 996