1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 10*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 11*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h> 12*4882a593Smuzhiyun#include "rk3126.dtsi" 13*4882a593Smuzhiyun#include "rk312x-android.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "Rockchip RK3126C EVB DDR3 V10 Linux board"; 17*4882a593Smuzhiyun compatible = "rockchip,rk3126"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun chosen { 20*4882a593Smuzhiyun bootargs = "earlycon=uart8250,mmio32,0x20068000 console=ttyFIQ0 root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 rootwait"; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun adc-keys { 24*4882a593Smuzhiyun compatible = "adc-keys"; 25*4882a593Smuzhiyun io-channels = <&saradc 2>; 26*4882a593Smuzhiyun io-channel-names = "buttons"; 27*4882a593Smuzhiyun poll-interval = <100>; 28*4882a593Smuzhiyun keyup-threshold-microvolt = <3300000>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun vol-up-key { 31*4882a593Smuzhiyun label = "volume Up"; 32*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 33*4882a593Smuzhiyun press-threshold-microvolt = <0>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun vol-down-key{ 37*4882a593Smuzhiyun label = "volume down"; 38*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 39*4882a593Smuzhiyun press-threshold-microvolt = <400000>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun menu-key{ 43*4882a593Smuzhiyun label = "menu"; 44*4882a593Smuzhiyun linux,code = <KEY_MENU>; 45*4882a593Smuzhiyun press-threshold-microvolt = <840000>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun esc-key { 49*4882a593Smuzhiyun label = "esc"; 50*4882a593Smuzhiyun linux,code = <KEY_ESC>; 51*4882a593Smuzhiyun press-threshold-microvolt = <1380000>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun backlight: backlight { 56*4882a593Smuzhiyun compatible = "pwm-backlight"; 57*4882a593Smuzhiyun pwms = <&pwm0 0 25000 0>; 58*4882a593Smuzhiyun brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 59*4882a593Smuzhiyun 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 60*4882a593Smuzhiyun 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 61*4882a593Smuzhiyun 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 62*4882a593Smuzhiyun 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 63*4882a593Smuzhiyun 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 64*4882a593Smuzhiyun 105 106 107 108 109 110 111 112 113 114 115 116 117 65*4882a593Smuzhiyun 118 119 120 121 122 123 124 125 126 127 128 129 130 66*4882a593Smuzhiyun 131 132 133 134 135 136 137 138 139 140 141 142 143 67*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 152 153 154 155 156 68*4882a593Smuzhiyun 157 158 159 160 161 162 163 164 165 166 167 168 169 69*4882a593Smuzhiyun 170 171 172 173 174 175 176 177 178 179 180 181 182 70*4882a593Smuzhiyun 183 184 185 186 187 188 189 190 191 192 193 194 195 71*4882a593Smuzhiyun 196 197 198 199 200 201 202 203 204 205 206 207 208 72*4882a593Smuzhiyun 209 210 211 212 213 214 215 216 217 218 219 220 221 73*4882a593Smuzhiyun 222 223 224 225 226 227 228 229 230 231 232 233 234 74*4882a593Smuzhiyun 235 236 237 238 239 240 241 242 243 244 245 246 247 75*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 76*4882a593Smuzhiyun default-brightness-level = <128>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun rk_headset { 80*4882a593Smuzhiyun compatible = "rockchip_headset"; 81*4882a593Smuzhiyun headset_gpio = <&gpio2 10 GPIO_ACTIVE_LOW>; 82*4882a593Smuzhiyun io-channels = <&saradc 0>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun sound { 86*4882a593Smuzhiyun compatible = "simple-audio-card"; 87*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 88*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 89*4882a593Smuzhiyun simple-audio-card,name = "rockchip,rk312x"; 90*4882a593Smuzhiyun simple-audio-card,cpu { 91*4882a593Smuzhiyun sound-dai = <&i2s_2ch>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun simple-audio-card,codec { 94*4882a593Smuzhiyun sound-dai = <&codec>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun vcc5v0_host: vcc5v0-host { 99*4882a593Smuzhiyun compatible = "regulator-fixed"; 100*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 101*4882a593Smuzhiyun pinctrl-names = "default"; 102*4882a593Smuzhiyun pinctrl-0 = <&usb_hub_h>; 103*4882a593Smuzhiyun gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>; 104*4882a593Smuzhiyun enable-active-high; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun vccadc_ref: vccadc-ref { 108*4882a593Smuzhiyun compatible = "regulator-fixed"; 109*4882a593Smuzhiyun regulator-name = "SARADC_AVDD33"; 110*4882a593Smuzhiyun regulator-always-on; 111*4882a593Smuzhiyun regulator-boot-on; 112*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 113*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun vcc_sys: vcc-sys { 117*4882a593Smuzhiyun compatible = "regulator-fixed"; 118*4882a593Smuzhiyun regulator-name = "vcc_sys"; 119*4882a593Smuzhiyun regulator-min-microvolt = <4000000>; 120*4882a593Smuzhiyun regulator-max-microvolt = <4000000>; 121*4882a593Smuzhiyun regulator-always-on; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun xin32k: xin32k { 125*4882a593Smuzhiyun compatible = "fixed-clock"; 126*4882a593Smuzhiyun clock-frequency = <32768>; 127*4882a593Smuzhiyun clock-output-names = "xin32k"; 128*4882a593Smuzhiyun #clock-cells = <0>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun wireless-wlan { 132*4882a593Smuzhiyun compatible = "wlan-platdata"; 133*4882a593Smuzhiyun power_ctrl_by_pmu; 134*4882a593Smuzhiyun power_pmu_regulator = "ldo5"; 135*4882a593Smuzhiyun power_pmu_enable_level = <1>; 136*4882a593Smuzhiyun wifi_chip_type = "rk915"; 137*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; 138*4882a593Smuzhiyun status = "okay"; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun}; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun&cif_new { 143*4882a593Smuzhiyun status = "okay"; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun ports { 146*4882a593Smuzhiyun port@0 { 147*4882a593Smuzhiyun cif_in_fcam: endpoint@0 { 148*4882a593Smuzhiyun remote-endpoint = <&gc0312_out>; 149*4882a593Smuzhiyun vsync-active = <1>; 150*4882a593Smuzhiyun hsync-active = <1>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun cif_in_bcam: endpoint@1 { 154*4882a593Smuzhiyun remote-endpoint = <&gc2145_out>; 155*4882a593Smuzhiyun vsync-active = <0>; 156*4882a593Smuzhiyun hsync-active = <1>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun}; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun&codec { 163*4882a593Smuzhiyun #sound-dai-cells = <0>; 164*4882a593Smuzhiyun spk-ctl-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; 165*4882a593Smuzhiyun spk-mute-delay = <200>; 166*4882a593Smuzhiyun hp-mute-delay = <100>; 167*4882a593Smuzhiyun rk312x_for_mid = <0>; 168*4882a593Smuzhiyun is_rk3128 = <0>; 169*4882a593Smuzhiyun spk_volume = <25>; 170*4882a593Smuzhiyun hp_volume = <25>; 171*4882a593Smuzhiyun capture_volume = <26>; 172*4882a593Smuzhiyun gpio_debug = <1>; 173*4882a593Smuzhiyun codec_hp_det = <0>; 174*4882a593Smuzhiyun status = "okay"; 175*4882a593Smuzhiyun}; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun&cpu0 { 178*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 179*4882a593Smuzhiyun}; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun&display_subsystem { 182*4882a593Smuzhiyun status = "okay"; 183*4882a593Smuzhiyun}; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun&dmc { 186*4882a593Smuzhiyun center-supply = <&vdd_log>; 187*4882a593Smuzhiyun}; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun&dsi { 190*4882a593Smuzhiyun status = "okay"; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun panel@0 { 193*4882a593Smuzhiyun compatible = "sitronix,st7703", "simple-panel-dsi"; 194*4882a593Smuzhiyun reg = <0>; 195*4882a593Smuzhiyun backlight = <&backlight>; 196*4882a593Smuzhiyun power-supply = <&ldo6>; 197*4882a593Smuzhiyun power-invert = <1>; 198*4882a593Smuzhiyun prepare-delay-ms = <0>; 199*4882a593Smuzhiyun reset-delay-ms = <0>; 200*4882a593Smuzhiyun init-delay-ms = <80>; 201*4882a593Smuzhiyun enable-delay-ms = <0>; 202*4882a593Smuzhiyun disable-delay-ms = <10>; 203*4882a593Smuzhiyun unprepare-delay-ms = <60>; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun width-mm = <68>; 206*4882a593Smuzhiyun height-mm = <121>; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 209*4882a593Smuzhiyun MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 210*4882a593Smuzhiyun dsi,format = <MIPI_DSI_FMT_RGB888>; 211*4882a593Smuzhiyun dsi,lanes = <4>; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun panel-init-sequence = [ 214*4882a593Smuzhiyun 39 00 04 ff 98 81 03 215*4882a593Smuzhiyun 15 00 02 01 00 216*4882a593Smuzhiyun 15 00 02 02 00 217*4882a593Smuzhiyun 15 00 02 03 53 218*4882a593Smuzhiyun 15 00 02 04 53 219*4882a593Smuzhiyun 15 00 02 05 13 220*4882a593Smuzhiyun 15 00 02 06 04 221*4882a593Smuzhiyun 15 00 02 07 02 222*4882a593Smuzhiyun 15 00 02 08 02 223*4882a593Smuzhiyun 15 00 02 09 00 224*4882a593Smuzhiyun 15 00 02 0a 00 225*4882a593Smuzhiyun 15 00 02 0b 00 226*4882a593Smuzhiyun 15 00 02 0c 00 227*4882a593Smuzhiyun 15 00 02 0d 00 228*4882a593Smuzhiyun 15 00 02 0e 00 229*4882a593Smuzhiyun 15 00 02 0f 00 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun 15 00 02 10 00 232*4882a593Smuzhiyun 15 00 02 11 00 233*4882a593Smuzhiyun 15 00 02 12 00 234*4882a593Smuzhiyun 15 00 02 13 00 235*4882a593Smuzhiyun 15 00 02 14 00 236*4882a593Smuzhiyun 15 00 02 15 08 237*4882a593Smuzhiyun 15 00 02 16 10 238*4882a593Smuzhiyun 15 00 02 17 00 239*4882a593Smuzhiyun 15 00 02 18 08 240*4882a593Smuzhiyun 15 00 02 19 00 241*4882a593Smuzhiyun 15 00 02 1a 00 242*4882a593Smuzhiyun 15 00 02 1b 00 243*4882a593Smuzhiyun 15 00 02 1c 00 244*4882a593Smuzhiyun 15 00 02 1d 00 245*4882a593Smuzhiyun 15 00 02 1e c0 246*4882a593Smuzhiyun 15 00 02 1f 80 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun 15 00 02 20 02 249*4882a593Smuzhiyun 15 00 02 21 09 250*4882a593Smuzhiyun 15 00 02 22 00 251*4882a593Smuzhiyun 15 00 02 23 00 252*4882a593Smuzhiyun 15 00 02 24 00 253*4882a593Smuzhiyun 15 00 02 25 00 254*4882a593Smuzhiyun 15 00 02 26 00 255*4882a593Smuzhiyun 15 00 02 27 00 256*4882a593Smuzhiyun 15 00 02 28 55 257*4882a593Smuzhiyun 15 00 02 29 03 258*4882a593Smuzhiyun 15 00 02 2a 00 259*4882a593Smuzhiyun 15 00 02 2b 00 260*4882a593Smuzhiyun 15 00 02 2c 00 261*4882a593Smuzhiyun 15 00 02 2d 00 262*4882a593Smuzhiyun 15 00 02 2e 00 263*4882a593Smuzhiyun 15 00 02 2f 00 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun 15 00 02 30 00 266*4882a593Smuzhiyun 15 00 02 31 00 267*4882a593Smuzhiyun 15 00 02 32 00 268*4882a593Smuzhiyun 15 00 02 33 00 269*4882a593Smuzhiyun 15 00 02 34 04 270*4882a593Smuzhiyun 15 00 02 35 05 271*4882a593Smuzhiyun 15 00 02 36 05 272*4882a593Smuzhiyun 15 00 02 37 00 273*4882a593Smuzhiyun 15 00 02 38 3c 274*4882a593Smuzhiyun 15 00 02 39 35 275*4882a593Smuzhiyun 15 00 02 3a 00 276*4882a593Smuzhiyun 15 00 02 3b 40 277*4882a593Smuzhiyun 15 00 02 3c 00 278*4882a593Smuzhiyun 15 00 02 3d 00 279*4882a593Smuzhiyun 15 00 02 3e 00 280*4882a593Smuzhiyun 15 00 02 3f 00 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun 15 00 02 40 00 283*4882a593Smuzhiyun 15 00 02 41 88 284*4882a593Smuzhiyun 15 00 02 42 00 285*4882a593Smuzhiyun 15 00 02 43 00 286*4882a593Smuzhiyun 15 00 02 44 1f 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun 15 00 02 50 01 289*4882a593Smuzhiyun 15 00 02 51 23 290*4882a593Smuzhiyun 15 00 02 52 45 291*4882a593Smuzhiyun 15 00 02 53 67 292*4882a593Smuzhiyun 15 00 02 54 89 293*4882a593Smuzhiyun 15 00 02 55 ab 294*4882a593Smuzhiyun 15 00 02 56 01 295*4882a593Smuzhiyun 15 00 02 57 23 296*4882a593Smuzhiyun 15 00 02 58 45 297*4882a593Smuzhiyun 15 00 02 59 67 298*4882a593Smuzhiyun 15 00 02 5a 89 299*4882a593Smuzhiyun 15 00 02 5b ab 300*4882a593Smuzhiyun 15 00 02 5c cd 301*4882a593Smuzhiyun 15 00 02 5d ef 302*4882a593Smuzhiyun 15 00 02 5e 03 303*4882a593Smuzhiyun 15 00 02 5f 14 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun 15 00 02 60 15 306*4882a593Smuzhiyun 15 00 02 61 0c 307*4882a593Smuzhiyun 15 00 02 62 0d 308*4882a593Smuzhiyun 15 00 02 63 0e 309*4882a593Smuzhiyun 15 00 02 64 0f 310*4882a593Smuzhiyun 15 00 02 65 10 311*4882a593Smuzhiyun 15 00 02 66 11 312*4882a593Smuzhiyun 15 00 02 67 08 313*4882a593Smuzhiyun 15 00 02 68 02 314*4882a593Smuzhiyun 15 00 02 69 0a 315*4882a593Smuzhiyun 15 00 02 6a 02 316*4882a593Smuzhiyun 15 00 02 6b 02 317*4882a593Smuzhiyun 15 00 02 6c 02 318*4882a593Smuzhiyun 15 00 02 6d 02 319*4882a593Smuzhiyun 15 00 02 6e 02 320*4882a593Smuzhiyun 15 00 02 6f 02 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun 15 00 02 70 02 323*4882a593Smuzhiyun 15 00 02 71 02 324*4882a593Smuzhiyun 15 00 02 72 06 325*4882a593Smuzhiyun 15 00 02 73 02 326*4882a593Smuzhiyun 15 00 02 74 02 327*4882a593Smuzhiyun 15 00 02 75 14 328*4882a593Smuzhiyun 15 00 02 76 15 329*4882a593Smuzhiyun 15 00 02 77 0f 330*4882a593Smuzhiyun 15 00 02 78 0e 331*4882a593Smuzhiyun 15 00 02 79 0d 332*4882a593Smuzhiyun 15 00 02 7a 0c 333*4882a593Smuzhiyun 15 00 02 7b 11 334*4882a593Smuzhiyun 15 00 02 7c 10 335*4882a593Smuzhiyun 15 00 02 7d 06 336*4882a593Smuzhiyun 15 00 02 7e 02 337*4882a593Smuzhiyun 15 00 02 7f 0a 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun 15 00 02 80 02 340*4882a593Smuzhiyun 15 00 02 81 02 341*4882a593Smuzhiyun 15 00 02 82 02 342*4882a593Smuzhiyun 15 00 02 83 02 343*4882a593Smuzhiyun 15 00 02 84 02 344*4882a593Smuzhiyun 15 00 02 85 02 345*4882a593Smuzhiyun 15 00 02 86 02 346*4882a593Smuzhiyun 15 00 02 87 02 347*4882a593Smuzhiyun 15 00 02 88 08 348*4882a593Smuzhiyun 15 00 02 89 02 349*4882a593Smuzhiyun 15 00 02 8a 02 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun 39 00 04 ff 98 81 04 352*4882a593Smuzhiyun 15 00 02 00 80 353*4882a593Smuzhiyun 15 00 02 70 00 354*4882a593Smuzhiyun 15 00 02 71 00 355*4882a593Smuzhiyun 15 00 02 66 fe 356*4882a593Smuzhiyun 15 00 02 82 15 357*4882a593Smuzhiyun 15 00 02 84 15 358*4882a593Smuzhiyun 15 00 02 85 15 359*4882a593Smuzhiyun 15 00 02 3a 24 360*4882a593Smuzhiyun 15 00 02 32 ac 361*4882a593Smuzhiyun 15 00 02 8c 80 362*4882a593Smuzhiyun 15 00 02 3c f5 363*4882a593Smuzhiyun 15 00 02 88 33 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun 39 00 04 ff 98 81 01 366*4882a593Smuzhiyun 15 00 02 22 0a 367*4882a593Smuzhiyun 15 00 02 31 00 368*4882a593Smuzhiyun 15 00 02 53 78 369*4882a593Smuzhiyun 15 00 02 50 5b 370*4882a593Smuzhiyun 15 00 02 51 5b 371*4882a593Smuzhiyun 15 00 02 60 20 372*4882a593Smuzhiyun 15 00 02 61 00 373*4882a593Smuzhiyun 15 00 02 62 0d 374*4882a593Smuzhiyun 15 00 02 63 00 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun 15 00 02 a0 00 377*4882a593Smuzhiyun 15 00 02 a1 10 378*4882a593Smuzhiyun 15 00 02 a2 1c 379*4882a593Smuzhiyun 15 00 02 a3 13 380*4882a593Smuzhiyun 15 00 02 a4 15 381*4882a593Smuzhiyun 15 00 02 a5 26 382*4882a593Smuzhiyun 15 00 02 a6 1a 383*4882a593Smuzhiyun 15 00 02 a7 1d 384*4882a593Smuzhiyun 15 00 02 a8 67 385*4882a593Smuzhiyun 15 00 02 a9 1c 386*4882a593Smuzhiyun 15 00 02 aa 29 387*4882a593Smuzhiyun 15 00 02 ab 5b 388*4882a593Smuzhiyun 15 00 02 ac 26 389*4882a593Smuzhiyun 15 00 02 ad 28 390*4882a593Smuzhiyun 15 00 02 ae 5c 391*4882a593Smuzhiyun 15 00 02 af 30 392*4882a593Smuzhiyun 15 00 02 b0 31 393*4882a593Smuzhiyun 15 00 02 b1 2e 394*4882a593Smuzhiyun 15 00 02 b2 32 395*4882a593Smuzhiyun 15 00 02 b3 00 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun 15 00 02 c0 00 398*4882a593Smuzhiyun 15 00 02 c1 10 399*4882a593Smuzhiyun 15 00 02 c2 1c 400*4882a593Smuzhiyun 15 00 02 c3 13 401*4882a593Smuzhiyun 15 00 02 c4 15 402*4882a593Smuzhiyun 15 00 02 c5 26 403*4882a593Smuzhiyun 15 00 02 c6 1a 404*4882a593Smuzhiyun 15 00 02 c7 1d 405*4882a593Smuzhiyun 15 00 02 c8 67 406*4882a593Smuzhiyun 15 00 02 c9 1c 407*4882a593Smuzhiyun 15 00 02 ca 29 408*4882a593Smuzhiyun 15 00 02 cb 5b 409*4882a593Smuzhiyun 15 00 02 cc 26 410*4882a593Smuzhiyun 15 00 02 cd 28 411*4882a593Smuzhiyun 15 00 02 ce 5c 412*4882a593Smuzhiyun 15 00 02 cf 30 413*4882a593Smuzhiyun 15 00 02 d0 31 414*4882a593Smuzhiyun 15 00 02 d1 2e 415*4882a593Smuzhiyun 15 00 02 d2 32 416*4882a593Smuzhiyun 15 00 02 d3 00 417*4882a593Smuzhiyun 39 00 04 ff 98 81 00 418*4882a593Smuzhiyun 05 00 01 11 419*4882a593Smuzhiyun 05 01 01 29 420*4882a593Smuzhiyun ]; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun panel-exit-sequence = [ 423*4882a593Smuzhiyun 05 00 01 28 424*4882a593Smuzhiyun 05 00 01 10 425*4882a593Smuzhiyun ]; 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun display-timings { 428*4882a593Smuzhiyun native-mode = <&timing0>; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun timing0: timing0 { 431*4882a593Smuzhiyun clock-frequency = <66000000>; 432*4882a593Smuzhiyun hactive = <720>; 433*4882a593Smuzhiyun vactive = <1280>; 434*4882a593Smuzhiyun hfront-porch = <40>; 435*4882a593Smuzhiyun hsync-len = <10>; 436*4882a593Smuzhiyun hback-porch = <40>; 437*4882a593Smuzhiyun vfront-porch = <22>; 438*4882a593Smuzhiyun vsync-len = <4>; 439*4882a593Smuzhiyun vback-porch = <11>; 440*4882a593Smuzhiyun hsync-active = <0>; 441*4882a593Smuzhiyun vsync-active = <0>; 442*4882a593Smuzhiyun de-active = <0>; 443*4882a593Smuzhiyun pixelclk-active = <0>; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun ports { 448*4882a593Smuzhiyun #address-cells = <1>; 449*4882a593Smuzhiyun #size-cells = <0>; 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun port@0 { 452*4882a593Smuzhiyun reg = <0>; 453*4882a593Smuzhiyun panel_in_dsi: endpoint { 454*4882a593Smuzhiyun remote-endpoint = <&dsi_out_panel>; 455*4882a593Smuzhiyun }; 456*4882a593Smuzhiyun }; 457*4882a593Smuzhiyun }; 458*4882a593Smuzhiyun }; 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun ports { 461*4882a593Smuzhiyun #address-cells = <1>; 462*4882a593Smuzhiyun #size-cells = <0>; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun port@1 { 465*4882a593Smuzhiyun reg = <1>; 466*4882a593Smuzhiyun dsi_out_panel: endpoint { 467*4882a593Smuzhiyun remote-endpoint = <&panel_in_dsi>; 468*4882a593Smuzhiyun }; 469*4882a593Smuzhiyun }; 470*4882a593Smuzhiyun }; 471*4882a593Smuzhiyun}; 472*4882a593Smuzhiyun 473*4882a593Smuzhiyun&emmc { 474*4882a593Smuzhiyun bus-width = <8>; 475*4882a593Smuzhiyun cap-mmc-highspeed; 476*4882a593Smuzhiyun supports-emmc; 477*4882a593Smuzhiyun disable-wp; 478*4882a593Smuzhiyun non-removable; 479*4882a593Smuzhiyun num-slots = <1>; 480*4882a593Smuzhiyun status = "okay"; 481*4882a593Smuzhiyun}; 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun&gpu { 484*4882a593Smuzhiyun status = "okay"; 485*4882a593Smuzhiyun mali-supply = <&vdd_log>; 486*4882a593Smuzhiyun}; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun&hevc { 489*4882a593Smuzhiyun status = "okay"; 490*4882a593Smuzhiyun}; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun&hevc_mmu { 493*4882a593Smuzhiyun status = "okay"; 494*4882a593Smuzhiyun}; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun&i2c2 { 497*4882a593Smuzhiyun status = "okay"; 498*4882a593Smuzhiyun clock-frequency = <400000>; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun gc0312@21 { 501*4882a593Smuzhiyun status = "disabled"; 502*4882a593Smuzhiyun compatible = "galaxycore,gc0312"; 503*4882a593Smuzhiyun reg = <0x21>; 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun clocks = <&cru SCLK_CIF_OUT>; 506*4882a593Smuzhiyun clock-names = "xvclk"; 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun avdd-supply = <&vcc28_cif>; 509*4882a593Smuzhiyun dovdd-supply = <&vcc18_cif>; 510*4882a593Smuzhiyun dvdd-supply = <&vcc18_cif>; 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>; 513*4882a593Smuzhiyun port { 514*4882a593Smuzhiyun gc0312_out: endpoint { 515*4882a593Smuzhiyun remote-endpoint = <&cif_in_fcam>; 516*4882a593Smuzhiyun }; 517*4882a593Smuzhiyun }; 518*4882a593Smuzhiyun }; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun gc2145@3c { 521*4882a593Smuzhiyun status = "okay"; 522*4882a593Smuzhiyun compatible = "galaxycore,gc2145"; 523*4882a593Smuzhiyun reg = <0x3c>; 524*4882a593Smuzhiyun 525*4882a593Smuzhiyun clocks = <&cru SCLK_CIF_OUT>; 526*4882a593Smuzhiyun clock-names = "xvclk"; 527*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun avdd-supply = <&vcc28_cif>; 530*4882a593Smuzhiyun dovdd-supply = <&vcc18_cif>; 531*4882a593Smuzhiyun dvdd-supply = <&vcc18_cif>; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 534*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 535*4882a593Smuzhiyun rockchip,camera-module-name = "CameraKing"; 536*4882a593Smuzhiyun rockchip,camera-module-lens-name = "Largan"; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun port { 539*4882a593Smuzhiyun gc2145_out: endpoint { 540*4882a593Smuzhiyun remote-endpoint = <&cif_in_bcam>; 541*4882a593Smuzhiyun }; 542*4882a593Smuzhiyun }; 543*4882a593Smuzhiyun }; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun gt1x: gt1x@14 { 546*4882a593Smuzhiyun compatible = "goodix,gt1x"; 547*4882a593Smuzhiyun reg = <0x14>; 548*4882a593Smuzhiyun power-supply = <&ldo6>; 549*4882a593Smuzhiyun power-invert = <1>; 550*4882a593Smuzhiyun goodix,irq-gpio = <&gpio0 RK_PA0 IRQ_TYPE_LEVEL_LOW>; 551*4882a593Smuzhiyun status = "okay"; 552*4882a593Smuzhiyun }; 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun sensor7660@4c { 555*4882a593Smuzhiyun status = "okay"; 556*4882a593Smuzhiyun compatible = "gs_mma7660"; 557*4882a593Smuzhiyun reg = <0x4c>; 558*4882a593Smuzhiyun type = <SENSOR_TYPE_ACCEL>; 559*4882a593Smuzhiyun irq_enable = <0>; 560*4882a593Smuzhiyun poll_delay_ms = <30>; 561*4882a593Smuzhiyun layout = <8>; 562*4882a593Smuzhiyun reprobe_en = <1>; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun rk816: pmic@1a { 566*4882a593Smuzhiyun compatible = "rockchip,rk816"; 567*4882a593Smuzhiyun reg = <0x1a>; 568*4882a593Smuzhiyun status = "okay"; 569*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 570*4882a593Smuzhiyun interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 571*4882a593Smuzhiyun pinctrl-names = "default"; 572*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 573*4882a593Smuzhiyun rockchip,system-power-controller; 574*4882a593Smuzhiyun wakeup-source; 575*4882a593Smuzhiyun gpio-controller; 576*4882a593Smuzhiyun #gpio-cells = <2>; 577*4882a593Smuzhiyun #clock-cells = <1>; 578*4882a593Smuzhiyun clock-output-names = "rk816-clkout1", "rk816-clkout2"; 579*4882a593Smuzhiyun extcon = <&u2phy>; 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 582*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 583*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 584*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 585*4882a593Smuzhiyun vcc5-supply = <&vcc_io>; 586*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 587*4882a593Smuzhiyun 588*4882a593Smuzhiyun gpio { 589*4882a593Smuzhiyun status = "okay"; 590*4882a593Smuzhiyun }; 591*4882a593Smuzhiyun 592*4882a593Smuzhiyun pwrkey { 593*4882a593Smuzhiyun status = "okay"; 594*4882a593Smuzhiyun }; 595*4882a593Smuzhiyun 596*4882a593Smuzhiyun rtc { 597*4882a593Smuzhiyun status = "okay"; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun battery { 601*4882a593Smuzhiyun compatible = "rk816-battery"; 602*4882a593Smuzhiyun ocv_table = < 3500 3625 3685 3697 3718 3735 3748 603*4882a593Smuzhiyun 3760 3774 3788 3802 3816 3834 3853 604*4882a593Smuzhiyun 3877 3908 3946 3975 4018 4071 4106>; 605*4882a593Smuzhiyun design_capacity = <2500>; 606*4882a593Smuzhiyun design_qmax = <2750>; 607*4882a593Smuzhiyun bat_res = <100>; 608*4882a593Smuzhiyun max_input_current = <1500>; 609*4882a593Smuzhiyun max_chrg_current = <1300>; 610*4882a593Smuzhiyun max_chrg_voltage = <4200>; 611*4882a593Smuzhiyun sleep_enter_current = <300>; 612*4882a593Smuzhiyun sleep_exit_current = <300>; 613*4882a593Smuzhiyun sleep_filter_current = <100>; 614*4882a593Smuzhiyun power_off_thresd = <3500>; 615*4882a593Smuzhiyun zero_algorithm_vol = <3850>; 616*4882a593Smuzhiyun max_soc_offset = <60>; 617*4882a593Smuzhiyun monitor_sec = <5>; 618*4882a593Smuzhiyun virtual_power = <0>; 619*4882a593Smuzhiyun power_dc2otg = <0>; 620*4882a593Smuzhiyun dc_det_adc = <0>; 621*4882a593Smuzhiyun }; 622*4882a593Smuzhiyun 623*4882a593Smuzhiyun regulators { 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun vdd_arm: DCDC_REG1{ 626*4882a593Smuzhiyun regulator-name= "vdd_arm"; 627*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 628*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 629*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 630*4882a593Smuzhiyun regulator-initial-mode = <1>; 631*4882a593Smuzhiyun regulator-always-on; 632*4882a593Smuzhiyun regulator-boot-on; 633*4882a593Smuzhiyun regulator-state-mem { 634*4882a593Smuzhiyun regulator-off-in-suspend; 635*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 636*4882a593Smuzhiyun }; 637*4882a593Smuzhiyun }; 638*4882a593Smuzhiyun 639*4882a593Smuzhiyun vdd_log: DCDC_REG2 { 640*4882a593Smuzhiyun regulator-name= "vdd_logic"; 641*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 642*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 643*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 644*4882a593Smuzhiyun regulator-initial-mode = <1>; 645*4882a593Smuzhiyun regulator-always-on; 646*4882a593Smuzhiyun regulator-boot-on; 647*4882a593Smuzhiyun regulator-state-mem { 648*4882a593Smuzhiyun regulator-on-in-suspend; 649*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 650*4882a593Smuzhiyun }; 651*4882a593Smuzhiyun }; 652*4882a593Smuzhiyun 653*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 654*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 655*4882a593Smuzhiyun regulator-always-on; 656*4882a593Smuzhiyun regulator-boot-on; 657*4882a593Smuzhiyun regulator-initial-mode = <1>; 658*4882a593Smuzhiyun }; 659*4882a593Smuzhiyun 660*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 661*4882a593Smuzhiyun regulator-name = "vcc_io"; 662*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 663*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 664*4882a593Smuzhiyun regulator-initial-mode = <1>; 665*4882a593Smuzhiyun regulator-always-on; 666*4882a593Smuzhiyun regulator-boot-on; 667*4882a593Smuzhiyun regulator-state-mem { 668*4882a593Smuzhiyun regulator-on-in-suspend; 669*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 670*4882a593Smuzhiyun }; 671*4882a593Smuzhiyun }; 672*4882a593Smuzhiyun 673*4882a593Smuzhiyun vcc28_cif: LDO_REG1 { 674*4882a593Smuzhiyun regulator-name = "vcc28_cif"; 675*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 676*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 677*4882a593Smuzhiyun regulator-always-on; 678*4882a593Smuzhiyun regulator-boot-on; 679*4882a593Smuzhiyun regulator-state-mem { 680*4882a593Smuzhiyun regulator-off-in-suspend; 681*4882a593Smuzhiyun }; 682*4882a593Smuzhiyun }; 683*4882a593Smuzhiyun 684*4882a593Smuzhiyun vcc18_cif: LDO_REG2 { 685*4882a593Smuzhiyun regulator-name = "vcc18_cif"; 686*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 687*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 688*4882a593Smuzhiyun regulator-always-on; 689*4882a593Smuzhiyun regulator-boot-on; 690*4882a593Smuzhiyun regulator-state-mem { 691*4882a593Smuzhiyun regulator-off-in-suspend; 692*4882a593Smuzhiyun }; 693*4882a593Smuzhiyun }; 694*4882a593Smuzhiyun 695*4882a593Smuzhiyun vdd_11: LDO_REG3 { 696*4882a593Smuzhiyun regulator-name = "vdd_11"; 697*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 698*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 699*4882a593Smuzhiyun regulator-always-on; 700*4882a593Smuzhiyun regulator-boot-on; 701*4882a593Smuzhiyun regulator-state-mem { 702*4882a593Smuzhiyun regulator-on-in-suspend; 703*4882a593Smuzhiyun regulator-suspend-microvolt = <1100000>; 704*4882a593Smuzhiyun }; 705*4882a593Smuzhiyun }; 706*4882a593Smuzhiyun 707*4882a593Smuzhiyun ldo4: LDO_REG4 { 708*4882a593Smuzhiyun regulator-name= "ldo4"; 709*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 710*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 711*4882a593Smuzhiyun regulator-always-on; 712*4882a593Smuzhiyun regulator-boot-on; 713*4882a593Smuzhiyun regulator-state-mem { 714*4882a593Smuzhiyun regulator-off-in-suspend; 715*4882a593Smuzhiyun }; 716*4882a593Smuzhiyun }; 717*4882a593Smuzhiyun 718*4882a593Smuzhiyun ldo5: LDO_REG5 { 719*4882a593Smuzhiyun regulator-name= "ldo5"; 720*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 721*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 722*4882a593Smuzhiyun regulator-boot-on; 723*4882a593Smuzhiyun regulator-state-mem { 724*4882a593Smuzhiyun regulator-off-in-suspend; 725*4882a593Smuzhiyun }; 726*4882a593Smuzhiyun }; 727*4882a593Smuzhiyun 728*4882a593Smuzhiyun ldo6: LDO_REG6 { 729*4882a593Smuzhiyun regulator-name= "ldo6"; 730*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 731*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 732*4882a593Smuzhiyun regulator-state-mem { 733*4882a593Smuzhiyun regulator-off-in-suspend; 734*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 735*4882a593Smuzhiyun }; 736*4882a593Smuzhiyun }; 737*4882a593Smuzhiyun }; 738*4882a593Smuzhiyun }; 739*4882a593Smuzhiyun}; 740*4882a593Smuzhiyun 741*4882a593Smuzhiyun&i2s_2ch { 742*4882a593Smuzhiyun #sound-dai-cells = <0>; 743*4882a593Smuzhiyun status = "okay"; 744*4882a593Smuzhiyun}; 745*4882a593Smuzhiyun 746*4882a593Smuzhiyun&iep { 747*4882a593Smuzhiyun status = "okay"; 748*4882a593Smuzhiyun}; 749*4882a593Smuzhiyun 750*4882a593Smuzhiyun&iep_mmu { 751*4882a593Smuzhiyun status = "okay"; 752*4882a593Smuzhiyun}; 753*4882a593Smuzhiyun 754*4882a593Smuzhiyun&mpp_srv { 755*4882a593Smuzhiyun status = "okay"; 756*4882a593Smuzhiyun}; 757*4882a593Smuzhiyun 758*4882a593Smuzhiyun&nandc { 759*4882a593Smuzhiyun status = "okay"; 760*4882a593Smuzhiyun}; 761*4882a593Smuzhiyun 762*4882a593Smuzhiyun&pinctrl { 763*4882a593Smuzhiyun pmic { 764*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 765*4882a593Smuzhiyun rockchip,pins = 766*4882a593Smuzhiyun <0 RK_PA2 0 &pcfg_pull_default>; 767*4882a593Smuzhiyun }; 768*4882a593Smuzhiyun }; 769*4882a593Smuzhiyun 770*4882a593Smuzhiyun usb2 { 771*4882a593Smuzhiyun usb_hub_h: usb-hub-h { 772*4882a593Smuzhiyun rockchip,pins = 773*4882a593Smuzhiyun <0 RK_PA1 0 &pcfg_pull_none>; 774*4882a593Smuzhiyun }; 775*4882a593Smuzhiyun }; 776*4882a593Smuzhiyun}; 777*4882a593Smuzhiyun 778*4882a593Smuzhiyun&pwm0 { 779*4882a593Smuzhiyun status = "okay"; 780*4882a593Smuzhiyun}; 781*4882a593Smuzhiyun 782*4882a593Smuzhiyun&pwm1 { 783*4882a593Smuzhiyun status = "okay"; 784*4882a593Smuzhiyun}; 785*4882a593Smuzhiyun 786*4882a593Smuzhiyun&rga { 787*4882a593Smuzhiyun status = "okay"; 788*4882a593Smuzhiyun}; 789*4882a593Smuzhiyun 790*4882a593Smuzhiyun&route_dsi{ 791*4882a593Smuzhiyun status = "okay"; 792*4882a593Smuzhiyun}; 793*4882a593Smuzhiyun 794*4882a593Smuzhiyun&saradc { 795*4882a593Smuzhiyun status = "okay"; 796*4882a593Smuzhiyun vref-supply = <&vccadc_ref>; 797*4882a593Smuzhiyun}; 798*4882a593Smuzhiyun 799*4882a593Smuzhiyun&sdio { 800*4882a593Smuzhiyun bus-width = <4>; 801*4882a593Smuzhiyun max-frequency = <50000000>; 802*4882a593Smuzhiyun cap-sd-highspeed; 803*4882a593Smuzhiyun supports-sdio; 804*4882a593Smuzhiyun ignore-pm-notify; 805*4882a593Smuzhiyun keep-power-in-suspend; 806*4882a593Smuzhiyun supports-rk912; 807*4882a593Smuzhiyun /delete-property/ non-removable; 808*4882a593Smuzhiyun status = "okay"; 809*4882a593Smuzhiyun}; 810*4882a593Smuzhiyun 811*4882a593Smuzhiyun&sdmmc { 812*4882a593Smuzhiyun cap-mmc-highspeed; 813*4882a593Smuzhiyun supports-sd; 814*4882a593Smuzhiyun card-detect-delay = <800>; 815*4882a593Smuzhiyun ignore-pm-notify; 816*4882a593Smuzhiyun keep-power-in-suspend; 817*4882a593Smuzhiyun cd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* CD GPIO */ 818*4882a593Smuzhiyun status = "disabled"; 819*4882a593Smuzhiyun}; 820*4882a593Smuzhiyun 821*4882a593Smuzhiyun&tsadc { 822*4882a593Smuzhiyun status = "okay"; 823*4882a593Smuzhiyun}; 824*4882a593Smuzhiyun 825*4882a593Smuzhiyun&u2phy { 826*4882a593Smuzhiyun status = "okay"; 827*4882a593Smuzhiyun 828*4882a593Smuzhiyun u2phy_otg: otg-port { 829*4882a593Smuzhiyun status = "okay"; 830*4882a593Smuzhiyun }; 831*4882a593Smuzhiyun 832*4882a593Smuzhiyun u2phy_host: host-port { 833*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 834*4882a593Smuzhiyun status = "okay"; 835*4882a593Smuzhiyun }; 836*4882a593Smuzhiyun}; 837*4882a593Smuzhiyun 838*4882a593Smuzhiyun&uart1 { 839*4882a593Smuzhiyun pinctrl-names = "default"; 840*4882a593Smuzhiyun pinctrl-0 = <&uart1_xfer>; 841*4882a593Smuzhiyun status = "okay"; 842*4882a593Smuzhiyun}; 843*4882a593Smuzhiyun 844*4882a593Smuzhiyun&usb_host_ehci { 845*4882a593Smuzhiyun status = "okay"; 846*4882a593Smuzhiyun}; 847*4882a593Smuzhiyun 848*4882a593Smuzhiyun&usb_host_ohci { 849*4882a593Smuzhiyun status = "okay"; 850*4882a593Smuzhiyun}; 851*4882a593Smuzhiyun 852*4882a593Smuzhiyun&usb_otg { 853*4882a593Smuzhiyun status = "okay"; 854*4882a593Smuzhiyun}; 855*4882a593Smuzhiyun 856*4882a593Smuzhiyun&vdpu { 857*4882a593Smuzhiyun status = "okay"; 858*4882a593Smuzhiyun}; 859*4882a593Smuzhiyun 860*4882a593Smuzhiyun&vepu { 861*4882a593Smuzhiyun status = "okay"; 862*4882a593Smuzhiyun}; 863*4882a593Smuzhiyun 864*4882a593Smuzhiyun&video_phy { 865*4882a593Smuzhiyun status = "okay"; 866*4882a593Smuzhiyun}; 867*4882a593Smuzhiyun 868*4882a593Smuzhiyun&vop { 869*4882a593Smuzhiyun status = "okay"; 870*4882a593Smuzhiyun}; 871*4882a593Smuzhiyun 872*4882a593Smuzhiyun&vop_mmu { 873*4882a593Smuzhiyun status = "okay"; 874*4882a593Smuzhiyun}; 875*4882a593Smuzhiyun 876*4882a593Smuzhiyun&vpu_mmu { 877*4882a593Smuzhiyun status = "okay"; 878*4882a593Smuzhiyun}; 879