1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun#include "rk3126c-evb-ddr3-v10-linux.dts" 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun chosen { 9*4882a593Smuzhiyun bootargs = "earlycon=uart8250,mmio32,0x20068000 console=ttyFIQ0 ubi.mtd=7 root=ubi0:rootfs rootfstype=ubifs"; 10*4882a593Smuzhiyun }; 11*4882a593Smuzhiyun}; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun&emmc { 14*4882a593Smuzhiyun status = "disabled"; 15*4882a593Smuzhiyun}; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun&nandc { 18*4882a593Smuzhiyun status = "okay"; 19*4882a593Smuzhiyun #address-cells = <1>; 20*4882a593Smuzhiyun #size-cells = <0>; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_NANDC>; 23*4882a593Smuzhiyun assigned-clock-rates = <120000000>; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun nand@0 { 26*4882a593Smuzhiyun reg = <0>; 27*4882a593Smuzhiyun nand-bus-width = <8>; 28*4882a593Smuzhiyun nand-ecc-mode = "hw"; 29*4882a593Smuzhiyun nand-ecc-strength = <16>; 30*4882a593Smuzhiyun nand-ecc-step-size = <1024>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun}; 33