xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk3126-m88.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
8*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
10*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
11*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
12*4882a593Smuzhiyun#include "rk3126.dtsi"
13*4882a593Smuzhiyun#include "rk312x-android.dtsi"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/ {
16*4882a593Smuzhiyun	model = "Rockchip RK3126 m88 board";
17*4882a593Smuzhiyun	compatible = "rockchip,rk3126-m88", "rockchip,rk3126";
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	adc-keys {
20*4882a593Smuzhiyun		compatible = "adc-keys";
21*4882a593Smuzhiyun		io-channels = <&saradc 2>;
22*4882a593Smuzhiyun		io-channel-names = "buttons";
23*4882a593Smuzhiyun		poll-interval = <100>;
24*4882a593Smuzhiyun		keyup-threshold-microvolt = <2429000>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		button-up {
27*4882a593Smuzhiyun			label = "Volume Up";
28*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
29*4882a593Smuzhiyun			press-threshold-microvolt = <0>;
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		button-down {
33*4882a593Smuzhiyun			label = "Volume Down";
34*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
35*4882a593Smuzhiyun			press-threshold-microvolt = <1650000>;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	backlight: backlight {
40*4882a593Smuzhiyun		compatible = "pwm-backlight";
41*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 0>;
42*4882a593Smuzhiyun		brightness-levels = <
43*4882a593Smuzhiyun			0 1 2 3 4 5 6 7 8 9 10
44*4882a593Smuzhiyun			11 12 13 14 15 16 17 18 19 20
45*4882a593Smuzhiyun			21 22 23 24 25 26 27 28 29 30
46*4882a593Smuzhiyun			31 32 33 34 35 36 37 38 39 40
47*4882a593Smuzhiyun			41 42 43 44 45 46 47 48 49 50
48*4882a593Smuzhiyun			51 52 53 54 55 56 57 58 59 60
49*4882a593Smuzhiyun			61 62 63 64 65 66 67 68 69 70
50*4882a593Smuzhiyun			71 72 73 74 75 76 77 78 79 80
51*4882a593Smuzhiyun			81 82 83 84 85 86 87 88 89 90
52*4882a593Smuzhiyun			91 92 93 94 95 96 97 98 99 100
53*4882a593Smuzhiyun			101 102 103 104 105 106 107 108
54*4882a593Smuzhiyun			109 110 111 112 113 114 115 116
55*4882a593Smuzhiyun			117 118 119 120 121 122 123 124
56*4882a593Smuzhiyun			125 126 127 128 129 130 131 132
57*4882a593Smuzhiyun			133 134 135 136 137 138 139 140
58*4882a593Smuzhiyun			141 142 143 144 145 146 147 148
59*4882a593Smuzhiyun			149 150 151 152 153 154 155 156
60*4882a593Smuzhiyun			157 158 159 160 161 162 163 164
61*4882a593Smuzhiyun			165 166 167 169 169 170 171 172
62*4882a593Smuzhiyun			173 174 175 176 177 178 179 180
63*4882a593Smuzhiyun			181 182 183 184 185 186 187 188
64*4882a593Smuzhiyun			189 190 191 192 193 194 195 196
65*4882a593Smuzhiyun			197 198 199 200 201 202 203 204
66*4882a593Smuzhiyun			205 208 208 208 209 210 211 212
67*4882a593Smuzhiyun			213 214 215 216 217 218 219 220
68*4882a593Smuzhiyun			221 222 223 224 225 226 227 228
69*4882a593Smuzhiyun			229 230 231 232 233 234 235 236
70*4882a593Smuzhiyun			237 238 239 240 241 242	243 244
71*4882a593Smuzhiyun			245 246 247 248 249 250 251 252
72*4882a593Smuzhiyun			253 254 255>;
73*4882a593Smuzhiyun		default-brightness-level = <128>;
74*4882a593Smuzhiyun	};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun	charge-animation {
77*4882a593Smuzhiyun		compatible = "rockchip,uboot-charge";
78*4882a593Smuzhiyun		rockchip,uboot-charge-on = <1>;
79*4882a593Smuzhiyun		rockchip,android-charge-on = <0>;
80*4882a593Smuzhiyun		rockchip,uboot-low-power-voltage = <3500>;
81*4882a593Smuzhiyun		rockchip,screen-on-voltage = <3600>;
82*4882a593Smuzhiyun		status = "okay";
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	panel {
86*4882a593Smuzhiyun		compatible = "simple-panel";
87*4882a593Smuzhiyun		backlight = <&backlight>;
88*4882a593Smuzhiyun		power-supply = <&ldo6>;
89*4882a593Smuzhiyun		power-invert;
90*4882a593Smuzhiyun		enable-delay-ms = <120>;
91*4882a593Smuzhiyun		disable-delay-ms = <20>;
92*4882a593Smuzhiyun		unprepare-delay-ms = <20>;
93*4882a593Smuzhiyun		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		width-mm = <153>;
96*4882a593Smuzhiyun		height-mm = <85>;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun		display-timings {
99*4882a593Smuzhiyun			native-mode = <&timing0>;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun			timing0: timing0 {
102*4882a593Smuzhiyun				clock-frequency = <51200000>;
103*4882a593Smuzhiyun				hactive = <1024>;
104*4882a593Smuzhiyun				vactive = <600>;
105*4882a593Smuzhiyun				hback-porch = <100>;
106*4882a593Smuzhiyun				hfront-porch = <120>;
107*4882a593Smuzhiyun				vback-porch = <10>;
108*4882a593Smuzhiyun				vfront-porch = <15>;
109*4882a593Smuzhiyun				hsync-len = <100>;
110*4882a593Smuzhiyun				vsync-len = <10>;
111*4882a593Smuzhiyun				hsync-active = <0>;
112*4882a593Smuzhiyun				vsync-active = <0>;
113*4882a593Smuzhiyun				de-active = <0>;
114*4882a593Smuzhiyun				pixelclk-active = <0>;
115*4882a593Smuzhiyun			};
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		port {
119*4882a593Smuzhiyun			panel_in_rgb: endpoint {
120*4882a593Smuzhiyun				remote-endpoint = <&rgb_out_panel>;
121*4882a593Smuzhiyun			};
122*4882a593Smuzhiyun		};
123*4882a593Smuzhiyun	};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun	rockchip_headset {
126*4882a593Smuzhiyun		compatible = "rockchip_headset";
127*4882a593Smuzhiyun		io-channels = <&saradc 2>;
128*4882a593Smuzhiyun	};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun	sound {
131*4882a593Smuzhiyun		compatible = "simple-audio-card";
132*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
133*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
134*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,rk312x";
135*4882a593Smuzhiyun		simple-audio-card,cpu {
136*4882a593Smuzhiyun			sound-dai = <&i2s_2ch>;
137*4882a593Smuzhiyun		};
138*4882a593Smuzhiyun		simple-audio-card,codec {
139*4882a593Smuzhiyun			sound-dai = <&codec>;
140*4882a593Smuzhiyun		};
141*4882a593Smuzhiyun	};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun	vccadc_ref: vccadc-ref {
144*4882a593Smuzhiyun		compatible = "regulator-fixed";
145*4882a593Smuzhiyun		regulator-name = "SARADC_AVDD33";
146*4882a593Smuzhiyun		regulator-always-on;
147*4882a593Smuzhiyun		regulator-boot-on;
148*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
149*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun	vcc_sys: vcc-sys {
153*4882a593Smuzhiyun		compatible = "regulator-fixed";
154*4882a593Smuzhiyun		regulator-name = "vcc_sys";
155*4882a593Smuzhiyun		regulator-min-microvolt = <4000000>;
156*4882a593Smuzhiyun		regulator-max-microvolt = <4000000>;
157*4882a593Smuzhiyun		regulator-always-on;
158*4882a593Smuzhiyun	};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun	xin32k: xin32k {
161*4882a593Smuzhiyun		compatible = "fixed-clock";
162*4882a593Smuzhiyun		clock-frequency = <32768>;
163*4882a593Smuzhiyun		clock-output-names = "xin32k";
164*4882a593Smuzhiyun		#clock-cells = <0>;
165*4882a593Smuzhiyun	};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun	wireless-bluetooth {
168*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
169*4882a593Smuzhiyun		/* wifi-bt-power-toggle; */
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun		keep_wifi_power_on = <1>;
172*4882a593Smuzhiyun		uart_rts_gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO1_B3 */
173*4882a593Smuzhiyun		pinctrl-names = "default","rts_gpio";
174*4882a593Smuzhiyun		pinctrl-0 = <&uart1_rts>;
175*4882a593Smuzhiyun		pinctrl-1 = <&uart1_rts_gpio>;
176*4882a593Smuzhiyun		BT,reset_gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* GPIO2_B1 */
177*4882a593Smuzhiyun		BT,wake_gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; /* GPIO0_D3 */
178*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio2 21 GPIO_ACTIVE_LOW>; /* GPIO2_C5 */
179*4882a593Smuzhiyun		status = "okay";
180*4882a593Smuzhiyun	};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun	wireless-wlan {
183*4882a593Smuzhiyun		compatible = "wlan-platdata";
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun		wifi_chip_type = "rtl8723cs";
186*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
187*4882a593Smuzhiyun		status = "okay";
188*4882a593Smuzhiyun	};
189*4882a593Smuzhiyun};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun&codec {
192*4882a593Smuzhiyun	#sound-dai-cells = <0>;
193*4882a593Smuzhiyun	spk-ctl-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
194*4882a593Smuzhiyun	spk-mute-delay = <200>;
195*4882a593Smuzhiyun	hp-mute-delay = <100>;
196*4882a593Smuzhiyun	is_rk3128 = <0>;
197*4882a593Smuzhiyun	spk_volume = <25>;
198*4882a593Smuzhiyun	hp_volume = <25>;
199*4882a593Smuzhiyun	capture_volume = <26>;
200*4882a593Smuzhiyun	gpio_debug = <1>;
201*4882a593Smuzhiyun	codec_hp_det = <0>;
202*4882a593Smuzhiyun	status = "okay";
203*4882a593Smuzhiyun};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun&cif_new {
206*4882a593Smuzhiyun	status = "okay";
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun	ports {
209*4882a593Smuzhiyun		port@0 {
210*4882a593Smuzhiyun			cif_in_fcam: endpoint@0 {
211*4882a593Smuzhiyun				remote-endpoint =  <&gc0312_out>;
212*4882a593Smuzhiyun				vsync-active = <0>;
213*4882a593Smuzhiyun				hsync-active = <1>;
214*4882a593Smuzhiyun			};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun			cif_in_bcam: endpoint@1 {
217*4882a593Smuzhiyun				remote-endpoint = <&gc2035_out>;
218*4882a593Smuzhiyun				vsync-active = <1>;
219*4882a593Smuzhiyun				hsync-active = <1>;
220*4882a593Smuzhiyun			};
221*4882a593Smuzhiyun		};
222*4882a593Smuzhiyun	};
223*4882a593Smuzhiyun};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun&cpu0 {
226*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
227*4882a593Smuzhiyun};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun&dmc {
230*4882a593Smuzhiyun	center-supply = <&vdd_log>;
231*4882a593Smuzhiyun};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun&emmc {
234*4882a593Smuzhiyun	bus-width = <8>;
235*4882a593Smuzhiyun	cap-mmc-highspeed;
236*4882a593Smuzhiyun	no-sdio;
237*4882a593Smuzhiyun	no-sd;
238*4882a593Smuzhiyun	mmc-ddr-1_8v;
239*4882a593Smuzhiyun	disable-wp;
240*4882a593Smuzhiyun	non-removable;
241*4882a593Smuzhiyun	num-slots = <1>;
242*4882a593Smuzhiyun	status = "okay";
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&gpu {
246*4882a593Smuzhiyun	status = "okay";
247*4882a593Smuzhiyun	mali-supply = <&vdd_log>;
248*4882a593Smuzhiyun};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun&i2c0 {
251*4882a593Smuzhiyun	status = "okay";
252*4882a593Smuzhiyun	clock-frequency = <400000>;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun	rk816: pmic@1a {
255*4882a593Smuzhiyun		compatible = "rockchip,rk816";
256*4882a593Smuzhiyun		reg = <0x1a>;
257*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
258*4882a593Smuzhiyun		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
259*4882a593Smuzhiyun		pinctrl-names = "default";
260*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
261*4882a593Smuzhiyun		rockchip,system-power-controller;
262*4882a593Smuzhiyun		wakeup-source;
263*4882a593Smuzhiyun		gpio-controller;
264*4882a593Smuzhiyun		#gpio-cells = <2>;
265*4882a593Smuzhiyun		#clock-cells = <1>;
266*4882a593Smuzhiyun		clock-output-names = "rk816-clkout1", "rk816-clkout2";
267*4882a593Smuzhiyun		extcon = <&u2phy>;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
270*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
271*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
272*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
273*4882a593Smuzhiyun		vcc5-supply = <&vcc_io>;
274*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun		gpio {
277*4882a593Smuzhiyun			status = "okay";
278*4882a593Smuzhiyun		};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun		pwrkey {
281*4882a593Smuzhiyun			status = "okay";
282*4882a593Smuzhiyun		};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun		rtc {
285*4882a593Smuzhiyun			status = "okay";
286*4882a593Smuzhiyun		};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun		battery {
289*4882a593Smuzhiyun			compatible = "rk816-battery";
290*4882a593Smuzhiyun			ocv_table = < 3500 3625 3685 3697 3718 3735 3748
291*4882a593Smuzhiyun					3760 3774 3788 3802 3816 3834 3853
292*4882a593Smuzhiyun					3877 3908 3946 3975 4018 4071 4106>;
293*4882a593Smuzhiyun			design_capacity = <2500>;
294*4882a593Smuzhiyun			design_qmax = <2750>;
295*4882a593Smuzhiyun			bat_res = <100>;
296*4882a593Smuzhiyun			max_input_current = <1500>;
297*4882a593Smuzhiyun			max_chrg_current = <1300>;
298*4882a593Smuzhiyun			max_chrg_voltage = <4200>;
299*4882a593Smuzhiyun			sleep_enter_current = <300>;
300*4882a593Smuzhiyun			sleep_exit_current = <300>;
301*4882a593Smuzhiyun			sleep_filter_current = <100>;
302*4882a593Smuzhiyun			power_off_thresd = <3500>;
303*4882a593Smuzhiyun			zero_algorithm_vol = <3850>;
304*4882a593Smuzhiyun			max_soc_offset = <60>;
305*4882a593Smuzhiyun			monitor_sec = <5>;
306*4882a593Smuzhiyun			virtual_power = <0>;
307*4882a593Smuzhiyun			power_dc2otg = <0>;
308*4882a593Smuzhiyun			dc_det_adc = <0>;
309*4882a593Smuzhiyun		};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun		regulators {
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun			vdd_arm: DCDC_REG1{
314*4882a593Smuzhiyun				regulator-name= "vdd_arm";
315*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
316*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
317*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
318*4882a593Smuzhiyun				regulator-initial-mode = <1>;
319*4882a593Smuzhiyun				regulator-always-on;
320*4882a593Smuzhiyun				regulator-boot-on;
321*4882a593Smuzhiyun				regulator-state-mem {
322*4882a593Smuzhiyun					regulator-off-in-suspend;
323*4882a593Smuzhiyun					regulator-suspend-microvolt = <900000>;
324*4882a593Smuzhiyun				};
325*4882a593Smuzhiyun			};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun			vdd_log: DCDC_REG2 {
328*4882a593Smuzhiyun				regulator-name= "vdd_logic";
329*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
330*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
331*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
332*4882a593Smuzhiyun				regulator-initial-mode = <1>;
333*4882a593Smuzhiyun				regulator-always-on;
334*4882a593Smuzhiyun				regulator-boot-on;
335*4882a593Smuzhiyun				regulator-state-mem {
336*4882a593Smuzhiyun					regulator-on-in-suspend;
337*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
338*4882a593Smuzhiyun				};
339*4882a593Smuzhiyun			};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
342*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
343*4882a593Smuzhiyun				regulator-always-on;
344*4882a593Smuzhiyun				regulator-boot-on;
345*4882a593Smuzhiyun			};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
348*4882a593Smuzhiyun				regulator-name = "vcc_io";
349*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
350*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
351*4882a593Smuzhiyun				regulator-initial-mode = <1>;
352*4882a593Smuzhiyun				regulator-always-on;
353*4882a593Smuzhiyun				regulator-boot-on;
354*4882a593Smuzhiyun				regulator-state-mem {
355*4882a593Smuzhiyun					regulator-on-in-suspend;
356*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
357*4882a593Smuzhiyun				};
358*4882a593Smuzhiyun			};
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun			vcc28_cif: LDO_REG1 {
361*4882a593Smuzhiyun				regulator-name = "vcc28_cif";
362*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
363*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
364*4882a593Smuzhiyun				regulator-always-on;
365*4882a593Smuzhiyun				regulator-boot-on;
366*4882a593Smuzhiyun				regulator-state-mem {
367*4882a593Smuzhiyun					regulator-off-in-suspend;
368*4882a593Smuzhiyun				};
369*4882a593Smuzhiyun			};
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun			vcc18_cif: LDO_REG2 {
372*4882a593Smuzhiyun				regulator-name = "vcc18_cif";
373*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
374*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
375*4882a593Smuzhiyun				regulator-always-on;
376*4882a593Smuzhiyun				regulator-boot-on;
377*4882a593Smuzhiyun				regulator-state-mem {
378*4882a593Smuzhiyun					regulator-off-in-suspend;
379*4882a593Smuzhiyun				};
380*4882a593Smuzhiyun			};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun			vdd_11: LDO_REG3 {
383*4882a593Smuzhiyun				regulator-name = "vdd_11";
384*4882a593Smuzhiyun				regulator-min-microvolt = <1100000>;
385*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
386*4882a593Smuzhiyun				regulator-always-on;
387*4882a593Smuzhiyun				regulator-boot-on;
388*4882a593Smuzhiyun				regulator-state-mem {
389*4882a593Smuzhiyun					regulator-on-in-suspend;
390*4882a593Smuzhiyun					regulator-suspend-microvolt = <1100000>;
391*4882a593Smuzhiyun				};
392*4882a593Smuzhiyun			};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun			ldo4: LDO_REG4 {
395*4882a593Smuzhiyun				regulator-name= "ldo4";
396*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
397*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
398*4882a593Smuzhiyun				regulator-always-on;
399*4882a593Smuzhiyun				regulator-boot-on;
400*4882a593Smuzhiyun				regulator-state-mem {
401*4882a593Smuzhiyun					regulator-off-in-suspend;
402*4882a593Smuzhiyun				};
403*4882a593Smuzhiyun			};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun			ldo5: LDO_REG5 {
406*4882a593Smuzhiyun				regulator-name= "ldo5";
407*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
408*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
409*4882a593Smuzhiyun				regulator-always-on;
410*4882a593Smuzhiyun				regulator-boot-on;
411*4882a593Smuzhiyun				regulator-state-mem {
412*4882a593Smuzhiyun					regulator-on-in-suspend;
413*4882a593Smuzhiyun				};
414*4882a593Smuzhiyun			};
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun			ldo6: LDO_REG6 {
417*4882a593Smuzhiyun				regulator-name= "ldo6";
418*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
419*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
420*4882a593Smuzhiyun				regulator-state-mem {
421*4882a593Smuzhiyun					regulator-on-in-suspend;
422*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
423*4882a593Smuzhiyun				};
424*4882a593Smuzhiyun			};
425*4882a593Smuzhiyun		};
426*4882a593Smuzhiyun	};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun	gc0312@21 {
429*4882a593Smuzhiyun		compatible = "galaxycore,gc0312";
430*4882a593Smuzhiyun		reg = <0x21>;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun		clocks = <&cru SCLK_CIF_OUT>;
433*4882a593Smuzhiyun		clock-names = "xvclk";
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun		avdd-supply = <&vcc28_cif>;
436*4882a593Smuzhiyun		dovdd-supply = <&vcc18_cif>;
437*4882a593Smuzhiyun		dvdd-supply = <&vcc18_cif>;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun		pwdn-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
440*4882a593Smuzhiyun		rockchip,camera-module-index = <1>;
441*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
442*4882a593Smuzhiyun		rockchip,camera-module-name = "default";
443*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "default";
444*4882a593Smuzhiyun		port {
445*4882a593Smuzhiyun			gc0312_out: endpoint {
446*4882a593Smuzhiyun				remote-endpoint = <&cif_in_fcam>;
447*4882a593Smuzhiyun			};
448*4882a593Smuzhiyun		};
449*4882a593Smuzhiyun	};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun	gc2035@3c {
452*4882a593Smuzhiyun		compatible = "galaxycore,gc2035";
453*4882a593Smuzhiyun		reg = <0x3c>;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun		clocks = <&cru SCLK_CIF_OUT>;
456*4882a593Smuzhiyun		clock-names = "xvclk";
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun		avdd-supply = <&vcc28_cif>;
459*4882a593Smuzhiyun		dovdd-supply = <&vcc18_cif>;
460*4882a593Smuzhiyun		dvdd-supply = <&vcc18_cif>;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun		//pwdn-gpios = <&rk816 0 GPIO_ACTIVE_HIGH>;
463*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
464*4882a593Smuzhiyun		rockchip,camera-module-facing = "back";
465*4882a593Smuzhiyun		rockchip,camera-module-name = "default";
466*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "default";
467*4882a593Smuzhiyun		port {
468*4882a593Smuzhiyun			gc2035_out: endpoint {
469*4882a593Smuzhiyun				remote-endpoint = <&cif_in_bcam>;
470*4882a593Smuzhiyun			};
471*4882a593Smuzhiyun		};
472*4882a593Smuzhiyun	};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun	sensor@4c {
475*4882a593Smuzhiyun		compatible = "gs_mc3230";
476*4882a593Smuzhiyun		reg = <0x4c>;
477*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
478*4882a593Smuzhiyun		irq_enable = <0>;
479*4882a593Smuzhiyun		poll_delay_ms = <30>;
480*4882a593Smuzhiyun		layout = <2>;
481*4882a593Smuzhiyun		reprobe_en = <1>;
482*4882a593Smuzhiyun	};
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun	ts@40 {
485*4882a593Smuzhiyun		compatible = "gslX680-d708";
486*4882a593Smuzhiyun		reg = <0x40>;
487*4882a593Smuzhiyun		touch-gpio = <&gpio2 20 IRQ_TYPE_LEVEL_LOW>;
488*4882a593Smuzhiyun		//wake-gpio = <&gpio2 12 IRQ_TYPE_LEVEL_LOW>;
489*4882a593Smuzhiyun		rst-supply = <&ldo6>;
490*4882a593Smuzhiyun		screen_max_x = <800>;
491*4882a593Smuzhiyun		screen_max_y = <480>;
492*4882a593Smuzhiyun		revert_y = <0>;
493*4882a593Smuzhiyun		status = "okay";
494*4882a593Smuzhiyun	};
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun&i2s_2ch {
499*4882a593Smuzhiyun	#sound-dai-cells = <0>;
500*4882a593Smuzhiyun	status = "okay";
501*4882a593Smuzhiyun};
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun&iep {
504*4882a593Smuzhiyun	status = "okay";
505*4882a593Smuzhiyun};
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun&iep_mmu {
508*4882a593Smuzhiyun	status = "okay";
509*4882a593Smuzhiyun};
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun&mpp_srv {
512*4882a593Smuzhiyun	status = "okay";
513*4882a593Smuzhiyun};
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun&nandc {
516*4882a593Smuzhiyun	status = "okay";
517*4882a593Smuzhiyun};
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun&pinctrl {
520*4882a593Smuzhiyun	lcdc {
521*4882a593Smuzhiyun		lcdc_rgb_pins: lcdc-rgb-pins {
522*4882a593Smuzhiyun			rockchip,pins =
523*4882a593Smuzhiyun				<2 RK_PB0 1 &pcfg_pull_none>, /* DCLK */
524*4882a593Smuzhiyun				<2 RK_PB3 1 &pcfg_pull_none>, /* DEN */
525*4882a593Smuzhiyun				<2 RK_PB4 1 &pcfg_pull_none>, /* DATA10 */
526*4882a593Smuzhiyun				<2 RK_PB5 1 &pcfg_pull_none>, /* DATA11 */
527*4882a593Smuzhiyun				<2 RK_PB6 1 &pcfg_pull_none>, /* DATA12 */
528*4882a593Smuzhiyun				<2 RK_PB7 1 &pcfg_pull_none>, /* DATA13 */
529*4882a593Smuzhiyun				<2 RK_PC0 1 &pcfg_pull_none>, /* DATA14 */
530*4882a593Smuzhiyun				<2 RK_PC1 1 &pcfg_pull_none>, /* DATA15 */
531*4882a593Smuzhiyun				<2 RK_PC2 1 &pcfg_pull_none>, /* DATA16 */
532*4882a593Smuzhiyun				<2 RK_PC3 1 &pcfg_pull_none>; /* DATA17 */
533*4882a593Smuzhiyun		};
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun		lcdc_sleep_pins: lcdc-sleep-pins {
536*4882a593Smuzhiyun			rockchip,pins =
537*4882a593Smuzhiyun				<2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* DCLK */
538*4882a593Smuzhiyun				<2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* DEN */
539*4882a593Smuzhiyun				<2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA10 */
540*4882a593Smuzhiyun				<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA11 */
541*4882a593Smuzhiyun				<2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA12 */
542*4882a593Smuzhiyun				<2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA13 */
543*4882a593Smuzhiyun				<2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA14 */
544*4882a593Smuzhiyun				<2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA15 */
545*4882a593Smuzhiyun				<2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA16 */
546*4882a593Smuzhiyun				<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; /* DATA17 */
547*4882a593Smuzhiyun		};
548*4882a593Smuzhiyun	};
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun	pmic {
551*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
552*4882a593Smuzhiyun			rockchip,pins =
553*4882a593Smuzhiyun				<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_default>;
554*4882a593Smuzhiyun		};
555*4882a593Smuzhiyun	};
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun	wireless-bluetooth {
558*4882a593Smuzhiyun		uart1_rts_gpio: uart1-rts-gpio {
559*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
560*4882a593Smuzhiyun		};
561*4882a593Smuzhiyun	};
562*4882a593Smuzhiyun};
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun&pwm0 {
565*4882a593Smuzhiyun	status = "okay";
566*4882a593Smuzhiyun};
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun&rga {
569*4882a593Smuzhiyun	status = "okay";
570*4882a593Smuzhiyun};
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun&saradc {
573*4882a593Smuzhiyun	status = "okay";
574*4882a593Smuzhiyun	vref-supply = <&vccadc_ref>;
575*4882a593Smuzhiyun};
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun&sdmmc {
578*4882a593Smuzhiyun	cap-mmc-highspeed;
579*4882a593Smuzhiyun	no-sdio;
580*4882a593Smuzhiyun	no-mmc;
581*4882a593Smuzhiyun	broken-cd;
582*4882a593Smuzhiyun	card-detect-delay = <800>;
583*4882a593Smuzhiyun	ignore-pm-notify;
584*4882a593Smuzhiyun	keep-power-in-suspend;
585*4882a593Smuzhiyun	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
586*4882a593Smuzhiyun	status = "disabled";
587*4882a593Smuzhiyun};
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun&sdio {
590*4882a593Smuzhiyun	max-frequency = <50000000>;
591*4882a593Smuzhiyun	cap-sd-highspeed;
592*4882a593Smuzhiyun	no-sd;
593*4882a593Smuzhiyun	no-mmc;
594*4882a593Smuzhiyun	ignore-pm-notify;
595*4882a593Smuzhiyun	keep-power-in-suspend;
596*4882a593Smuzhiyun	non-removable;
597*4882a593Smuzhiyun	vmmc-supply = <&ldo5>;
598*4882a593Smuzhiyun	status = "okay";
599*4882a593Smuzhiyun};
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun&tsadc {
602*4882a593Smuzhiyun	status = "okay";
603*4882a593Smuzhiyun};
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun&rgb {
606*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
607*4882a593Smuzhiyun	pinctrl-0 = <&lcdc_rgb_pins>;
608*4882a593Smuzhiyun	pinctrl-1 = <&lcdc_sleep_pins>;
609*4882a593Smuzhiyun	status = "okay";
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun	ports {
612*4882a593Smuzhiyun		port@1 {
613*4882a593Smuzhiyun			reg = <1>;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun			rgb_out_panel: endpoint {
616*4882a593Smuzhiyun				remote-endpoint = <&panel_in_rgb>;
617*4882a593Smuzhiyun			};
618*4882a593Smuzhiyun		};
619*4882a593Smuzhiyun	};
620*4882a593Smuzhiyun};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun&route_rgb {
623*4882a593Smuzhiyun	status = "okay";
624*4882a593Smuzhiyun};
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun&u2phy {
627*4882a593Smuzhiyun	status = "okay";
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun	u2phy_otg: otg-port {
630*4882a593Smuzhiyun		status = "okay";
631*4882a593Smuzhiyun	};
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun	u2phy_host: host-port {
634*4882a593Smuzhiyun		status = "okay";
635*4882a593Smuzhiyun	};
636*4882a593Smuzhiyun};
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun&uart1 {
639*4882a593Smuzhiyun	pinctrl-names = "default";
640*4882a593Smuzhiyun	pinctrl-0 = <&uart1_xfer &uart1_cts>;
641*4882a593Smuzhiyun	status = "okay";
642*4882a593Smuzhiyun};
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun&usb_otg {
645*4882a593Smuzhiyun	status = "okay";
646*4882a593Smuzhiyun};
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun&vop {
649*4882a593Smuzhiyun	status = "okay";
650*4882a593Smuzhiyun};
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun&vop_mmu {
653*4882a593Smuzhiyun	status = "okay";
654*4882a593Smuzhiyun};
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun&vdpu {
657*4882a593Smuzhiyun	status = "okay";
658*4882a593Smuzhiyun};
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun&vepu {
661*4882a593Smuzhiyun	status = "okay";
662*4882a593Smuzhiyun};
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun&vpu_mmu {
665*4882a593Smuzhiyun	status = "okay";
666*4882a593Smuzhiyun};
667