1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/dts-v1/; 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun#include "rk3036.dtsi" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "Rockchip RK3036 KylinBoard"; 9*4882a593Smuzhiyun compatible = "rockchip,rk3036-kylin", "rockchip,rk3036"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun chosen { 12*4882a593Smuzhiyun bootargs = "console=uart8250,mmio32,0x20068000 rw root=PARTUUID=7c0b0000-0000 rootfstype=ext4 rootwait"; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun memory@60000000 { 16*4882a593Smuzhiyun device_type = "memory"; 17*4882a593Smuzhiyun reg = <0x60000000 0x20000000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun leds: gpio-leds { 21*4882a593Smuzhiyun compatible = "gpio-leds"; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun work_led: led-0 { 24*4882a593Smuzhiyun gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 25*4882a593Smuzhiyun label = "kylin:red:led"; 26*4882a593Smuzhiyun pinctrl-names = "default"; 27*4882a593Smuzhiyun pinctrl-0 = <&led_ctl>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 32*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 33*4882a593Smuzhiyun pinctrl-names = "default"; 34*4882a593Smuzhiyun pinctrl-0 = <&bt_wake_h>; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* 37*4882a593Smuzhiyun * On the module itself this is one of these (depending 38*4882a593Smuzhiyun * on the actual card populated): 39*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 40*4882a593Smuzhiyun * - SDIO_RESET_L_WL_RST 41*4882a593Smuzhiyun * - SDIO_RESET_L_BT_EN 42*4882a593Smuzhiyun */ 43*4882a593Smuzhiyun reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; /* WL_REG_ON */ 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun sound { 47*4882a593Smuzhiyun compatible = "simple-audio-card"; 48*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 49*4882a593Smuzhiyun simple-audio-card,name = "rockchip,rt5616-codec"; 50*4882a593Smuzhiyun simple-audio-card,mclk-fs = <512>; 51*4882a593Smuzhiyun simple-audio-card,widgets = 52*4882a593Smuzhiyun "Microphone", "Microphone Jack", 53*4882a593Smuzhiyun "Headphone", "Headphone Jack"; 54*4882a593Smuzhiyun simple-audio-card,routing = 55*4882a593Smuzhiyun "MIC1", "Microphone Jack", 56*4882a593Smuzhiyun "MIC2", "Microphone Jack", 57*4882a593Smuzhiyun "Microphone Jack", "micbias1", 58*4882a593Smuzhiyun "Headphone Jack", "HPOL", 59*4882a593Smuzhiyun "Headphone Jack", "HPOR"; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun simple-audio-card,dai-link@0 { 62*4882a593Smuzhiyun format = "i2s"; 63*4882a593Smuzhiyun cpu { 64*4882a593Smuzhiyun sound-dai = <&i2s>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun codec { 68*4882a593Smuzhiyun sound-dai = <&rt5616>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun simple-audio-card,dai-link@1 { 73*4882a593Smuzhiyun format = "i2s"; 74*4882a593Smuzhiyun cpu { 75*4882a593Smuzhiyun sound-dai = <&i2s>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun codec { 79*4882a593Smuzhiyun sound-dai = <&hdmi>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun vcc_sys: vsys-regulator { 85*4882a593Smuzhiyun compatible = "regulator-fixed"; 86*4882a593Smuzhiyun regulator-name = "vcc_sys"; 87*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 88*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 89*4882a593Smuzhiyun regulator-always-on; 90*4882a593Smuzhiyun regulator-boot-on; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun xin32k: xin32k { 94*4882a593Smuzhiyun compatible = "fixed-clock"; 95*4882a593Smuzhiyun clock-frequency = <32768>; 96*4882a593Smuzhiyun clock-output-names = "xin32k"; 97*4882a593Smuzhiyun #clock-cells = <0>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun wireless-bluetooth { 101*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 102*4882a593Smuzhiyun uart_rts_gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; 103*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 104*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>; 105*4882a593Smuzhiyun pinctrl-1 = <&uart0_gpios>; 106*4882a593Smuzhiyun BT,reset_gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; 107*4882a593Smuzhiyun BT,wake_gpio = <&gpio2 8 GPIO_ACTIVE_HIGH>; 108*4882a593Smuzhiyun BT,wake_host_irq = <&gpio2 3 GPIO_ACTIVE_HIGH>; 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun wireless-wlan { 113*4882a593Smuzhiyun compatible = "wlan-platdata"; 114*4882a593Smuzhiyun rockchip,grf = <&grf>; 115*4882a593Smuzhiyun wifi_chip_type = "ap6212"; 116*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 27 GPIO_ACTIVE_HIGH>; 117*4882a593Smuzhiyun status = "okay"; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun}; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun&acodec { 122*4882a593Smuzhiyun status = "okay"; 123*4882a593Smuzhiyun}; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun&cpu0 { 126*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 127*4882a593Smuzhiyun}; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun&cpu0_opp_table { 130*4882a593Smuzhiyun /delete-node/ opp-408000000; 131*4882a593Smuzhiyun /delete-node/ opp-600000000; 132*4882a593Smuzhiyun /delete-node/ opp-816000000; 133*4882a593Smuzhiyun /delete-node/ opp-1200000000; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun&emac { 137*4882a593Smuzhiyun pinctrl-names = "default"; 138*4882a593Smuzhiyun pinctrl-0 = <&emac_xfer>, <&emac_mdio>; 139*4882a593Smuzhiyun phy = <&phy0>; 140*4882a593Smuzhiyun phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */ 141*4882a593Smuzhiyun phy-reset-duration = <10>; /* millisecond */ 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun status = "okay"; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun phy0: ethernet-phy@0 { 146*4882a593Smuzhiyun reg = <0>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun}; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun&emmc { 151*4882a593Smuzhiyun no-sdio; 152*4882a593Smuzhiyun no-sd; 153*4882a593Smuzhiyun status = "okay"; 154*4882a593Smuzhiyun}; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun&gpu { 157*4882a593Smuzhiyun status = "okay"; 158*4882a593Smuzhiyun mali-supply = <&vdd_cpu>; 159*4882a593Smuzhiyun}; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun/* 162*4882a593Smuzhiyun * Just as GPU's power supply is provided by cpu regulator, and fixed-frequency 163*4882a593Smuzhiyun * on CPU. 164*4882a593Smuzhiyun */ 165*4882a593Smuzhiyun&gpu_opp_table { 166*4882a593Smuzhiyun opp-200000000 { 167*4882a593Smuzhiyun opp-microvolt = <1150000>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun opp-400000000 { 170*4882a593Smuzhiyun opp-microvolt = <1150000>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun}; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun&hdmi { 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun}; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun&hevc { 179*4882a593Smuzhiyun status = "okay"; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun&hevc_mmu { 183*4882a593Smuzhiyun status = "okay"; 184*4882a593Smuzhiyun}; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun&i2c1 { 187*4882a593Smuzhiyun clock-frequency = <400000>; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun status = "okay"; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun rk808: pmic@1b { 192*4882a593Smuzhiyun compatible = "rockchip,rk808"; 193*4882a593Smuzhiyun reg = <0x1b>; 194*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 195*4882a593Smuzhiyun interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 196*4882a593Smuzhiyun pinctrl-names = "default"; 197*4882a593Smuzhiyun pinctrl-0 = <&pmic_int &global_pwroff>; 198*4882a593Smuzhiyun rockchip,system-power-controller; 199*4882a593Smuzhiyun wakeup-source; 200*4882a593Smuzhiyun #clock-cells = <1>; 201*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 204*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 205*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 206*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 207*4882a593Smuzhiyun vcc7-supply = <&vcc_sys>; 208*4882a593Smuzhiyun vcc9-supply = <&vcc_sys>; 209*4882a593Smuzhiyun vcc10-supply = <&vcc_io>; 210*4882a593Smuzhiyun vcc11-supply = <&vcc_io>; 211*4882a593Smuzhiyun vddio-supply = <&vcc_io>; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun regulators { 214*4882a593Smuzhiyun vdd_cpu: DCDC_REG1 { 215*4882a593Smuzhiyun regulator-always-on; 216*4882a593Smuzhiyun regulator-boot-on; 217*4882a593Smuzhiyun regulator-min-microvolt = <1150000>; 218*4882a593Smuzhiyun regulator-max-microvolt = <1150000>; 219*4882a593Smuzhiyun regulator-name = "vdd_arm"; 220*4882a593Smuzhiyun regulator-state-mem { 221*4882a593Smuzhiyun regulator-on-in-suspend; 222*4882a593Smuzhiyun regulator-suspend-microvolt = <1150000>; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 227*4882a593Smuzhiyun regulator-always-on; 228*4882a593Smuzhiyun regulator-boot-on; 229*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 230*4882a593Smuzhiyun regulator-state-mem { 231*4882a593Smuzhiyun regulator-on-in-suspend; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 236*4882a593Smuzhiyun regulator-always-on; 237*4882a593Smuzhiyun regulator-boot-on; 238*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 239*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 240*4882a593Smuzhiyun regulator-name = "vcc_io"; 241*4882a593Smuzhiyun regulator-state-mem { 242*4882a593Smuzhiyun regulator-on-in-suspend; 243*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun vcca_33: LDO_REG1 { 248*4882a593Smuzhiyun regulator-always-on; 249*4882a593Smuzhiyun regulator-boot-on; 250*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 251*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 252*4882a593Smuzhiyun regulator-name = "vcca_33"; 253*4882a593Smuzhiyun regulator-state-mem { 254*4882a593Smuzhiyun regulator-on-in-suspend; 255*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun vout1: LDO_REG2 { 260*4882a593Smuzhiyun regulator-always-on; 261*4882a593Smuzhiyun regulator-boot-on; 262*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 263*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 264*4882a593Smuzhiyun regulator-name = "vout1"; 265*4882a593Smuzhiyun regulator-state-mem { 266*4882a593Smuzhiyun regulator-off-in-suspend; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun vdd_11: LDO_REG3 { 271*4882a593Smuzhiyun regulator-always-on; 272*4882a593Smuzhiyun regulator-boot-on; 273*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 274*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 275*4882a593Smuzhiyun regulator-name = "vdd_11"; 276*4882a593Smuzhiyun regulator-state-mem { 277*4882a593Smuzhiyun regulator-on-in-suspend; 278*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun vout3: LDO_REG4 { 283*4882a593Smuzhiyun regulator-always-on; 284*4882a593Smuzhiyun regulator-boot-on; 285*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 286*4882a593Smuzhiyun regulator-max-microvolt = <3400000>; 287*4882a593Smuzhiyun regulator-name = "vout3"; 288*4882a593Smuzhiyun regulator-state-mem { 289*4882a593Smuzhiyun regulator-on-in-suspend; 290*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 291*4882a593Smuzhiyun }; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun vout4: LDO_REG5 { 295*4882a593Smuzhiyun regulator-always-on; 296*4882a593Smuzhiyun regulator-boot-on; 297*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 298*4882a593Smuzhiyun regulator-max-microvolt = <3400000>; 299*4882a593Smuzhiyun regulator-name = "vout4"; 300*4882a593Smuzhiyun regulator-state-mem { 301*4882a593Smuzhiyun regulator-on-in-suspend; 302*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun vout5: LDO_REG6 { 307*4882a593Smuzhiyun regulator-always-on; 308*4882a593Smuzhiyun regulator-boot-on; 309*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 310*4882a593Smuzhiyun regulator-max-microvolt = <3400000>; 311*4882a593Smuzhiyun regulator-name = "vout5"; 312*4882a593Smuzhiyun regulator-state-mem { 313*4882a593Smuzhiyun regulator-on-in-suspend; 314*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun vout2: LDO_REG7 { 319*4882a593Smuzhiyun regulator-always-on; 320*4882a593Smuzhiyun regulator-boot-on; 321*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 322*4882a593Smuzhiyun regulator-max-microvolt = <2500000>; 323*4882a593Smuzhiyun regulator-name = "vout2"; 324*4882a593Smuzhiyun regulator-state-mem { 325*4882a593Smuzhiyun regulator-on-in-suspend; 326*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun vcc18: LDO_REG8 { 331*4882a593Smuzhiyun regulator-always-on; 332*4882a593Smuzhiyun regulator-boot-on; 333*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 334*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 335*4882a593Smuzhiyun regulator-name = "vcc18"; 336*4882a593Smuzhiyun regulator-state-mem { 337*4882a593Smuzhiyun regulator-on-in-suspend; 338*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun }; 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun vswout1: SWITCH_REG1 { 343*4882a593Smuzhiyun regulator-always-on; 344*4882a593Smuzhiyun regulator-boot-on; 345*4882a593Smuzhiyun regulator-name = "vswout1"; 346*4882a593Smuzhiyun regulator-state-mem { 347*4882a593Smuzhiyun regulator-on-in-suspend; 348*4882a593Smuzhiyun }; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun vswout2: SWITCH_REG2 { 352*4882a593Smuzhiyun regulator-always-on; 353*4882a593Smuzhiyun regulator-boot-on; 354*4882a593Smuzhiyun regulator-name = "vswout2"; 355*4882a593Smuzhiyun regulator-state-mem { 356*4882a593Smuzhiyun regulator-on-in-suspend; 357*4882a593Smuzhiyun }; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun}; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun&i2c2 { 364*4882a593Smuzhiyun status = "okay"; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun rt5616: rt5616@1b { 367*4882a593Smuzhiyun compatible = "rt5616"; 368*4882a593Smuzhiyun reg = <0x1b>; 369*4882a593Smuzhiyun clocks = <&cru SCLK_I2S_OUT>; 370*4882a593Smuzhiyun clock-names = "mclk"; 371*4882a593Smuzhiyun #sound-dai-cells = <0>; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun}; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun&i2s { 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun pinctrl-0 = <&i2s_sclk 378*4882a593Smuzhiyun &i2s_lrclktx 379*4882a593Smuzhiyun &i2s_sdo 380*4882a593Smuzhiyun &i2s_sdi>; 381*4882a593Smuzhiyun}; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun&mpp_srv { 384*4882a593Smuzhiyun status = "okay"; 385*4882a593Smuzhiyun}; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun&sdio { 388*4882a593Smuzhiyun status = "okay"; 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun bus-width = <4>; 391*4882a593Smuzhiyun cap-sd-highspeed; 392*4882a593Smuzhiyun cap-sdio-irq; 393*4882a593Smuzhiyun rockchip,default-sample-phase = <90>; 394*4882a593Smuzhiyun keep-power-in-suspend; 395*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 396*4882a593Smuzhiyun non-removable; 397*4882a593Smuzhiyun pinctrl-names = "default"; 398*4882a593Smuzhiyun pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>; 399*4882a593Smuzhiyun sd-uhs-sdr12; 400*4882a593Smuzhiyun sd-uhs-sdr25; 401*4882a593Smuzhiyun sd-uhs-sdr50; 402*4882a593Smuzhiyun sd-uhs-sdr104; 403*4882a593Smuzhiyun no-mmc; 404*4882a593Smuzhiyun no-sd; 405*4882a593Smuzhiyun}; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun&sdmmc { 408*4882a593Smuzhiyun bus-width = <4>; 409*4882a593Smuzhiyun cap-mmc-highspeed; 410*4882a593Smuzhiyun cap-sd-highspeed; 411*4882a593Smuzhiyun card-detect-delay = <200>; 412*4882a593Smuzhiyun disable-wp; 413*4882a593Smuzhiyun pinctrl-names = "default"; 414*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; 415*4882a593Smuzhiyun no-mmc; 416*4882a593Smuzhiyun no-sdio; 417*4882a593Smuzhiyun}; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun&uart0 { 420*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer>, <&uart0_cts>; 421*4882a593Smuzhiyun status = "okay"; 422*4882a593Smuzhiyun}; 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun&uart2 { 425*4882a593Smuzhiyun status = "okay"; 426*4882a593Smuzhiyun}; 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun&usb_host { 429*4882a593Smuzhiyun status = "okay"; 430*4882a593Smuzhiyun}; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun&usb_otg { 433*4882a593Smuzhiyun status = "okay"; 434*4882a593Smuzhiyun}; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun&vdpu { 437*4882a593Smuzhiyun status = "okay"; 438*4882a593Smuzhiyun}; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun&vpu_mmu { 441*4882a593Smuzhiyun status = "okay"; 442*4882a593Smuzhiyun}; 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun&vop { 445*4882a593Smuzhiyun status = "okay"; 446*4882a593Smuzhiyun}; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun&vop_mmu { 449*4882a593Smuzhiyun status = "okay"; 450*4882a593Smuzhiyun}; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun&wdt { 453*4882a593Smuzhiyun status = "okay"; 454*4882a593Smuzhiyun}; 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun&pinctrl { 457*4882a593Smuzhiyun leds { 458*4882a593Smuzhiyun led_ctl: led-ctl { 459*4882a593Smuzhiyun rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 460*4882a593Smuzhiyun }; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun pmic { 464*4882a593Smuzhiyun pmic_int: pmic-int { 465*4882a593Smuzhiyun rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_default>; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun }; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun sdio { 470*4882a593Smuzhiyun bt_wake_h: bt-wake-h { 471*4882a593Smuzhiyun rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_default>; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun }; 474*4882a593Smuzhiyun 475*4882a593Smuzhiyun sdmmc { 476*4882a593Smuzhiyun sdmmc_pwr: sdmmc-pwr { 477*4882a593Smuzhiyun rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 478*4882a593Smuzhiyun }; 479*4882a593Smuzhiyun }; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun suspend { 482*4882a593Smuzhiyun global_pwroff: global-pwroff { 483*4882a593Smuzhiyun rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>; 484*4882a593Smuzhiyun }; 485*4882a593Smuzhiyun }; 486*4882a593Smuzhiyun 487*4882a593Smuzhiyun wireless-bluetooth { 488*4882a593Smuzhiyun uart0_gpios: uart0-gpios { 489*4882a593Smuzhiyun rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 490*4882a593Smuzhiyun }; 491*4882a593Smuzhiyun }; 492*4882a593Smuzhiyun}; 493