1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for the SILK board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2014 Renesas Electronics Corporation 6*4882a593Smuzhiyun * Copyright (C) 2014-2015 Renesas Solutions Corp. 7*4882a593Smuzhiyun * Copyright (C) 2014-2015 Cogent Embedded, Inc. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/* 11*4882a593Smuzhiyun * SSI-AK4643 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * SW1: 2-1: AK4643 14*4882a593Smuzhiyun * 2-3: ADV7511 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * This command is required before playback/capture: 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * amixer set "LINEOUT Mixer DACL" on 19*4882a593Smuzhiyun */ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun/dts-v1/; 22*4882a593Smuzhiyun#include "r8a7794.dtsi" 23*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 24*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun/ { 27*4882a593Smuzhiyun model = "SILK"; 28*4882a593Smuzhiyun compatible = "renesas,silk", "renesas,r8a7794"; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun aliases { 31*4882a593Smuzhiyun serial0 = &scif2; 32*4882a593Smuzhiyun i2c9 = &gpioi2c1; 33*4882a593Smuzhiyun i2c10 = &i2chdmi; 34*4882a593Smuzhiyun mmc0 = &mmcif0; 35*4882a593Smuzhiyun mmc1 = &sdhi1; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun chosen { 39*4882a593Smuzhiyun bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 40*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun memory@40000000 { 44*4882a593Smuzhiyun device_type = "memory"; 45*4882a593Smuzhiyun reg = <0 0x40000000 0 0x40000000>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun gpio-keys { 49*4882a593Smuzhiyun compatible = "gpio-keys"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun key-3 { 52*4882a593Smuzhiyun gpios = <&gpio5 10 GPIO_ACTIVE_LOW>; 53*4882a593Smuzhiyun linux,code = <KEY_3>; 54*4882a593Smuzhiyun label = "SW3"; 55*4882a593Smuzhiyun wakeup-source; 56*4882a593Smuzhiyun debounce-interval = <20>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun key-4 { 59*4882a593Smuzhiyun gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; 60*4882a593Smuzhiyun linux,code = <KEY_4>; 61*4882a593Smuzhiyun label = "SW4"; 62*4882a593Smuzhiyun wakeup-source; 63*4882a593Smuzhiyun debounce-interval = <20>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun key-6 { 66*4882a593Smuzhiyun gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; 67*4882a593Smuzhiyun linux,code = <KEY_6>; 68*4882a593Smuzhiyun label = "SW6"; 69*4882a593Smuzhiyun wakeup-source; 70*4882a593Smuzhiyun debounce-interval = <20>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun key-a { 73*4882a593Smuzhiyun gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; 74*4882a593Smuzhiyun linux,code = <KEY_A>; 75*4882a593Smuzhiyun label = "SW12-1"; 76*4882a593Smuzhiyun wakeup-source; 77*4882a593Smuzhiyun debounce-interval = <20>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun key-b { 80*4882a593Smuzhiyun gpios = <&gpio3 10 GPIO_ACTIVE_LOW>; 81*4882a593Smuzhiyun linux,code = <KEY_B>; 82*4882a593Smuzhiyun label = "SW12-2"; 83*4882a593Smuzhiyun wakeup-source; 84*4882a593Smuzhiyun debounce-interval = <20>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun key-c { 87*4882a593Smuzhiyun gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; 88*4882a593Smuzhiyun linux,code = <KEY_C>; 89*4882a593Smuzhiyun label = "SW12-3"; 90*4882a593Smuzhiyun wakeup-source; 91*4882a593Smuzhiyun debounce-interval = <20>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun key-d { 94*4882a593Smuzhiyun gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 95*4882a593Smuzhiyun linux,code = <KEY_D>; 96*4882a593Smuzhiyun label = "SW12-4"; 97*4882a593Smuzhiyun wakeup-source; 98*4882a593Smuzhiyun debounce-interval = <20>; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun d3_3v: regulator-d3-3v { 103*4882a593Smuzhiyun compatible = "regulator-fixed"; 104*4882a593Smuzhiyun regulator-name = "D3.3V"; 105*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 106*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 107*4882a593Smuzhiyun regulator-boot-on; 108*4882a593Smuzhiyun regulator-always-on; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun vcc_sdhi1: regulator-vcc-sdhi1 { 112*4882a593Smuzhiyun compatible = "regulator-fixed"; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun regulator-name = "SDHI1 Vcc"; 115*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 116*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; 119*4882a593Smuzhiyun enable-active-high; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun vccq_sdhi1: regulator-vccq-sdhi1 { 123*4882a593Smuzhiyun compatible = "regulator-gpio"; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun regulator-name = "SDHI1 VccQ"; 126*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 127*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; 130*4882a593Smuzhiyun gpios-states = <1>; 131*4882a593Smuzhiyun states = <3300000 1>, <1800000 0>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun vga-encoder { 135*4882a593Smuzhiyun compatible = "adi,adv7123"; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun ports { 138*4882a593Smuzhiyun #address-cells = <1>; 139*4882a593Smuzhiyun #size-cells = <0>; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun port@0 { 142*4882a593Smuzhiyun reg = <0>; 143*4882a593Smuzhiyun adv7123_in: endpoint { 144*4882a593Smuzhiyun remote-endpoint = <&du_out_rgb1>; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun port@1 { 148*4882a593Smuzhiyun reg = <1>; 149*4882a593Smuzhiyun adv7123_out: endpoint { 150*4882a593Smuzhiyun remote-endpoint = <&vga_in>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun hdmi-out { 157*4882a593Smuzhiyun compatible = "hdmi-connector"; 158*4882a593Smuzhiyun type = "a"; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun port { 161*4882a593Smuzhiyun hdmi_con: endpoint { 162*4882a593Smuzhiyun remote-endpoint = <&adv7511_out>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun vga { 168*4882a593Smuzhiyun compatible = "vga-connector"; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun port { 171*4882a593Smuzhiyun vga_in: endpoint { 172*4882a593Smuzhiyun remote-endpoint = <&adv7123_out>; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun x2_clk: x2-clock { 178*4882a593Smuzhiyun compatible = "fixed-clock"; 179*4882a593Smuzhiyun #clock-cells = <0>; 180*4882a593Smuzhiyun clock-frequency = <148500000>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun x3_clk: x3-clock { 184*4882a593Smuzhiyun compatible = "fixed-clock"; 185*4882a593Smuzhiyun #clock-cells = <0>; 186*4882a593Smuzhiyun clock-frequency = <74250000>; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun x9_clk: audio_clock { 190*4882a593Smuzhiyun compatible = "fixed-clock"; 191*4882a593Smuzhiyun #clock-cells = <0>; 192*4882a593Smuzhiyun clock-frequency = <12288000>; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun sound { 196*4882a593Smuzhiyun compatible = "simple-audio-card"; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun simple-audio-card,format = "left_j"; 199*4882a593Smuzhiyun simple-audio-card,bitclock-master = <&soundcodec>; 200*4882a593Smuzhiyun simple-audio-card,frame-master = <&soundcodec>; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun simple-audio-card,cpu { 203*4882a593Smuzhiyun sound-dai = <&rcar_sound>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun soundcodec: simple-audio-card,codec { 207*4882a593Smuzhiyun sound-dai = <&ak4643>; 208*4882a593Smuzhiyun clocks = <&x9_clk>; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun gpioi2c1: i2c-9 { 213*4882a593Smuzhiyun #address-cells = <1>; 214*4882a593Smuzhiyun #size-cells = <0>; 215*4882a593Smuzhiyun compatible = "i2c-gpio"; 216*4882a593Smuzhiyun status = "disabled"; 217*4882a593Smuzhiyun scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 218*4882a593Smuzhiyun sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 219*4882a593Smuzhiyun i2c-gpio,delay-us = <5>; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun /* 223*4882a593Smuzhiyun * A fallback to GPIO is provided for I2C1. 224*4882a593Smuzhiyun */ 225*4882a593Smuzhiyun i2chdmi: i2c-10 { 226*4882a593Smuzhiyun compatible = "i2c-demux-pinctrl"; 227*4882a593Smuzhiyun i2c-parent = <&i2c1>, <&gpioi2c1>; 228*4882a593Smuzhiyun i2c-bus-name = "i2c-hdmi"; 229*4882a593Smuzhiyun #address-cells = <1>; 230*4882a593Smuzhiyun #size-cells = <0>; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun ak4643: codec@12 { 233*4882a593Smuzhiyun compatible = "asahi-kasei,ak4643"; 234*4882a593Smuzhiyun #sound-dai-cells = <0>; 235*4882a593Smuzhiyun reg = <0x12>; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun composite-in@20 { 239*4882a593Smuzhiyun compatible = "adi,adv7180"; 240*4882a593Smuzhiyun reg = <0x20>; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun port { 243*4882a593Smuzhiyun adv7180: endpoint { 244*4882a593Smuzhiyun bus-width = <8>; 245*4882a593Smuzhiyun remote-endpoint = <&vin0ep>; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun hdmi@39 { 251*4882a593Smuzhiyun compatible = "adi,adv7511w"; 252*4882a593Smuzhiyun reg = <0x39>; 253*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 254*4882a593Smuzhiyun interrupts = <23 IRQ_TYPE_LEVEL_LOW>; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun adi,input-depth = <8>; 257*4882a593Smuzhiyun adi,input-colorspace = "rgb"; 258*4882a593Smuzhiyun adi,input-clock = "1x"; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun ports { 261*4882a593Smuzhiyun #address-cells = <1>; 262*4882a593Smuzhiyun #size-cells = <0>; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun port@0 { 265*4882a593Smuzhiyun reg = <0>; 266*4882a593Smuzhiyun adv7511_in: endpoint { 267*4882a593Smuzhiyun remote-endpoint = <&du_out_rgb0>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun port@1 { 272*4882a593Smuzhiyun reg = <1>; 273*4882a593Smuzhiyun adv7511_out: endpoint { 274*4882a593Smuzhiyun remote-endpoint = <&hdmi_con>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun eeprom@50 { 281*4882a593Smuzhiyun compatible = "renesas,r1ex24002", "atmel,24c02"; 282*4882a593Smuzhiyun reg = <0x50>; 283*4882a593Smuzhiyun pagesize = <16>; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun}; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun&extal_clk { 289*4882a593Smuzhiyun clock-frequency = <20000000>; 290*4882a593Smuzhiyun}; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun&pfc { 293*4882a593Smuzhiyun pinctrl-0 = <&scif_clk_pins>; 294*4882a593Smuzhiyun pinctrl-names = "default"; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun scif2_pins: scif2 { 297*4882a593Smuzhiyun groups = "scif2_data"; 298*4882a593Smuzhiyun function = "scif2"; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun scif_clk_pins: scif_clk { 302*4882a593Smuzhiyun groups = "scif_clk"; 303*4882a593Smuzhiyun function = "scif_clk"; 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun ether_pins: ether { 307*4882a593Smuzhiyun groups = "eth_link", "eth_mdio", "eth_rmii"; 308*4882a593Smuzhiyun function = "eth"; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun phy1_pins: phy1 { 312*4882a593Smuzhiyun groups = "intc_irq8"; 313*4882a593Smuzhiyun function = "intc"; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun i2c1_pins: i2c1 { 317*4882a593Smuzhiyun groups = "i2c1"; 318*4882a593Smuzhiyun function = "i2c1"; 319*4882a593Smuzhiyun }; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun mmcif0_pins: mmcif0 { 322*4882a593Smuzhiyun groups = "mmc_data8", "mmc_ctrl"; 323*4882a593Smuzhiyun function = "mmc"; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun sdhi1_pins: sd1 { 327*4882a593Smuzhiyun groups = "sdhi1_data4", "sdhi1_ctrl"; 328*4882a593Smuzhiyun function = "sdhi1"; 329*4882a593Smuzhiyun }; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun qspi_pins: qspi { 332*4882a593Smuzhiyun groups = "qspi_ctrl", "qspi_data4"; 333*4882a593Smuzhiyun function = "qspi"; 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun vin0_pins: vin0 { 337*4882a593Smuzhiyun groups = "vin0_data8", "vin0_clk"; 338*4882a593Smuzhiyun function = "vin0"; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun usb0_pins: usb0 { 342*4882a593Smuzhiyun groups = "usb0"; 343*4882a593Smuzhiyun function = "usb0"; 344*4882a593Smuzhiyun }; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun usb1_pins: usb1 { 347*4882a593Smuzhiyun groups = "usb1"; 348*4882a593Smuzhiyun function = "usb1"; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun du0_pins: du0 { 352*4882a593Smuzhiyun groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out"; 353*4882a593Smuzhiyun function = "du0"; 354*4882a593Smuzhiyun }; 355*4882a593Smuzhiyun 356*4882a593Smuzhiyun du1_pins: du1 { 357*4882a593Smuzhiyun groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out"; 358*4882a593Smuzhiyun function = "du1"; 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun 361*4882a593Smuzhiyun ssi_pins: sound { 362*4882a593Smuzhiyun groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; 363*4882a593Smuzhiyun function = "ssi"; 364*4882a593Smuzhiyun }; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun audio_clk_pins: audio_clk { 367*4882a593Smuzhiyun groups = "audio_clkc"; 368*4882a593Smuzhiyun function = "audio_clk"; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun}; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun&scif2 { 373*4882a593Smuzhiyun pinctrl-0 = <&scif2_pins>; 374*4882a593Smuzhiyun pinctrl-names = "default"; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun}; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun&scif_clk { 380*4882a593Smuzhiyun clock-frequency = <14745600>; 381*4882a593Smuzhiyun}; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyunðer { 384*4882a593Smuzhiyun pinctrl-0 = <ðer_pins &phy1_pins>; 385*4882a593Smuzhiyun pinctrl-names = "default"; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun phy-handle = <&phy1>; 388*4882a593Smuzhiyun renesas,ether-link-active-low; 389*4882a593Smuzhiyun status = "okay"; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun phy1: ethernet-phy@1 { 392*4882a593Smuzhiyun reg = <1>; 393*4882a593Smuzhiyun interrupt-parent = <&irqc0>; 394*4882a593Smuzhiyun interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 395*4882a593Smuzhiyun micrel,led-mode = <1>; 396*4882a593Smuzhiyun reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun}; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun&i2c1 { 401*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins>; 402*4882a593Smuzhiyun pinctrl-names = "i2c-hdmi"; 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun clock-frequency = <400000>; 405*4882a593Smuzhiyun}; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun&i2c7 { 408*4882a593Smuzhiyun status = "okay"; 409*4882a593Smuzhiyun clock-frequency = <100000>; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun pmic@58 { 412*4882a593Smuzhiyun compatible = "dlg,da9063"; 413*4882a593Smuzhiyun reg = <0x58>; 414*4882a593Smuzhiyun interrupt-parent = <&gpio3>; 415*4882a593Smuzhiyun interrupts = <31 IRQ_TYPE_LEVEL_LOW>; 416*4882a593Smuzhiyun interrupt-controller; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun onkey { 419*4882a593Smuzhiyun compatible = "dlg,da9063-onkey"; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun rtc { 423*4882a593Smuzhiyun compatible = "dlg,da9063-rtc"; 424*4882a593Smuzhiyun }; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun wdt { 427*4882a593Smuzhiyun compatible = "dlg,da9063-watchdog"; 428*4882a593Smuzhiyun }; 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun}; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun&mmcif0 { 433*4882a593Smuzhiyun pinctrl-0 = <&mmcif0_pins>; 434*4882a593Smuzhiyun pinctrl-names = "default"; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun vmmc-supply = <&d3_3v>; 437*4882a593Smuzhiyun vqmmc-supply = <&d3_3v>; 438*4882a593Smuzhiyun bus-width = <8>; 439*4882a593Smuzhiyun non-removable; 440*4882a593Smuzhiyun status = "okay"; 441*4882a593Smuzhiyun}; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun&sdhi1 { 444*4882a593Smuzhiyun pinctrl-0 = <&sdhi1_pins>; 445*4882a593Smuzhiyun pinctrl-names = "default"; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun vmmc-supply = <&vcc_sdhi1>; 448*4882a593Smuzhiyun vqmmc-supply = <&vccq_sdhi1>; 449*4882a593Smuzhiyun cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; 450*4882a593Smuzhiyun status = "okay"; 451*4882a593Smuzhiyun}; 452*4882a593Smuzhiyun 453*4882a593Smuzhiyun&qspi { 454*4882a593Smuzhiyun pinctrl-0 = <&qspi_pins>; 455*4882a593Smuzhiyun pinctrl-names = "default"; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun status = "okay"; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun flash@0 { 460*4882a593Smuzhiyun compatible = "spansion,s25fl512s", "jedec,spi-nor"; 461*4882a593Smuzhiyun reg = <0>; 462*4882a593Smuzhiyun spi-max-frequency = <30000000>; 463*4882a593Smuzhiyun spi-tx-bus-width = <4>; 464*4882a593Smuzhiyun spi-rx-bus-width = <4>; 465*4882a593Smuzhiyun spi-cpol; 466*4882a593Smuzhiyun spi-cpha; 467*4882a593Smuzhiyun m25p,fast-read; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun partitions { 470*4882a593Smuzhiyun compatible = "fixed-partitions"; 471*4882a593Smuzhiyun #address-cells = <1>; 472*4882a593Smuzhiyun #size-cells = <1>; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun partition@0 { 475*4882a593Smuzhiyun label = "loader"; 476*4882a593Smuzhiyun reg = <0x00000000 0x00040000>; 477*4882a593Smuzhiyun read-only; 478*4882a593Smuzhiyun }; 479*4882a593Smuzhiyun partition@40000 { 480*4882a593Smuzhiyun label = "user"; 481*4882a593Smuzhiyun reg = <0x00040000 0x00400000>; 482*4882a593Smuzhiyun read-only; 483*4882a593Smuzhiyun }; 484*4882a593Smuzhiyun partition@440000 { 485*4882a593Smuzhiyun label = "flash"; 486*4882a593Smuzhiyun reg = <0x00440000 0x03bc0000>; 487*4882a593Smuzhiyun }; 488*4882a593Smuzhiyun }; 489*4882a593Smuzhiyun }; 490*4882a593Smuzhiyun}; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun/* composite video input */ 493*4882a593Smuzhiyun&vin0 { 494*4882a593Smuzhiyun status = "okay"; 495*4882a593Smuzhiyun pinctrl-0 = <&vin0_pins>; 496*4882a593Smuzhiyun pinctrl-names = "default"; 497*4882a593Smuzhiyun 498*4882a593Smuzhiyun port { 499*4882a593Smuzhiyun vin0ep: endpoint { 500*4882a593Smuzhiyun remote-endpoint = <&adv7180>; 501*4882a593Smuzhiyun bus-width = <8>; 502*4882a593Smuzhiyun }; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun}; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun&pci0 { 507*4882a593Smuzhiyun status = "okay"; 508*4882a593Smuzhiyun pinctrl-0 = <&usb0_pins>; 509*4882a593Smuzhiyun pinctrl-names = "default"; 510*4882a593Smuzhiyun}; 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun&pci1 { 513*4882a593Smuzhiyun status = "okay"; 514*4882a593Smuzhiyun pinctrl-0 = <&usb1_pins>; 515*4882a593Smuzhiyun pinctrl-names = "default"; 516*4882a593Smuzhiyun}; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun&usbphy { 519*4882a593Smuzhiyun status = "okay"; 520*4882a593Smuzhiyun}; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun&du { 523*4882a593Smuzhiyun pinctrl-0 = <&du0_pins &du1_pins>; 524*4882a593Smuzhiyun pinctrl-names = "default"; 525*4882a593Smuzhiyun status = "okay"; 526*4882a593Smuzhiyun 527*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 528*4882a593Smuzhiyun <&x2_clk>, <&x3_clk>; 529*4882a593Smuzhiyun clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun ports { 532*4882a593Smuzhiyun port@0 { 533*4882a593Smuzhiyun endpoint { 534*4882a593Smuzhiyun remote-endpoint = <&adv7511_in>; 535*4882a593Smuzhiyun }; 536*4882a593Smuzhiyun }; 537*4882a593Smuzhiyun port@1 { 538*4882a593Smuzhiyun endpoint { 539*4882a593Smuzhiyun remote-endpoint = <&adv7123_in>; 540*4882a593Smuzhiyun }; 541*4882a593Smuzhiyun }; 542*4882a593Smuzhiyun }; 543*4882a593Smuzhiyun}; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun&rcar_sound { 546*4882a593Smuzhiyun pinctrl-0 = <&ssi_pins &audio_clk_pins>; 547*4882a593Smuzhiyun pinctrl-names = "default"; 548*4882a593Smuzhiyun status = "okay"; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun /* Single DAI */ 551*4882a593Smuzhiyun #sound-dai-cells = <0>; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun rcar_sound,dai { 554*4882a593Smuzhiyun dai0 { 555*4882a593Smuzhiyun playback = <&ssi0>; 556*4882a593Smuzhiyun capture = <&ssi1>; 557*4882a593Smuzhiyun }; 558*4882a593Smuzhiyun }; 559*4882a593Smuzhiyun}; 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun&rwdt { 562*4882a593Smuzhiyun timeout-sec = <60>; 563*4882a593Smuzhiyun status = "okay"; 564*4882a593Smuzhiyun}; 565*4882a593Smuzhiyun 566*4882a593Smuzhiyun&ssi1 { 567*4882a593Smuzhiyun shared-pin; 568*4882a593Smuzhiyun}; 569