xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/r8a7778-bockw.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Reference Device Tree Source for the R-Car M1A (R8A77781) Bock-W board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013  Renesas Solutions Corp.
6*4882a593Smuzhiyun * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * based on r8a7779
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Copyright (C) 2013 Renesas Solutions Corp.
11*4882a593Smuzhiyun * Copyright (C) 2013 Simon Horman
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/dts-v1/;
15*4882a593Smuzhiyun#include "r8a7778.dtsi"
16*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
17*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun/ {
20*4882a593Smuzhiyun	model = "bockw";
21*4882a593Smuzhiyun	compatible = "renesas,bockw", "renesas,r8a7778";
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	aliases {
24*4882a593Smuzhiyun		serial0 = &scif0;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	chosen {
28*4882a593Smuzhiyun		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
29*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	memory@60000000 {
33*4882a593Smuzhiyun		device_type = "memory";
34*4882a593Smuzhiyun		reg = <0x60000000 0x10000000>;
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	fixedregulator3v3: regulator-3v3 {
38*4882a593Smuzhiyun		compatible = "regulator-fixed";
39*4882a593Smuzhiyun		regulator-name = "fixed-3.3V";
40*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
41*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
42*4882a593Smuzhiyun		regulator-boot-on;
43*4882a593Smuzhiyun		regulator-always-on;
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	sound {
47*4882a593Smuzhiyun		compatible = "simple-audio-card";
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun		simple-audio-card,format = "left_j";
50*4882a593Smuzhiyun		simple-audio-card,bitclock-master = <&sndcodec>;
51*4882a593Smuzhiyun		simple-audio-card,frame-master = <&sndcodec>;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		sndcpu: simple-audio-card,cpu {
54*4882a593Smuzhiyun			sound-dai = <&rcar_sound>;
55*4882a593Smuzhiyun		};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun		sndcodec: simple-audio-card,codec {
58*4882a593Smuzhiyun			sound-dai = <&ak4643>;
59*4882a593Smuzhiyun			system-clock-frequency = <11289600>;
60*4882a593Smuzhiyun		};
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun&bsc {
65*4882a593Smuzhiyun	ethernet@18300000 {
66*4882a593Smuzhiyun		compatible = "smsc,lan9220", "smsc,lan9115";
67*4882a593Smuzhiyun		reg = <0x18300000 0x1000>;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun		phy-mode = "mii";
70*4882a593Smuzhiyun		interrupt-parent = <&irqpin>;
71*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
72*4882a593Smuzhiyun		reg-io-width = <4>;
73*4882a593Smuzhiyun		vddvario-supply = <&fixedregulator3v3>;
74*4882a593Smuzhiyun		vdd33a-supply = <&fixedregulator3v3>;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun&extal_clk {
79*4882a593Smuzhiyun	clock-frequency = <33333333>;
80*4882a593Smuzhiyun};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun&i2c0 {
83*4882a593Smuzhiyun	status = "okay";
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	ak4643: codec@12 {
86*4882a593Smuzhiyun		compatible = "asahi-kasei,ak4643";
87*4882a593Smuzhiyun		#sound-dai-cells = <0>;
88*4882a593Smuzhiyun		reg = <0x12>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	camera@41 {
92*4882a593Smuzhiyun		compatible = "oki,ml86v7667";
93*4882a593Smuzhiyun		reg = <0x41>;
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	camera@43 {
97*4882a593Smuzhiyun		compatible = "oki,ml86v7667";
98*4882a593Smuzhiyun		reg = <0x43>;
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun	rx8581: rtc@51 {
102*4882a593Smuzhiyun		compatible = "epson,rx8581";
103*4882a593Smuzhiyun		reg = <0x51>;
104*4882a593Smuzhiyun	};
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun&mmcif {
108*4882a593Smuzhiyun	pinctrl-0 = <&mmc_pins>;
109*4882a593Smuzhiyun	pinctrl-names = "default";
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	vmmc-supply = <&fixedregulator3v3>;
112*4882a593Smuzhiyun	bus-width = <8>;
113*4882a593Smuzhiyun	broken-cd;
114*4882a593Smuzhiyun	status = "okay";
115*4882a593Smuzhiyun};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun&irqpin {
118*4882a593Smuzhiyun	status = "okay";
119*4882a593Smuzhiyun};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun&tmu0 {
122*4882a593Smuzhiyun	status = "okay";
123*4882a593Smuzhiyun};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun&pfc {
126*4882a593Smuzhiyun	pinctrl-0 = <&scif_clk_pins>;
127*4882a593Smuzhiyun	pinctrl-names = "default";
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun	scif0_pins: scif0 {
130*4882a593Smuzhiyun		groups = "scif0_data_a", "scif0_ctrl";
131*4882a593Smuzhiyun		function = "scif0";
132*4882a593Smuzhiyun	};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun	scif_clk_pins: scif_clk {
135*4882a593Smuzhiyun		groups = "scif_clk";
136*4882a593Smuzhiyun		function = "scif_clk";
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	mmc_pins: mmc {
140*4882a593Smuzhiyun		groups = "mmc_data8", "mmc_ctrl";
141*4882a593Smuzhiyun		function = "mmc";
142*4882a593Smuzhiyun	};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun	sdhi0_pins: sd0 {
145*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
146*4882a593Smuzhiyun		function = "sdhi0";
147*4882a593Smuzhiyun	};
148*4882a593Smuzhiyun	sdhi0_pup_pins: sd0_pup {
149*4882a593Smuzhiyun		groups = "sdhi0_cd", "sdhi0_wp";
150*4882a593Smuzhiyun		function = "sdhi0";
151*4882a593Smuzhiyun		bias-pull-up;
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	hspi0_pins: hspi0 {
155*4882a593Smuzhiyun		groups = "hspi0_a";
156*4882a593Smuzhiyun		function = "hspi0";
157*4882a593Smuzhiyun	};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun	usb0_pins: usb0 {
160*4882a593Smuzhiyun		groups = "usb0";
161*4882a593Smuzhiyun		function = "usb0";
162*4882a593Smuzhiyun	};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun	usb1_pins: usb1 {
165*4882a593Smuzhiyun		groups = "usb1";
166*4882a593Smuzhiyun		function = "usb1";
167*4882a593Smuzhiyun	};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun	vin0_pins: vin0 {
170*4882a593Smuzhiyun		groups = "vin0_data8", "vin0_clk";
171*4882a593Smuzhiyun		function = "vin0";
172*4882a593Smuzhiyun	};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	vin1_pins: vin1 {
175*4882a593Smuzhiyun		groups = "vin1_data8", "vin1_clk";
176*4882a593Smuzhiyun		function = "vin1";
177*4882a593Smuzhiyun	};
178*4882a593Smuzhiyun};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun&rcar_sound {
181*4882a593Smuzhiyun	/* Single DAI */
182*4882a593Smuzhiyun	#sound-dai-cells = <0>;
183*4882a593Smuzhiyun};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun&sdhi0 {
186*4882a593Smuzhiyun	pinctrl-0 = <&sdhi0_pins>, <&sdhi0_pup_pins>;
187*4882a593Smuzhiyun	pinctrl-names = "default";
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun	vmmc-supply = <&fixedregulator3v3>;
190*4882a593Smuzhiyun	bus-width = <4>;
191*4882a593Smuzhiyun	status = "okay";
192*4882a593Smuzhiyun	wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&hspi0 {
196*4882a593Smuzhiyun	pinctrl-0 = <&hspi0_pins>;
197*4882a593Smuzhiyun	pinctrl-names = "default";
198*4882a593Smuzhiyun	status = "okay";
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun	flash: flash@0 {
201*4882a593Smuzhiyun		compatible = "spansion,s25fl008k", "jedec,spi-nor";
202*4882a593Smuzhiyun		reg = <0>;
203*4882a593Smuzhiyun		spi-max-frequency = <104000000>;
204*4882a593Smuzhiyun		m25p,fast-read;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun		partitions {
207*4882a593Smuzhiyun			compatible = "fixed-partitions";
208*4882a593Smuzhiyun			#address-cells = <1>;
209*4882a593Smuzhiyun			#size-cells = <1>;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun			partition@0 {
212*4882a593Smuzhiyun				label = "data(spi)";
213*4882a593Smuzhiyun				reg = <0x00000000 0x00100000>;
214*4882a593Smuzhiyun			};
215*4882a593Smuzhiyun		};
216*4882a593Smuzhiyun	};
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun&scif0 {
220*4882a593Smuzhiyun	pinctrl-0 = <&scif0_pins>;
221*4882a593Smuzhiyun	pinctrl-names = "default";
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun	uart-has-rtscts;
224*4882a593Smuzhiyun	status = "okay";
225*4882a593Smuzhiyun};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun&scif_clk {
228*4882a593Smuzhiyun	clock-frequency = <14745600>;
229*4882a593Smuzhiyun};
230