1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for the r8a77470 SoC 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2018 Renesas Electronics Corp. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 9*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/arm-gic.h> 10*4882a593Smuzhiyun#include <dt-bindings/clock/r8a77470-cpg-mssr.h> 11*4882a593Smuzhiyun#include <dt-bindings/power/r8a77470-sysc.h> 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun compatible = "renesas,r8a77470"; 14*4882a593Smuzhiyun #address-cells = <2>; 15*4882a593Smuzhiyun #size-cells = <2>; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun aliases { 18*4882a593Smuzhiyun i2c0 = &i2c0; 19*4882a593Smuzhiyun i2c1 = &i2c1; 20*4882a593Smuzhiyun i2c2 = &i2c2; 21*4882a593Smuzhiyun i2c3 = &i2c3; 22*4882a593Smuzhiyun i2c4 = &i2c4; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun cpus { 26*4882a593Smuzhiyun #address-cells = <1>; 27*4882a593Smuzhiyun #size-cells = <0>; 28*4882a593Smuzhiyun enable-method = "renesas,apmu"; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun cpu0: cpu@0 { 31*4882a593Smuzhiyun device_type = "cpu"; 32*4882a593Smuzhiyun compatible = "arm,cortex-a7"; 33*4882a593Smuzhiyun reg = <0>; 34*4882a593Smuzhiyun clock-frequency = <1000000000>; 35*4882a593Smuzhiyun clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; 36*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_CA7_CPU0>; 37*4882a593Smuzhiyun next-level-cache = <&L2_CA7>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun cpu1: cpu@1 { 41*4882a593Smuzhiyun device_type = "cpu"; 42*4882a593Smuzhiyun compatible = "arm,cortex-a7"; 43*4882a593Smuzhiyun reg = <1>; 44*4882a593Smuzhiyun clock-frequency = <1000000000>; 45*4882a593Smuzhiyun clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; 46*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_CA7_CPU1>; 47*4882a593Smuzhiyun next-level-cache = <&L2_CA7>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun L2_CA7: cache-controller-0 { 51*4882a593Smuzhiyun compatible = "cache"; 52*4882a593Smuzhiyun cache-unified; 53*4882a593Smuzhiyun cache-level = <2>; 54*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_CA7_SCU>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* External root clock */ 59*4882a593Smuzhiyun extal_clk: extal { 60*4882a593Smuzhiyun compatible = "fixed-clock"; 61*4882a593Smuzhiyun #clock-cells = <0>; 62*4882a593Smuzhiyun /* This value must be overridden by the board. */ 63*4882a593Smuzhiyun clock-frequency = <0>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun pmu { 67*4882a593Smuzhiyun compatible = "arm,cortex-a7-pmu"; 68*4882a593Smuzhiyun interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 69*4882a593Smuzhiyun <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 70*4882a593Smuzhiyun interrupt-affinity = <&cpu0>, <&cpu1>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* External SCIF clock */ 74*4882a593Smuzhiyun scif_clk: scif { 75*4882a593Smuzhiyun compatible = "fixed-clock"; 76*4882a593Smuzhiyun #clock-cells = <0>; 77*4882a593Smuzhiyun /* This value must be overridden by the board. */ 78*4882a593Smuzhiyun clock-frequency = <0>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun soc { 82*4882a593Smuzhiyun compatible = "simple-bus"; 83*4882a593Smuzhiyun interrupt-parent = <&gic>; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #address-cells = <2>; 86*4882a593Smuzhiyun #size-cells = <2>; 87*4882a593Smuzhiyun ranges; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun rwdt: watchdog@e6020000 { 90*4882a593Smuzhiyun compatible = "renesas,r8a77470-wdt", 91*4882a593Smuzhiyun "renesas,rcar-gen2-wdt"; 92*4882a593Smuzhiyun reg = <0 0xe6020000 0 0x0c>; 93*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 402>; 94*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 95*4882a593Smuzhiyun resets = <&cpg 402>; 96*4882a593Smuzhiyun status = "disabled"; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun gpio0: gpio@e6050000 { 100*4882a593Smuzhiyun compatible = "renesas,gpio-r8a77470", 101*4882a593Smuzhiyun "renesas,rcar-gen2-gpio"; 102*4882a593Smuzhiyun reg = <0 0xe6050000 0 0x50>; 103*4882a593Smuzhiyun interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 104*4882a593Smuzhiyun #gpio-cells = <2>; 105*4882a593Smuzhiyun gpio-controller; 106*4882a593Smuzhiyun gpio-ranges = <&pfc 0 0 23>; 107*4882a593Smuzhiyun #interrupt-cells = <2>; 108*4882a593Smuzhiyun interrupt-controller; 109*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 912>; 110*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 111*4882a593Smuzhiyun resets = <&cpg 912>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun gpio1: gpio@e6051000 { 115*4882a593Smuzhiyun compatible = "renesas,gpio-r8a77470", 116*4882a593Smuzhiyun "renesas,rcar-gen2-gpio"; 117*4882a593Smuzhiyun reg = <0 0xe6051000 0 0x50>; 118*4882a593Smuzhiyun interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 119*4882a593Smuzhiyun #gpio-cells = <2>; 120*4882a593Smuzhiyun gpio-controller; 121*4882a593Smuzhiyun gpio-ranges = <&pfc 0 32 23>; 122*4882a593Smuzhiyun #interrupt-cells = <2>; 123*4882a593Smuzhiyun interrupt-controller; 124*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 911>; 125*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 126*4882a593Smuzhiyun resets = <&cpg 911>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun gpio2: gpio@e6052000 { 130*4882a593Smuzhiyun compatible = "renesas,gpio-r8a77470", 131*4882a593Smuzhiyun "renesas,rcar-gen2-gpio"; 132*4882a593Smuzhiyun reg = <0 0xe6052000 0 0x50>; 133*4882a593Smuzhiyun interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 134*4882a593Smuzhiyun #gpio-cells = <2>; 135*4882a593Smuzhiyun gpio-controller; 136*4882a593Smuzhiyun gpio-ranges = <&pfc 0 64 32>; 137*4882a593Smuzhiyun #interrupt-cells = <2>; 138*4882a593Smuzhiyun interrupt-controller; 139*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 910>; 140*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 141*4882a593Smuzhiyun resets = <&cpg 910>; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun gpio3: gpio@e6053000 { 145*4882a593Smuzhiyun compatible = "renesas,gpio-r8a77470", 146*4882a593Smuzhiyun "renesas,rcar-gen2-gpio"; 147*4882a593Smuzhiyun reg = <0 0xe6053000 0 0x50>; 148*4882a593Smuzhiyun interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 149*4882a593Smuzhiyun #gpio-cells = <2>; 150*4882a593Smuzhiyun gpio-controller; 151*4882a593Smuzhiyun gpio-ranges = <&pfc 0 96 30>; 152*4882a593Smuzhiyun gpio-reserved-ranges = <17 10>; 153*4882a593Smuzhiyun #interrupt-cells = <2>; 154*4882a593Smuzhiyun interrupt-controller; 155*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 909>; 156*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 157*4882a593Smuzhiyun resets = <&cpg 909>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun gpio4: gpio@e6054000 { 161*4882a593Smuzhiyun compatible = "renesas,gpio-r8a77470", 162*4882a593Smuzhiyun "renesas,rcar-gen2-gpio"; 163*4882a593Smuzhiyun reg = <0 0xe6054000 0 0x50>; 164*4882a593Smuzhiyun interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 165*4882a593Smuzhiyun #gpio-cells = <2>; 166*4882a593Smuzhiyun gpio-controller; 167*4882a593Smuzhiyun gpio-ranges = <&pfc 0 128 26>; 168*4882a593Smuzhiyun #interrupt-cells = <2>; 169*4882a593Smuzhiyun interrupt-controller; 170*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 908>; 171*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 172*4882a593Smuzhiyun resets = <&cpg 908>; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun gpio5: gpio@e6055000 { 176*4882a593Smuzhiyun compatible = "renesas,gpio-r8a77470", 177*4882a593Smuzhiyun "renesas,rcar-gen2-gpio"; 178*4882a593Smuzhiyun reg = <0 0xe6055000 0 0x50>; 179*4882a593Smuzhiyun interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 180*4882a593Smuzhiyun #gpio-cells = <2>; 181*4882a593Smuzhiyun gpio-controller; 182*4882a593Smuzhiyun gpio-ranges = <&pfc 0 160 32>; 183*4882a593Smuzhiyun #interrupt-cells = <2>; 184*4882a593Smuzhiyun interrupt-controller; 185*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 907>; 186*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 187*4882a593Smuzhiyun resets = <&cpg 907>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun pfc: pinctrl@e6060000 { 191*4882a593Smuzhiyun compatible = "renesas,pfc-r8a77470"; 192*4882a593Smuzhiyun reg = <0 0xe6060000 0 0x118>; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun cpg: clock-controller@e6150000 { 196*4882a593Smuzhiyun compatible = "renesas,r8a77470-cpg-mssr"; 197*4882a593Smuzhiyun reg = <0 0xe6150000 0 0x1000>; 198*4882a593Smuzhiyun clocks = <&extal_clk>, <&usb_extal_clk>; 199*4882a593Smuzhiyun clock-names = "extal", "usb_extal"; 200*4882a593Smuzhiyun #clock-cells = <2>; 201*4882a593Smuzhiyun #power-domain-cells = <0>; 202*4882a593Smuzhiyun #reset-cells = <1>; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun apmu@e6151000 { 206*4882a593Smuzhiyun compatible = "renesas,r8a77470-apmu", "renesas,apmu"; 207*4882a593Smuzhiyun reg = <0 0xe6151000 0 0x188>; 208*4882a593Smuzhiyun cpus = <&cpu0 &cpu1>; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun rst: reset-controller@e6160000 { 212*4882a593Smuzhiyun compatible = "renesas,r8a77470-rst"; 213*4882a593Smuzhiyun reg = <0 0xe6160000 0 0x100>; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun sysc: system-controller@e6180000 { 217*4882a593Smuzhiyun compatible = "renesas,r8a77470-sysc"; 218*4882a593Smuzhiyun reg = <0 0xe6180000 0 0x200>; 219*4882a593Smuzhiyun #power-domain-cells = <1>; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun irqc: interrupt-controller@e61c0000 { 223*4882a593Smuzhiyun compatible = "renesas,irqc-r8a77470", "renesas,irqc"; 224*4882a593Smuzhiyun #interrupt-cells = <2>; 225*4882a593Smuzhiyun interrupt-controller; 226*4882a593Smuzhiyun reg = <0 0xe61c0000 0 0x200>; 227*4882a593Smuzhiyun interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 228*4882a593Smuzhiyun <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 229*4882a593Smuzhiyun <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 230*4882a593Smuzhiyun <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 231*4882a593Smuzhiyun <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 232*4882a593Smuzhiyun <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 233*4882a593Smuzhiyun <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 234*4882a593Smuzhiyun <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 235*4882a593Smuzhiyun <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 236*4882a593Smuzhiyun <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 237*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 407>; 238*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 239*4882a593Smuzhiyun resets = <&cpg 407>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun icram0: sram@e63a0000 { 243*4882a593Smuzhiyun compatible = "mmio-sram"; 244*4882a593Smuzhiyun reg = <0 0xe63a0000 0 0x12000>; 245*4882a593Smuzhiyun #address-cells = <1>; 246*4882a593Smuzhiyun #size-cells = <1>; 247*4882a593Smuzhiyun ranges = <0 0 0xe63a0000 0x12000>; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun icram1: sram@e63c0000 { 251*4882a593Smuzhiyun compatible = "mmio-sram"; 252*4882a593Smuzhiyun reg = <0 0xe63c0000 0 0x1000>; 253*4882a593Smuzhiyun #address-cells = <1>; 254*4882a593Smuzhiyun #size-cells = <1>; 255*4882a593Smuzhiyun ranges = <0 0 0xe63c0000 0x1000>; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun smp-sram@0 { 258*4882a593Smuzhiyun compatible = "renesas,smp-sram"; 259*4882a593Smuzhiyun reg = <0 0x100>; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun icram2: sram@e6300000 { 264*4882a593Smuzhiyun compatible = "mmio-sram"; 265*4882a593Smuzhiyun reg = <0 0xe6300000 0 0x20000>; 266*4882a593Smuzhiyun #address-cells = <1>; 267*4882a593Smuzhiyun #size-cells = <1>; 268*4882a593Smuzhiyun ranges = <0 0 0xe6300000 0x20000>; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun i2c0: i2c@e6508000 { 272*4882a593Smuzhiyun #address-cells = <1>; 273*4882a593Smuzhiyun #size-cells = <0>; 274*4882a593Smuzhiyun compatible = "renesas,i2c-r8a77470", 275*4882a593Smuzhiyun "renesas,rcar-gen2-i2c"; 276*4882a593Smuzhiyun reg = <0 0xe6508000 0 0x40>; 277*4882a593Smuzhiyun interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 278*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 931>; 279*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 280*4882a593Smuzhiyun resets = <&cpg 931>; 281*4882a593Smuzhiyun i2c-scl-internal-delay-ns = <6>; 282*4882a593Smuzhiyun status = "disabled"; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun i2c1: i2c@e6518000 { 286*4882a593Smuzhiyun #address-cells = <1>; 287*4882a593Smuzhiyun #size-cells = <0>; 288*4882a593Smuzhiyun compatible = "renesas,i2c-r8a77470", 289*4882a593Smuzhiyun "renesas,rcar-gen2-i2c"; 290*4882a593Smuzhiyun reg = <0 0xe6518000 0 0x40>; 291*4882a593Smuzhiyun interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 292*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 930>; 293*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 294*4882a593Smuzhiyun resets = <&cpg 930>; 295*4882a593Smuzhiyun i2c-scl-internal-delay-ns = <6>; 296*4882a593Smuzhiyun status = "disabled"; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun i2c2: i2c@e6530000 { 300*4882a593Smuzhiyun #address-cells = <1>; 301*4882a593Smuzhiyun #size-cells = <0>; 302*4882a593Smuzhiyun compatible = "renesas,i2c-r8a77470", 303*4882a593Smuzhiyun "renesas,rcar-gen2-i2c"; 304*4882a593Smuzhiyun reg = <0 0xe6530000 0 0x40>; 305*4882a593Smuzhiyun interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 306*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 929>; 307*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 308*4882a593Smuzhiyun resets = <&cpg 929>; 309*4882a593Smuzhiyun i2c-scl-internal-delay-ns = <6>; 310*4882a593Smuzhiyun status = "disabled"; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun i2c3: i2c@e6540000 { 314*4882a593Smuzhiyun #address-cells = <1>; 315*4882a593Smuzhiyun #size-cells = <0>; 316*4882a593Smuzhiyun compatible = "renesas,i2c-r8a77470", 317*4882a593Smuzhiyun "renesas,rcar-gen2-i2c"; 318*4882a593Smuzhiyun reg = <0 0xe6540000 0 0x40>; 319*4882a593Smuzhiyun interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 320*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 928>; 321*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 322*4882a593Smuzhiyun resets = <&cpg 928>; 323*4882a593Smuzhiyun i2c-scl-internal-delay-ns = <6>; 324*4882a593Smuzhiyun status = "disabled"; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun i2c4: i2c@e6520000 { 328*4882a593Smuzhiyun #address-cells = <1>; 329*4882a593Smuzhiyun #size-cells = <0>; 330*4882a593Smuzhiyun compatible = "renesas,i2c-r8a77470", 331*4882a593Smuzhiyun "renesas,rcar-gen2-i2c"; 332*4882a593Smuzhiyun reg = <0 0xe6520000 0 0x40>; 333*4882a593Smuzhiyun interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 334*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 927>; 335*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 336*4882a593Smuzhiyun resets = <&cpg 927>; 337*4882a593Smuzhiyun i2c-scl-internal-delay-ns = <6>; 338*4882a593Smuzhiyun status = "disabled"; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun hsusb0: hsusb@e6590000 { 342*4882a593Smuzhiyun compatible = "renesas,usbhs-r8a77470", 343*4882a593Smuzhiyun "renesas,rcar-gen2-usbhs"; 344*4882a593Smuzhiyun reg = <0 0xe6590000 0 0x100>; 345*4882a593Smuzhiyun interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 346*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 704>; 347*4882a593Smuzhiyun dmas = <&usb_dmac00 0>, <&usb_dmac00 1>, 348*4882a593Smuzhiyun <&usb_dmac10 0>, <&usb_dmac10 1>; 349*4882a593Smuzhiyun dma-names = "ch0", "ch1", "ch2", "ch3"; 350*4882a593Smuzhiyun renesas,buswait = <4>; 351*4882a593Smuzhiyun phys = <&usb0 1>; 352*4882a593Smuzhiyun phy-names = "usb"; 353*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 354*4882a593Smuzhiyun resets = <&cpg 704>; 355*4882a593Smuzhiyun status = "disabled"; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun usbphy0: usb-phy@e6590100 { 359*4882a593Smuzhiyun compatible = "renesas,usb-phy-r8a77470", 360*4882a593Smuzhiyun "renesas,rcar-gen2-usb-phy"; 361*4882a593Smuzhiyun reg = <0 0xe6590100 0 0x100>; 362*4882a593Smuzhiyun #address-cells = <1>; 363*4882a593Smuzhiyun #size-cells = <0>; 364*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 704>; 365*4882a593Smuzhiyun clock-names = "usbhs"; 366*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 367*4882a593Smuzhiyun resets = <&cpg 704>; 368*4882a593Smuzhiyun status = "disabled"; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun usb0: usb-channel@0 { 371*4882a593Smuzhiyun reg = <0>; 372*4882a593Smuzhiyun #phy-cells = <1>; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun hsusb1: hsusb@e6598000 { 377*4882a593Smuzhiyun compatible = "renesas,usbhs-r8a77470", 378*4882a593Smuzhiyun "renesas,rcar-gen2-usbhs"; 379*4882a593Smuzhiyun reg = <0 0xe6598000 0 0x100>; 380*4882a593Smuzhiyun interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 381*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 706>; 382*4882a593Smuzhiyun dmas = <&usb_dmac01 0>, <&usb_dmac01 1>, 383*4882a593Smuzhiyun <&usb_dmac11 0>, <&usb_dmac11 1>; 384*4882a593Smuzhiyun dma-names = "ch0", "ch1", "ch2", "ch3"; 385*4882a593Smuzhiyun renesas,buswait = <4>; 386*4882a593Smuzhiyun /* We need to turn on usbphy0 to make usbphy1 to work */ 387*4882a593Smuzhiyun phys = <&usb1 1>; 388*4882a593Smuzhiyun phy-names = "usb"; 389*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 390*4882a593Smuzhiyun resets = <&cpg 706>; 391*4882a593Smuzhiyun status = "disabled"; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun usbphy1: usb-phy@e6598100 { 395*4882a593Smuzhiyun compatible = "renesas,usb-phy-r8a77470", 396*4882a593Smuzhiyun "renesas,rcar-gen2-usb-phy"; 397*4882a593Smuzhiyun reg = <0 0xe6598100 0 0x100>; 398*4882a593Smuzhiyun #address-cells = <1>; 399*4882a593Smuzhiyun #size-cells = <0>; 400*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 706>; 401*4882a593Smuzhiyun clock-names = "usbhs"; 402*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 403*4882a593Smuzhiyun resets = <&cpg 706>; 404*4882a593Smuzhiyun status = "disabled"; 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun usb1: usb-channel@0 { 407*4882a593Smuzhiyun reg = <0>; 408*4882a593Smuzhiyun #phy-cells = <1>; 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun usb_dmac00: dma-controller@e65a0000 { 413*4882a593Smuzhiyun compatible = "renesas,r8a77470-usb-dmac", 414*4882a593Smuzhiyun "renesas,usb-dmac"; 415*4882a593Smuzhiyun reg = <0 0xe65a0000 0 0x100>; 416*4882a593Smuzhiyun interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 417*4882a593Smuzhiyun <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 418*4882a593Smuzhiyun interrupt-names = "ch0", "ch1"; 419*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 330>; 420*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 421*4882a593Smuzhiyun resets = <&cpg 330>; 422*4882a593Smuzhiyun #dma-cells = <1>; 423*4882a593Smuzhiyun dma-channels = <2>; 424*4882a593Smuzhiyun }; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun usb_dmac10: dma-controller@e65b0000 { 427*4882a593Smuzhiyun compatible = "renesas,r8a77470-usb-dmac", 428*4882a593Smuzhiyun "renesas,usb-dmac"; 429*4882a593Smuzhiyun reg = <0 0xe65b0000 0 0x100>; 430*4882a593Smuzhiyun interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 431*4882a593Smuzhiyun <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 432*4882a593Smuzhiyun interrupt-names = "ch0", "ch1"; 433*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 331>; 434*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 435*4882a593Smuzhiyun resets = <&cpg 331>; 436*4882a593Smuzhiyun #dma-cells = <1>; 437*4882a593Smuzhiyun dma-channels = <2>; 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun usb_dmac01: dma-controller@e65a8000 { 441*4882a593Smuzhiyun compatible = "renesas,r8a77470-usb-dmac", 442*4882a593Smuzhiyun "renesas,usb-dmac"; 443*4882a593Smuzhiyun reg = <0 0xe65a8000 0 0x100>; 444*4882a593Smuzhiyun interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 445*4882a593Smuzhiyun <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>; 446*4882a593Smuzhiyun interrupt-names = "ch0", "ch1"; 447*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 326>; 448*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 449*4882a593Smuzhiyun resets = <&cpg 326>; 450*4882a593Smuzhiyun #dma-cells = <1>; 451*4882a593Smuzhiyun dma-channels = <2>; 452*4882a593Smuzhiyun }; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun usb_dmac11: dma-controller@e65b8000 { 455*4882a593Smuzhiyun compatible = "renesas,r8a77470-usb-dmac", 456*4882a593Smuzhiyun "renesas,usb-dmac"; 457*4882a593Smuzhiyun reg = <0 0xe65b8000 0 0x100>; 458*4882a593Smuzhiyun interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 459*4882a593Smuzhiyun <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>; 460*4882a593Smuzhiyun interrupt-names = "ch0", "ch1"; 461*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 327>; 462*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 463*4882a593Smuzhiyun resets = <&cpg 327>; 464*4882a593Smuzhiyun #dma-cells = <1>; 465*4882a593Smuzhiyun dma-channels = <2>; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun dmac0: dma-controller@e6700000 { 469*4882a593Smuzhiyun compatible = "renesas,dmac-r8a77470", 470*4882a593Smuzhiyun "renesas,rcar-dmac"; 471*4882a593Smuzhiyun reg = <0 0xe6700000 0 0x20000>; 472*4882a593Smuzhiyun interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 473*4882a593Smuzhiyun <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 474*4882a593Smuzhiyun <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 475*4882a593Smuzhiyun <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 476*4882a593Smuzhiyun <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 477*4882a593Smuzhiyun <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 478*4882a593Smuzhiyun <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 479*4882a593Smuzhiyun <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 480*4882a593Smuzhiyun <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 481*4882a593Smuzhiyun <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 482*4882a593Smuzhiyun <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 483*4882a593Smuzhiyun <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 484*4882a593Smuzhiyun <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 485*4882a593Smuzhiyun <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 486*4882a593Smuzhiyun <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 487*4882a593Smuzhiyun <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 488*4882a593Smuzhiyun interrupt-names = "error", 489*4882a593Smuzhiyun "ch0", "ch1", "ch2", "ch3", 490*4882a593Smuzhiyun "ch4", "ch5", "ch6", "ch7", 491*4882a593Smuzhiyun "ch8", "ch9", "ch10", "ch11", 492*4882a593Smuzhiyun "ch12", "ch13", "ch14"; 493*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 219>; 494*4882a593Smuzhiyun clock-names = "fck"; 495*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 496*4882a593Smuzhiyun resets = <&cpg 219>; 497*4882a593Smuzhiyun #dma-cells = <1>; 498*4882a593Smuzhiyun dma-channels = <15>; 499*4882a593Smuzhiyun }; 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun dmac1: dma-controller@e6720000 { 502*4882a593Smuzhiyun compatible = "renesas,dmac-r8a77470", 503*4882a593Smuzhiyun "renesas,rcar-dmac"; 504*4882a593Smuzhiyun reg = <0 0xe6720000 0 0x20000>; 505*4882a593Smuzhiyun interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 506*4882a593Smuzhiyun <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 507*4882a593Smuzhiyun <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 508*4882a593Smuzhiyun <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 509*4882a593Smuzhiyun <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 510*4882a593Smuzhiyun <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 511*4882a593Smuzhiyun <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 512*4882a593Smuzhiyun <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 513*4882a593Smuzhiyun <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 514*4882a593Smuzhiyun <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 515*4882a593Smuzhiyun <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 516*4882a593Smuzhiyun <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 517*4882a593Smuzhiyun <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 518*4882a593Smuzhiyun <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 519*4882a593Smuzhiyun <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 520*4882a593Smuzhiyun <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 521*4882a593Smuzhiyun interrupt-names = "error", 522*4882a593Smuzhiyun "ch0", "ch1", "ch2", "ch3", 523*4882a593Smuzhiyun "ch4", "ch5", "ch6", "ch7", 524*4882a593Smuzhiyun "ch8", "ch9", "ch10", "ch11", 525*4882a593Smuzhiyun "ch12", "ch13", "ch14"; 526*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 218>; 527*4882a593Smuzhiyun clock-names = "fck"; 528*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 529*4882a593Smuzhiyun resets = <&cpg 218>; 530*4882a593Smuzhiyun #dma-cells = <1>; 531*4882a593Smuzhiyun dma-channels = <15>; 532*4882a593Smuzhiyun }; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun avb: ethernet@e6800000 { 535*4882a593Smuzhiyun compatible = "renesas,etheravb-r8a77470", 536*4882a593Smuzhiyun "renesas,etheravb-rcar-gen2"; 537*4882a593Smuzhiyun reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 538*4882a593Smuzhiyun interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 539*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 812>; 540*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 541*4882a593Smuzhiyun resets = <&cpg 812>; 542*4882a593Smuzhiyun #address-cells = <1>; 543*4882a593Smuzhiyun #size-cells = <0>; 544*4882a593Smuzhiyun status = "disabled"; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun qspi0: spi@e6b10000 { 548*4882a593Smuzhiyun compatible = "renesas,qspi-r8a77470", "renesas,qspi"; 549*4882a593Smuzhiyun reg = <0 0xe6b10000 0 0x2c>; 550*4882a593Smuzhiyun interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 551*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 918>; 552*4882a593Smuzhiyun dmas = <&dmac0 0x17>, <&dmac0 0x18>, 553*4882a593Smuzhiyun <&dmac1 0x17>, <&dmac1 0x18>; 554*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 555*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 556*4882a593Smuzhiyun num-cs = <1>; 557*4882a593Smuzhiyun #address-cells = <1>; 558*4882a593Smuzhiyun #size-cells = <0>; 559*4882a593Smuzhiyun resets = <&cpg 918>; 560*4882a593Smuzhiyun status = "disabled"; 561*4882a593Smuzhiyun }; 562*4882a593Smuzhiyun 563*4882a593Smuzhiyun qspi1: spi@ee200000 { 564*4882a593Smuzhiyun compatible = "renesas,qspi-r8a77470", "renesas,qspi"; 565*4882a593Smuzhiyun reg = <0 0xee200000 0 0x2c>; 566*4882a593Smuzhiyun interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 567*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 917>; 568*4882a593Smuzhiyun dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 569*4882a593Smuzhiyun <&dmac1 0xd1>, <&dmac1 0xd2>; 570*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 571*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 572*4882a593Smuzhiyun num-cs = <1>; 573*4882a593Smuzhiyun #address-cells = <1>; 574*4882a593Smuzhiyun #size-cells = <0>; 575*4882a593Smuzhiyun resets = <&cpg 917>; 576*4882a593Smuzhiyun status = "disabled"; 577*4882a593Smuzhiyun }; 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun scif0: serial@e6e60000 { 580*4882a593Smuzhiyun compatible = "renesas,scif-r8a77470", 581*4882a593Smuzhiyun "renesas,rcar-gen2-scif", "renesas,scif"; 582*4882a593Smuzhiyun reg = <0 0xe6e60000 0 0x40>; 583*4882a593Smuzhiyun interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 584*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 721>, 585*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 586*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 587*4882a593Smuzhiyun dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 588*4882a593Smuzhiyun <&dmac1 0x29>, <&dmac1 0x2a>; 589*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 590*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 591*4882a593Smuzhiyun resets = <&cpg 721>; 592*4882a593Smuzhiyun status = "disabled"; 593*4882a593Smuzhiyun }; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun scif1: serial@e6e68000 { 596*4882a593Smuzhiyun compatible = "renesas,scif-r8a77470", 597*4882a593Smuzhiyun "renesas,rcar-gen2-scif", "renesas,scif"; 598*4882a593Smuzhiyun reg = <0 0xe6e68000 0 0x40>; 599*4882a593Smuzhiyun interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 600*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 720>, 601*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 602*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 603*4882a593Smuzhiyun dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 604*4882a593Smuzhiyun <&dmac1 0x2d>, <&dmac1 0x2e>; 605*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 606*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 607*4882a593Smuzhiyun resets = <&cpg 720>; 608*4882a593Smuzhiyun status = "disabled"; 609*4882a593Smuzhiyun }; 610*4882a593Smuzhiyun 611*4882a593Smuzhiyun scif2: serial@e6e58000 { 612*4882a593Smuzhiyun compatible = "renesas,scif-r8a77470", 613*4882a593Smuzhiyun "renesas,rcar-gen2-scif", "renesas,scif"; 614*4882a593Smuzhiyun reg = <0 0xe6e58000 0 0x40>; 615*4882a593Smuzhiyun interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 616*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 719>, 617*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 618*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 619*4882a593Smuzhiyun dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 620*4882a593Smuzhiyun <&dmac1 0x2b>, <&dmac1 0x2c>; 621*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 622*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 623*4882a593Smuzhiyun resets = <&cpg 719>; 624*4882a593Smuzhiyun status = "disabled"; 625*4882a593Smuzhiyun }; 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun scif3: serial@e6ea8000 { 628*4882a593Smuzhiyun compatible = "renesas,scif-r8a77470", 629*4882a593Smuzhiyun "renesas,rcar-gen2-scif", "renesas,scif"; 630*4882a593Smuzhiyun reg = <0 0xe6ea8000 0 0x40>; 631*4882a593Smuzhiyun interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 632*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 718>, 633*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 634*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 635*4882a593Smuzhiyun dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 636*4882a593Smuzhiyun <&dmac1 0x2f>, <&dmac1 0x30>; 637*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 638*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 639*4882a593Smuzhiyun resets = <&cpg 718>; 640*4882a593Smuzhiyun status = "disabled"; 641*4882a593Smuzhiyun }; 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun scif4: serial@e6ee0000 { 644*4882a593Smuzhiyun compatible = "renesas,scif-r8a77470", 645*4882a593Smuzhiyun "renesas,rcar-gen2-scif", "renesas,scif"; 646*4882a593Smuzhiyun reg = <0 0xe6ee0000 0 0x40>; 647*4882a593Smuzhiyun interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 648*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 715>, 649*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 650*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 651*4882a593Smuzhiyun dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 652*4882a593Smuzhiyun <&dmac1 0xfb>, <&dmac1 0xfc>; 653*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 654*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 655*4882a593Smuzhiyun resets = <&cpg 715>; 656*4882a593Smuzhiyun status = "disabled"; 657*4882a593Smuzhiyun }; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun scif5: serial@e6ee8000 { 660*4882a593Smuzhiyun compatible = "renesas,scif-r8a77470", 661*4882a593Smuzhiyun "renesas,rcar-gen2-scif", "renesas,scif"; 662*4882a593Smuzhiyun reg = <0 0xe6ee8000 0 0x40>; 663*4882a593Smuzhiyun interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 664*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 714>, 665*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 666*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 667*4882a593Smuzhiyun dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 668*4882a593Smuzhiyun <&dmac1 0xfd>, <&dmac1 0xfe>; 669*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 670*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 671*4882a593Smuzhiyun resets = <&cpg 714>; 672*4882a593Smuzhiyun status = "disabled"; 673*4882a593Smuzhiyun }; 674*4882a593Smuzhiyun 675*4882a593Smuzhiyun hscif0: serial@e62c0000 { 676*4882a593Smuzhiyun compatible = "renesas,hscif-r8a77470", 677*4882a593Smuzhiyun "renesas,rcar-gen2-hscif", "renesas,hscif"; 678*4882a593Smuzhiyun reg = <0 0xe62c0000 0 0x60>; 679*4882a593Smuzhiyun interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 680*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 717>, 681*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 682*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 683*4882a593Smuzhiyun dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 684*4882a593Smuzhiyun <&dmac1 0x39>, <&dmac1 0x3a>; 685*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 686*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 687*4882a593Smuzhiyun resets = <&cpg 717>; 688*4882a593Smuzhiyun status = "disabled"; 689*4882a593Smuzhiyun }; 690*4882a593Smuzhiyun 691*4882a593Smuzhiyun hscif1: serial@e62c8000 { 692*4882a593Smuzhiyun compatible = "renesas,hscif-r8a77470", 693*4882a593Smuzhiyun "renesas,rcar-gen2-hscif", "renesas,hscif"; 694*4882a593Smuzhiyun reg = <0 0xe62c8000 0 0x60>; 695*4882a593Smuzhiyun interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 696*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 716>, 697*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 698*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 699*4882a593Smuzhiyun dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 700*4882a593Smuzhiyun <&dmac1 0x4d>, <&dmac1 0x4e>; 701*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 702*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 703*4882a593Smuzhiyun resets = <&cpg 716>; 704*4882a593Smuzhiyun status = "disabled"; 705*4882a593Smuzhiyun }; 706*4882a593Smuzhiyun 707*4882a593Smuzhiyun hscif2: serial@e62d0000 { 708*4882a593Smuzhiyun compatible = "renesas,hscif-r8a77470", 709*4882a593Smuzhiyun "renesas,rcar-gen2-hscif", "renesas,hscif"; 710*4882a593Smuzhiyun reg = <0 0xe62d0000 0 0x60>; 711*4882a593Smuzhiyun interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 712*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 713>, 713*4882a593Smuzhiyun <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 714*4882a593Smuzhiyun clock-names = "fck", "brg_int", "scif_clk"; 715*4882a593Smuzhiyun dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 716*4882a593Smuzhiyun <&dmac1 0x3b>, <&dmac1 0x3c>; 717*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 718*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 719*4882a593Smuzhiyun resets = <&cpg 713>; 720*4882a593Smuzhiyun status = "disabled"; 721*4882a593Smuzhiyun }; 722*4882a593Smuzhiyun 723*4882a593Smuzhiyun pwm0: pwm@e6e30000 { 724*4882a593Smuzhiyun compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 725*4882a593Smuzhiyun reg = <0 0xe6e30000 0 0x8>; 726*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 523>; 727*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 728*4882a593Smuzhiyun resets = <&cpg 523>; 729*4882a593Smuzhiyun #pwm-cells = <2>; 730*4882a593Smuzhiyun status = "disabled"; 731*4882a593Smuzhiyun }; 732*4882a593Smuzhiyun 733*4882a593Smuzhiyun pwm1: pwm@e6e31000 { 734*4882a593Smuzhiyun compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 735*4882a593Smuzhiyun reg = <0 0xe6e31000 0 0x8>; 736*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 523>; 737*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 738*4882a593Smuzhiyun resets = <&cpg 523>; 739*4882a593Smuzhiyun #pwm-cells = <2>; 740*4882a593Smuzhiyun status = "disabled"; 741*4882a593Smuzhiyun }; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun pwm2: pwm@e6e32000 { 744*4882a593Smuzhiyun compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 745*4882a593Smuzhiyun reg = <0 0xe6e32000 0 0x8>; 746*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 523>; 747*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 748*4882a593Smuzhiyun resets = <&cpg 523>; 749*4882a593Smuzhiyun #pwm-cells = <2>; 750*4882a593Smuzhiyun status = "disabled"; 751*4882a593Smuzhiyun }; 752*4882a593Smuzhiyun 753*4882a593Smuzhiyun pwm3: pwm@e6e33000 { 754*4882a593Smuzhiyun compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 755*4882a593Smuzhiyun reg = <0 0xe6e33000 0 0x8>; 756*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 523>; 757*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 758*4882a593Smuzhiyun resets = <&cpg 523>; 759*4882a593Smuzhiyun #pwm-cells = <2>; 760*4882a593Smuzhiyun status = "disabled"; 761*4882a593Smuzhiyun }; 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun pwm4: pwm@e6e34000 { 764*4882a593Smuzhiyun compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 765*4882a593Smuzhiyun reg = <0 0xe6e34000 0 0x8>; 766*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 523>; 767*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 768*4882a593Smuzhiyun resets = <&cpg 523>; 769*4882a593Smuzhiyun #pwm-cells = <2>; 770*4882a593Smuzhiyun status = "disabled"; 771*4882a593Smuzhiyun }; 772*4882a593Smuzhiyun 773*4882a593Smuzhiyun pwm5: pwm@e6e35000 { 774*4882a593Smuzhiyun compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 775*4882a593Smuzhiyun reg = <0 0xe6e35000 0 0x8>; 776*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 523>; 777*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 778*4882a593Smuzhiyun resets = <&cpg 523>; 779*4882a593Smuzhiyun #pwm-cells = <2>; 780*4882a593Smuzhiyun status = "disabled"; 781*4882a593Smuzhiyun }; 782*4882a593Smuzhiyun 783*4882a593Smuzhiyun pwm6: pwm@e6e36000 { 784*4882a593Smuzhiyun compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 785*4882a593Smuzhiyun reg = <0 0xe6e36000 0 0x8>; 786*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 523>; 787*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 788*4882a593Smuzhiyun resets = <&cpg 523>; 789*4882a593Smuzhiyun #pwm-cells = <2>; 790*4882a593Smuzhiyun status = "disabled"; 791*4882a593Smuzhiyun }; 792*4882a593Smuzhiyun 793*4882a593Smuzhiyun vin0: video@e6ef0000 { 794*4882a593Smuzhiyun compatible = "renesas,vin-r8a77470", 795*4882a593Smuzhiyun "renesas,rcar-gen2-vin"; 796*4882a593Smuzhiyun reg = <0 0xe6ef0000 0 0x1000>; 797*4882a593Smuzhiyun interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 798*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 811>; 799*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 800*4882a593Smuzhiyun resets = <&cpg 811>; 801*4882a593Smuzhiyun status = "disabled"; 802*4882a593Smuzhiyun }; 803*4882a593Smuzhiyun 804*4882a593Smuzhiyun vin1: video@e6ef1000 { 805*4882a593Smuzhiyun compatible = "renesas,vin-r8a77470", 806*4882a593Smuzhiyun "renesas,rcar-gen2-vin"; 807*4882a593Smuzhiyun reg = <0 0xe6ef1000 0 0x1000>; 808*4882a593Smuzhiyun interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 809*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 810>; 810*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 811*4882a593Smuzhiyun resets = <&cpg 810>; 812*4882a593Smuzhiyun status = "disabled"; 813*4882a593Smuzhiyun }; 814*4882a593Smuzhiyun 815*4882a593Smuzhiyun ohci0: usb@ee080000 { 816*4882a593Smuzhiyun compatible = "generic-ohci"; 817*4882a593Smuzhiyun reg = <0 0xee080000 0 0x100>; 818*4882a593Smuzhiyun interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 819*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 703>; 820*4882a593Smuzhiyun phys = <&usb0 0>, <&usb2_phy0>; 821*4882a593Smuzhiyun phy-names = "usb"; 822*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 823*4882a593Smuzhiyun resets = <&cpg 703>; 824*4882a593Smuzhiyun status = "disabled"; 825*4882a593Smuzhiyun }; 826*4882a593Smuzhiyun 827*4882a593Smuzhiyun ehci0: usb@ee080100 { 828*4882a593Smuzhiyun compatible = "generic-ehci"; 829*4882a593Smuzhiyun reg = <0 0xee080100 0 0x100>; 830*4882a593Smuzhiyun interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 831*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 703>; 832*4882a593Smuzhiyun phys = <&usb0 0>, <&usb2_phy0>; 833*4882a593Smuzhiyun phy-names = "usb"; 834*4882a593Smuzhiyun companion = <&ohci0>; 835*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 836*4882a593Smuzhiyun resets = <&cpg 703>; 837*4882a593Smuzhiyun status = "disabled"; 838*4882a593Smuzhiyun }; 839*4882a593Smuzhiyun 840*4882a593Smuzhiyun usb2_phy0: usb-phy@ee080200 { 841*4882a593Smuzhiyun compatible = "renesas,usb2-phy-r8a77470"; 842*4882a593Smuzhiyun reg = <0 0xee080200 0 0x700>; 843*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 703>; 844*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 845*4882a593Smuzhiyun resets = <&cpg 703>; 846*4882a593Smuzhiyun #phy-cells = <0>; 847*4882a593Smuzhiyun status = "disabled"; 848*4882a593Smuzhiyun }; 849*4882a593Smuzhiyun 850*4882a593Smuzhiyun ohci1: usb@ee0c0000 { 851*4882a593Smuzhiyun compatible = "generic-ohci"; 852*4882a593Smuzhiyun reg = <0 0xee0c0000 0 0x100>; 853*4882a593Smuzhiyun interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 854*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 705>; 855*4882a593Smuzhiyun phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; 856*4882a593Smuzhiyun phy-names = "usb"; 857*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 858*4882a593Smuzhiyun resets = <&cpg 705>; 859*4882a593Smuzhiyun status = "disabled"; 860*4882a593Smuzhiyun }; 861*4882a593Smuzhiyun 862*4882a593Smuzhiyun ehci1: usb@ee0c0100 { 863*4882a593Smuzhiyun compatible = "generic-ehci"; 864*4882a593Smuzhiyun reg = <0 0xee0c0100 0 0x100>; 865*4882a593Smuzhiyun interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 866*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 705>; 867*4882a593Smuzhiyun phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; 868*4882a593Smuzhiyun phy-names = "usb"; 869*4882a593Smuzhiyun companion = <&ohci1>; 870*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 871*4882a593Smuzhiyun resets = <&cpg 705>; 872*4882a593Smuzhiyun status = "disabled"; 873*4882a593Smuzhiyun }; 874*4882a593Smuzhiyun 875*4882a593Smuzhiyun usb2_phy1: usb-phy@ee0c0200 { 876*4882a593Smuzhiyun compatible = "renesas,usb2-phy-r8a77470"; 877*4882a593Smuzhiyun reg = <0 0xee0c0200 0 0x700>; 878*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 705>; 879*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 880*4882a593Smuzhiyun resets = <&cpg 705>; 881*4882a593Smuzhiyun #phy-cells = <0>; 882*4882a593Smuzhiyun status = "disabled"; 883*4882a593Smuzhiyun }; 884*4882a593Smuzhiyun 885*4882a593Smuzhiyun sdhi0: mmc@ee100000 { 886*4882a593Smuzhiyun compatible = "renesas,sdhi-r8a77470", 887*4882a593Smuzhiyun "renesas,rcar-gen2-sdhi"; 888*4882a593Smuzhiyun reg = <0 0xee100000 0 0x328>; 889*4882a593Smuzhiyun interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 890*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 314>; 891*4882a593Smuzhiyun dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 892*4882a593Smuzhiyun <&dmac1 0xcd>, <&dmac1 0xce>; 893*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 894*4882a593Smuzhiyun max-frequency = <156000000>; 895*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 896*4882a593Smuzhiyun resets = <&cpg 314>; 897*4882a593Smuzhiyun status = "disabled"; 898*4882a593Smuzhiyun }; 899*4882a593Smuzhiyun 900*4882a593Smuzhiyun sdhi1: mmc@ee300000 { 901*4882a593Smuzhiyun compatible = "renesas,sdhi-mmc-r8a77470"; 902*4882a593Smuzhiyun reg = <0 0xee300000 0 0x2000>; 903*4882a593Smuzhiyun interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 904*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 313>; 905*4882a593Smuzhiyun max-frequency = <156000000>; 906*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 907*4882a593Smuzhiyun resets = <&cpg 313>; 908*4882a593Smuzhiyun status = "disabled"; 909*4882a593Smuzhiyun }; 910*4882a593Smuzhiyun 911*4882a593Smuzhiyun sdhi2: mmc@ee160000 { 912*4882a593Smuzhiyun compatible = "renesas,sdhi-r8a77470", 913*4882a593Smuzhiyun "renesas,rcar-gen2-sdhi"; 914*4882a593Smuzhiyun reg = <0 0xee160000 0 0x328>; 915*4882a593Smuzhiyun interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 916*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 312>; 917*4882a593Smuzhiyun dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 918*4882a593Smuzhiyun <&dmac1 0xd3>, <&dmac1 0xd4>; 919*4882a593Smuzhiyun dma-names = "tx", "rx", "tx", "rx"; 920*4882a593Smuzhiyun max-frequency = <78000000>; 921*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 922*4882a593Smuzhiyun resets = <&cpg 312>; 923*4882a593Smuzhiyun status = "disabled"; 924*4882a593Smuzhiyun }; 925*4882a593Smuzhiyun 926*4882a593Smuzhiyun gic: interrupt-controller@f1001000 { 927*4882a593Smuzhiyun compatible = "arm,gic-400"; 928*4882a593Smuzhiyun #interrupt-cells = <3>; 929*4882a593Smuzhiyun #address-cells = <0>; 930*4882a593Smuzhiyun interrupt-controller; 931*4882a593Smuzhiyun reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 932*4882a593Smuzhiyun <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 933*4882a593Smuzhiyun interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 934*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 408>; 935*4882a593Smuzhiyun clock-names = "clk"; 936*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 937*4882a593Smuzhiyun resets = <&cpg 408>; 938*4882a593Smuzhiyun }; 939*4882a593Smuzhiyun 940*4882a593Smuzhiyun du: display@feb00000 { 941*4882a593Smuzhiyun compatible = "renesas,du-r8a77470"; 942*4882a593Smuzhiyun reg = <0 0xfeb00000 0 0x40000>; 943*4882a593Smuzhiyun interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 944*4882a593Smuzhiyun <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 945*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 946*4882a593Smuzhiyun clock-names = "du.0", "du.1"; 947*4882a593Smuzhiyun resets = <&cpg 724>; 948*4882a593Smuzhiyun reset-names = "du.0"; 949*4882a593Smuzhiyun status = "disabled"; 950*4882a593Smuzhiyun 951*4882a593Smuzhiyun ports { 952*4882a593Smuzhiyun #address-cells = <1>; 953*4882a593Smuzhiyun #size-cells = <0>; 954*4882a593Smuzhiyun 955*4882a593Smuzhiyun port@0 { 956*4882a593Smuzhiyun reg = <0>; 957*4882a593Smuzhiyun du_out_rgb0: endpoint { 958*4882a593Smuzhiyun }; 959*4882a593Smuzhiyun }; 960*4882a593Smuzhiyun port@1 { 961*4882a593Smuzhiyun reg = <1>; 962*4882a593Smuzhiyun du_out_rgb1: endpoint { 963*4882a593Smuzhiyun }; 964*4882a593Smuzhiyun }; 965*4882a593Smuzhiyun port@2 { 966*4882a593Smuzhiyun reg = <2>; 967*4882a593Smuzhiyun du_out_lvds0: endpoint { 968*4882a593Smuzhiyun }; 969*4882a593Smuzhiyun }; 970*4882a593Smuzhiyun }; 971*4882a593Smuzhiyun }; 972*4882a593Smuzhiyun 973*4882a593Smuzhiyun prr: chipid@ff000044 { 974*4882a593Smuzhiyun compatible = "renesas,prr"; 975*4882a593Smuzhiyun reg = <0 0xff000044 0 4>; 976*4882a593Smuzhiyun }; 977*4882a593Smuzhiyun 978*4882a593Smuzhiyun cmt0: timer@ffca0000 { 979*4882a593Smuzhiyun compatible = "renesas,r8a77470-cmt0", 980*4882a593Smuzhiyun "renesas,rcar-gen2-cmt0"; 981*4882a593Smuzhiyun reg = <0 0xffca0000 0 0x1004>; 982*4882a593Smuzhiyun interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 983*4882a593Smuzhiyun <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 984*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 124>; 985*4882a593Smuzhiyun clock-names = "fck"; 986*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 987*4882a593Smuzhiyun resets = <&cpg 124>; 988*4882a593Smuzhiyun status = "disabled"; 989*4882a593Smuzhiyun }; 990*4882a593Smuzhiyun 991*4882a593Smuzhiyun cmt1: timer@e6130000 { 992*4882a593Smuzhiyun compatible = "renesas,r8a77470-cmt1", 993*4882a593Smuzhiyun "renesas,rcar-gen2-cmt1"; 994*4882a593Smuzhiyun reg = <0 0xe6130000 0 0x1004>; 995*4882a593Smuzhiyun interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 996*4882a593Smuzhiyun <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 997*4882a593Smuzhiyun <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 998*4882a593Smuzhiyun <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 999*4882a593Smuzhiyun <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1000*4882a593Smuzhiyun <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1001*4882a593Smuzhiyun <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1002*4882a593Smuzhiyun <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1003*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 329>; 1004*4882a593Smuzhiyun clock-names = "fck"; 1005*4882a593Smuzhiyun power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 1006*4882a593Smuzhiyun resets = <&cpg 329>; 1007*4882a593Smuzhiyun status = "disabled"; 1008*4882a593Smuzhiyun }; 1009*4882a593Smuzhiyun }; 1010*4882a593Smuzhiyun 1011*4882a593Smuzhiyun timer { 1012*4882a593Smuzhiyun compatible = "arm,armv7-timer"; 1013*4882a593Smuzhiyun interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1014*4882a593Smuzhiyun <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1015*4882a593Smuzhiyun <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1016*4882a593Smuzhiyun <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1017*4882a593Smuzhiyun }; 1018*4882a593Smuzhiyun 1019*4882a593Smuzhiyun /* External USB clock - can be overridden by the board */ 1020*4882a593Smuzhiyun usb_extal_clk: usb_extal { 1021*4882a593Smuzhiyun compatible = "fixed-clock"; 1022*4882a593Smuzhiyun #clock-cells = <0>; 1023*4882a593Smuzhiyun clock-frequency = <48000000>; 1024*4882a593Smuzhiyun }; 1025*4882a593Smuzhiyun}; 1026