xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Source for the iWave-RZ/G1C single board computer
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2018 Renesas Electronics Corp.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include "r8a77470.dtsi"
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "iWave iW-RainboW-G23S single board computer based on RZ/G1C";
13*4882a593Smuzhiyun	compatible = "iwave,g23s", "renesas,r8a77470";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	aliases {
16*4882a593Smuzhiyun		ethernet0 = &avb;
17*4882a593Smuzhiyun		serial1 = &scif1;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	chosen {
21*4882a593Smuzhiyun		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
22*4882a593Smuzhiyun		stdout-path = "serial1:115200n8";
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	hdmi-out {
26*4882a593Smuzhiyun		compatible = "hdmi-connector";
27*4882a593Smuzhiyun		type = "a";
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		port {
30*4882a593Smuzhiyun			hdmi_con: endpoint {
31*4882a593Smuzhiyun				remote-endpoint = <&bridge_out>;
32*4882a593Smuzhiyun			};
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	memory@40000000 {
37*4882a593Smuzhiyun		device_type = "memory";
38*4882a593Smuzhiyun		reg = <0 0x40000000 0 0x20000000>;
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	reg_1p8v: reg-1p8v {
42*4882a593Smuzhiyun		compatible = "regulator-fixed";
43*4882a593Smuzhiyun		regulator-name = "fixed-1.8V";
44*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
45*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
46*4882a593Smuzhiyun		regulator-boot-on;
47*4882a593Smuzhiyun		regulator-always-on;
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	reg_3p3v: reg-3p3v {
51*4882a593Smuzhiyun		compatible = "regulator-fixed";
52*4882a593Smuzhiyun		regulator-name = "fixed-3.3V";
53*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
54*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
55*4882a593Smuzhiyun		regulator-boot-on;
56*4882a593Smuzhiyun		regulator-always-on;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	vccq_sdhi2: regulator-vccq-sdhi2 {
60*4882a593Smuzhiyun		compatible = "regulator-gpio";
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		regulator-name = "SDHI2 VccQ";
63*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
64*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
67*4882a593Smuzhiyun		gpios-states = <1>;
68*4882a593Smuzhiyun		states = <3300000 1>, <1800000 0>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun&avb {
73*4882a593Smuzhiyun	pinctrl-0 = <&avb_pins>;
74*4882a593Smuzhiyun	pinctrl-names = "default";
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun	phy-handle = <&phy3>;
77*4882a593Smuzhiyun	phy-mode = "gmii";
78*4882a593Smuzhiyun	renesas,no-ether-link;
79*4882a593Smuzhiyun	status = "okay";
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun	phy3: ethernet-phy@3 {
82*4882a593Smuzhiyun		reg = <3>;
83*4882a593Smuzhiyun		interrupt-parent = <&gpio5>;
84*4882a593Smuzhiyun		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
85*4882a593Smuzhiyun		micrel,led-mode = <1>;
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun&cmt0 {
90*4882a593Smuzhiyun	status = "okay";
91*4882a593Smuzhiyun};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun&du {
94*4882a593Smuzhiyun	pinctrl-0 = <&du0_pins>;
95*4882a593Smuzhiyun	pinctrl-names = "default";
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	status = "okay";
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun	ports {
100*4882a593Smuzhiyun		port@0 {
101*4882a593Smuzhiyun			endpoint {
102*4882a593Smuzhiyun				remote-endpoint = <&bridge_in>;
103*4882a593Smuzhiyun			};
104*4882a593Smuzhiyun		};
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&ehci1 {
109*4882a593Smuzhiyun	status = "okay";
110*4882a593Smuzhiyun};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun&extal_clk {
113*4882a593Smuzhiyun	clock-frequency = <20000000>;
114*4882a593Smuzhiyun};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun&gpio2 {
117*4882a593Smuzhiyun	interrupt-fixup {
118*4882a593Smuzhiyun		gpio-hog;
119*4882a593Smuzhiyun		gpios = <29 GPIO_ACTIVE_HIGH>;
120*4882a593Smuzhiyun		line-name = "hdmi-hpd-int";
121*4882a593Smuzhiyun		input;
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun&hsusb0 {
126*4882a593Smuzhiyun	status = "okay";
127*4882a593Smuzhiyun};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun&i2c3 {
130*4882a593Smuzhiyun	pinctrl-0 = <&i2c3_pins>;
131*4882a593Smuzhiyun	pinctrl-names = "default";
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun	status = "okay";
134*4882a593Smuzhiyun	clock-frequency = <400000>;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	rtc@51 {
137*4882a593Smuzhiyun		compatible = "nxp,pcf85263";
138*4882a593Smuzhiyun		reg = <0x51>;
139*4882a593Smuzhiyun	};
140*4882a593Smuzhiyun};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun&i2c4 {
143*4882a593Smuzhiyun	pinctrl-0 = <&i2c4_pins>;
144*4882a593Smuzhiyun	pinctrl-names = "default";
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	status = "okay";
147*4882a593Smuzhiyun	clock-frequency = <100000>;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun	hdmi@39 {
150*4882a593Smuzhiyun		compatible = "sil,sii9022";
151*4882a593Smuzhiyun		reg = <0x39>;
152*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
153*4882a593Smuzhiyun		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun		ports {
156*4882a593Smuzhiyun			#address-cells = <1>;
157*4882a593Smuzhiyun			#size-cells = <0>;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun			port@0 {
160*4882a593Smuzhiyun				reg = <0>;
161*4882a593Smuzhiyun				bridge_in: endpoint {
162*4882a593Smuzhiyun					remote-endpoint = <&du_out_rgb0>;
163*4882a593Smuzhiyun				};
164*4882a593Smuzhiyun			};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun			port@1 {
167*4882a593Smuzhiyun				reg = <1>;
168*4882a593Smuzhiyun				bridge_out: endpoint {
169*4882a593Smuzhiyun					remote-endpoint = <&hdmi_con>;
170*4882a593Smuzhiyun				};
171*4882a593Smuzhiyun			};
172*4882a593Smuzhiyun		};
173*4882a593Smuzhiyun	};
174*4882a593Smuzhiyun};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun&ohci1 {
177*4882a593Smuzhiyun	status = "okay";
178*4882a593Smuzhiyun};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun&pfc {
181*4882a593Smuzhiyun	avb_pins: avb {
182*4882a593Smuzhiyun		groups = "avb_mdio", "avb_gmii_tx_rx";
183*4882a593Smuzhiyun		function = "avb";
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun	du0_pins: du0 {
187*4882a593Smuzhiyun		groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
188*4882a593Smuzhiyun		function = "du0";
189*4882a593Smuzhiyun	};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun	i2c4_pins: i2c4 {
192*4882a593Smuzhiyun		groups = "i2c4_e";
193*4882a593Smuzhiyun		function = "i2c4";
194*4882a593Smuzhiyun	};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun	i2c3_pins: i2c3 {
197*4882a593Smuzhiyun		groups = "i2c3_c";
198*4882a593Smuzhiyun		function = "i2c3";
199*4882a593Smuzhiyun	};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun	mmc_pins_uhs: mmc_uhs {
202*4882a593Smuzhiyun		groups = "mmc_data8", "mmc_ctrl";
203*4882a593Smuzhiyun		function = "mmc";
204*4882a593Smuzhiyun		power-source = <1800>;
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun	qspi0_pins: qspi0 {
208*4882a593Smuzhiyun		groups = "qspi0_ctrl", "qspi0_data2";
209*4882a593Smuzhiyun		function = "qspi0";
210*4882a593Smuzhiyun	};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun	scif1_pins: scif1 {
213*4882a593Smuzhiyun		groups = "scif1_data_b";
214*4882a593Smuzhiyun		function = "scif1";
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	sdhi2_pins: sd2 {
218*4882a593Smuzhiyun		groups = "sdhi2_data4", "sdhi2_ctrl";
219*4882a593Smuzhiyun		function = "sdhi2";
220*4882a593Smuzhiyun		power-source = <3300>;
221*4882a593Smuzhiyun	};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun	sdhi2_pins_uhs: sd2_uhs {
224*4882a593Smuzhiyun		groups = "sdhi2_data4", "sdhi2_ctrl";
225*4882a593Smuzhiyun		function = "sdhi2";
226*4882a593Smuzhiyun		power-source = <1800>;
227*4882a593Smuzhiyun	};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun	usb0_pins: usb0 {
230*4882a593Smuzhiyun		groups = "usb0";
231*4882a593Smuzhiyun		function = "usb0";
232*4882a593Smuzhiyun	};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun	usb1_pins: usb1 {
235*4882a593Smuzhiyun		groups = "usb1";
236*4882a593Smuzhiyun		function = "usb1";
237*4882a593Smuzhiyun	};
238*4882a593Smuzhiyun};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun&qspi0 {
241*4882a593Smuzhiyun	pinctrl-0 = <&qspi0_pins>;
242*4882a593Smuzhiyun	pinctrl-names = "default";
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun	status = "okay";
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun	/* WARNING - This device contains the bootloader. Handle with care. */
247*4882a593Smuzhiyun	flash: flash@0 {
248*4882a593Smuzhiyun		#address-cells = <1>;
249*4882a593Smuzhiyun		#size-cells = <1>;
250*4882a593Smuzhiyun		compatible = "issi,is25lp016d", "jedec,spi-nor";
251*4882a593Smuzhiyun		reg = <0>;
252*4882a593Smuzhiyun		spi-max-frequency = <133000000>;
253*4882a593Smuzhiyun		spi-tx-bus-width = <1>;
254*4882a593Smuzhiyun		spi-rx-bus-width = <1>;
255*4882a593Smuzhiyun		m25p,fast-read;
256*4882a593Smuzhiyun		spi-cpol;
257*4882a593Smuzhiyun		spi-cpha;
258*4882a593Smuzhiyun	};
259*4882a593Smuzhiyun};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun&rwdt {
262*4882a593Smuzhiyun	timeout-sec = <60>;
263*4882a593Smuzhiyun	status = "okay";
264*4882a593Smuzhiyun};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun&scif1 {
267*4882a593Smuzhiyun	pinctrl-0 = <&scif1_pins>;
268*4882a593Smuzhiyun	pinctrl-names = "default";
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun	status = "okay";
271*4882a593Smuzhiyun};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun&sdhi1 {
274*4882a593Smuzhiyun	pinctrl-0 = <&mmc_pins_uhs>;
275*4882a593Smuzhiyun	pinctrl-names = "state_uhs";
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
278*4882a593Smuzhiyun	vqmmc-supply = <&reg_1p8v>;
279*4882a593Smuzhiyun	bus-width = <8>;
280*4882a593Smuzhiyun	mmc-hs200-1_8v;
281*4882a593Smuzhiyun	non-removable;
282*4882a593Smuzhiyun	fixed-emmc-driver-type = <1>;
283*4882a593Smuzhiyun	status = "okay";
284*4882a593Smuzhiyun};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun&sdhi2 {
287*4882a593Smuzhiyun	pinctrl-0 = <&sdhi2_pins>;
288*4882a593Smuzhiyun	pinctrl-1 = <&sdhi2_pins_uhs>;
289*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
292*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi2>;
293*4882a593Smuzhiyun	bus-width = <4>;
294*4882a593Smuzhiyun	cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
295*4882a593Smuzhiyun	sd-uhs-sdr50;
296*4882a593Smuzhiyun	status = "okay";
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun&usb2_phy0 {
300*4882a593Smuzhiyun	status = "okay";
301*4882a593Smuzhiyun};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun&usb2_phy1 {
304*4882a593Smuzhiyun	status = "okay";
305*4882a593Smuzhiyun};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun&usbphy0 {
308*4882a593Smuzhiyun	pinctrl-0 = <&usb0_pins>;
309*4882a593Smuzhiyun	pinctrl-names = "default";
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun	status = "okay";
312*4882a593Smuzhiyun};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun&usbphy1 {
315*4882a593Smuzhiyun	pinctrl-0 = <&usb1_pins>;
316*4882a593Smuzhiyun	pinctrl-names = "default";
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun	status = "okay";
319*4882a593Smuzhiyun};
320