1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for the iWave-RZG1E-G22M SODIMM SOM 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2017 Renesas Electronics Corp. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "r8a7745.dtsi" 9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun compatible = "iwave,g22m", "renesas,r8a7745"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun memory@40000000 { 15*4882a593Smuzhiyun device_type = "memory"; 16*4882a593Smuzhiyun reg = <0 0x40000000 0 0x20000000>; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun reg_3p3v: 3p3v { 20*4882a593Smuzhiyun compatible = "regulator-fixed"; 21*4882a593Smuzhiyun regulator-name = "3P3V"; 22*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 23*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 24*4882a593Smuzhiyun regulator-always-on; 25*4882a593Smuzhiyun regulator-boot-on; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&cmt0 { 30*4882a593Smuzhiyun status = "okay"; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&extal_clk { 34*4882a593Smuzhiyun clock-frequency = <20000000>; 35*4882a593Smuzhiyun}; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun&pfc { 38*4882a593Smuzhiyun mmcif0_pins: mmc { 39*4882a593Smuzhiyun groups = "mmc_data8", "mmc_ctrl"; 40*4882a593Smuzhiyun function = "mmc"; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun qspi_pins: qspi { 44*4882a593Smuzhiyun groups = "qspi_ctrl", "qspi_data2"; 45*4882a593Smuzhiyun function = "qspi"; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun sdhi1_pins: sd1 { 49*4882a593Smuzhiyun groups = "sdhi1_data4", "sdhi1_ctrl"; 50*4882a593Smuzhiyun function = "sdhi1"; 51*4882a593Smuzhiyun power-source = <3300>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun i2c3_pins: i2c3 { 55*4882a593Smuzhiyun groups = "i2c3_b"; 56*4882a593Smuzhiyun function = "i2c3"; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun}; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun&mmcif0 { 61*4882a593Smuzhiyun pinctrl-0 = <&mmcif0_pins>; 62*4882a593Smuzhiyun pinctrl-names = "default"; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun vmmc-supply = <®_3p3v>; 65*4882a593Smuzhiyun bus-width = <8>; 66*4882a593Smuzhiyun non-removable; 67*4882a593Smuzhiyun status = "okay"; 68*4882a593Smuzhiyun}; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun&qspi { 71*4882a593Smuzhiyun pinctrl-0 = <&qspi_pins>; 72*4882a593Smuzhiyun pinctrl-names = "default"; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* WARNING - This device contains the bootloader. Handle with care. */ 77*4882a593Smuzhiyun flash: flash@0 { 78*4882a593Smuzhiyun #address-cells = <1>; 79*4882a593Smuzhiyun #size-cells = <1>; 80*4882a593Smuzhiyun compatible = "sst,sst25vf016b", "jedec,spi-nor"; 81*4882a593Smuzhiyun reg = <0>; 82*4882a593Smuzhiyun spi-max-frequency = <50000000>; 83*4882a593Smuzhiyun spi-tx-bus-width = <1>; 84*4882a593Smuzhiyun spi-rx-bus-width = <1>; 85*4882a593Smuzhiyun m25p,fast-read; 86*4882a593Smuzhiyun spi-cpol; 87*4882a593Smuzhiyun spi-cpha; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&rwdt { 92*4882a593Smuzhiyun timeout-sec = <60>; 93*4882a593Smuzhiyun status = "okay"; 94*4882a593Smuzhiyun}; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun&sdhi1 { 97*4882a593Smuzhiyun pinctrl-0 = <&sdhi1_pins>; 98*4882a593Smuzhiyun pinctrl-names = "default"; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun vmmc-supply = <®_3p3v>; 101*4882a593Smuzhiyun vqmmc-supply = <®_3p3v>; 102*4882a593Smuzhiyun cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; 103*4882a593Smuzhiyun status = "okay"; 104*4882a593Smuzhiyun}; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun&i2c3 { 107*4882a593Smuzhiyun pinctrl-0 = <&i2c3_pins>; 108*4882a593Smuzhiyun pinctrl-names = "default"; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun status = "okay"; 111*4882a593Smuzhiyun clock-frequency = <400000>; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun rtc@68 { 114*4882a593Smuzhiyun compatible = "ti,bq32000"; 115*4882a593Smuzhiyun reg = <0x68>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun}; 118