xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun#include "qcom-ipq8064.dtsi"
3*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun/ {
6*4882a593Smuzhiyun	model = "MikroTik RB3011UiAS-RM";
7*4882a593Smuzhiyun	compatible = "mikrotik,rb3011";
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun	aliases {
10*4882a593Smuzhiyun		serial0 = &gsbi7_serial;
11*4882a593Smuzhiyun		ethernet0 = &gmac0;
12*4882a593Smuzhiyun		ethernet1 = &gmac3;
13*4882a593Smuzhiyun		mdio-gpio0 = &mdio0;
14*4882a593Smuzhiyun		mdio-gpio1 = &mdio1;
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	chosen {
18*4882a593Smuzhiyun		bootargs = "loglevel=8 console=ttyMSM0,115200";
19*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	memory@42000000 {
23*4882a593Smuzhiyun		reg = <0x42000000 0x3e000000>;
24*4882a593Smuzhiyun		device_type = "memory";
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	mdio0: mdio-0 {
28*4882a593Smuzhiyun		status = "okay";
29*4882a593Smuzhiyun		compatible = "virtual,mdio-gpio";
30*4882a593Smuzhiyun		gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
31*4882a593Smuzhiyun			<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
32*4882a593Smuzhiyun		#address-cells = <1>;
33*4882a593Smuzhiyun		#size-cells = <0>;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		pinctrl-0 = <&mdio0_pins>;
36*4882a593Smuzhiyun		pinctrl-names = "default";
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		switch0: switch@10 {
39*4882a593Smuzhiyun			compatible = "qca,qca8337";
40*4882a593Smuzhiyun			#address-cells = <1>;
41*4882a593Smuzhiyun			#size-cells = <0>;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun			dsa,member = <0 0>;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun			pinctrl-0 = <&sw0_reset_pin>;
46*4882a593Smuzhiyun			pinctrl-names = "default";
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun			reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
49*4882a593Smuzhiyun			reg = <0x10>;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun			ports {
52*4882a593Smuzhiyun				#address-cells = <1>;
53*4882a593Smuzhiyun				#size-cells = <0>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun				switch0cpu: port@0 {
56*4882a593Smuzhiyun					reg = <0>;
57*4882a593Smuzhiyun					label = "cpu";
58*4882a593Smuzhiyun					ethernet = <&gmac0>;
59*4882a593Smuzhiyun					phy-mode = "rgmii-id";
60*4882a593Smuzhiyun					fixed-link {
61*4882a593Smuzhiyun						speed = <1000>;
62*4882a593Smuzhiyun						full-duplex;
63*4882a593Smuzhiyun					};
64*4882a593Smuzhiyun				};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun				port@1 {
67*4882a593Smuzhiyun					reg = <1>;
68*4882a593Smuzhiyun					label = "sw1";
69*4882a593Smuzhiyun				};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun				port@2 {
72*4882a593Smuzhiyun					reg = <2>;
73*4882a593Smuzhiyun					label = "sw2";
74*4882a593Smuzhiyun				};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun				port@3 {
77*4882a593Smuzhiyun					reg = <3>;
78*4882a593Smuzhiyun					label = "sw3";
79*4882a593Smuzhiyun				};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun				port@4 {
82*4882a593Smuzhiyun					reg = <4>;
83*4882a593Smuzhiyun					label = "sw4";
84*4882a593Smuzhiyun				};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun				port@5 {
87*4882a593Smuzhiyun					reg = <5>;
88*4882a593Smuzhiyun					label = "sw5";
89*4882a593Smuzhiyun				};
90*4882a593Smuzhiyun			};
91*4882a593Smuzhiyun		};
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	mdio1: mdio-1 {
95*4882a593Smuzhiyun		status = "okay";
96*4882a593Smuzhiyun		compatible = "virtual,mdio-gpio";
97*4882a593Smuzhiyun		gpios = <&qcom_pinmux 11 GPIO_ACTIVE_HIGH>,
98*4882a593Smuzhiyun			<&qcom_pinmux 10 GPIO_ACTIVE_HIGH>;
99*4882a593Smuzhiyun		#address-cells = <1>;
100*4882a593Smuzhiyun		#size-cells = <0>;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		pinctrl-0 = <&mdio1_pins>;
103*4882a593Smuzhiyun		pinctrl-names = "default";
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun		switch1: switch@14 {
106*4882a593Smuzhiyun			compatible = "qca,qca8337";
107*4882a593Smuzhiyun			#address-cells = <1>;
108*4882a593Smuzhiyun			#size-cells = <0>;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun			dsa,member = <1 0>;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun			pinctrl-0 = <&sw1_reset_pin>;
113*4882a593Smuzhiyun			pinctrl-names = "default";
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun			reset-gpios = <&qcom_pinmux 17 GPIO_ACTIVE_LOW>;
116*4882a593Smuzhiyun			reg = <0x10>;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun			ports {
119*4882a593Smuzhiyun				#address-cells = <1>;
120*4882a593Smuzhiyun				#size-cells = <0>;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun				switch1cpu: port@0 {
123*4882a593Smuzhiyun					reg = <0>;
124*4882a593Smuzhiyun					label = "cpu";
125*4882a593Smuzhiyun					ethernet = <&gmac3>;
126*4882a593Smuzhiyun					phy-mode = "sgmii";
127*4882a593Smuzhiyun					fixed-link {
128*4882a593Smuzhiyun						speed = <1000>;
129*4882a593Smuzhiyun						full-duplex;
130*4882a593Smuzhiyun					};
131*4882a593Smuzhiyun				};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun				port@1 {
134*4882a593Smuzhiyun					reg = <1>;
135*4882a593Smuzhiyun					label = "sw6";
136*4882a593Smuzhiyun				};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun				port@2 {
139*4882a593Smuzhiyun					reg = <2>;
140*4882a593Smuzhiyun					label = "sw7";
141*4882a593Smuzhiyun				};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun				port@3 {
144*4882a593Smuzhiyun					reg = <3>;
145*4882a593Smuzhiyun					label = "sw8";
146*4882a593Smuzhiyun				};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun				port@4 {
149*4882a593Smuzhiyun					reg = <4>;
150*4882a593Smuzhiyun					label = "sw9";
151*4882a593Smuzhiyun				};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun				port@5 {
154*4882a593Smuzhiyun					reg = <5>;
155*4882a593Smuzhiyun					label = "sw10";
156*4882a593Smuzhiyun				};
157*4882a593Smuzhiyun			};
158*4882a593Smuzhiyun		};
159*4882a593Smuzhiyun	};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	soc {
162*4882a593Smuzhiyun		gsbi5: gsbi@1a200000 {
163*4882a593Smuzhiyun			qcom,mode = <GSBI_PROT_SPI>;
164*4882a593Smuzhiyun			status = "okay";
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun			spi4: spi@1a280000 {
167*4882a593Smuzhiyun				status = "okay";
168*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun				pinctrl-0 = <&spi_pins>;
171*4882a593Smuzhiyun				pinctrl-names = "default";
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun				cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun				norflash: s25fl016k@0 {
176*4882a593Smuzhiyun					compatible = "jedec,spi-nor";
177*4882a593Smuzhiyun					#address-cells = <1>;
178*4882a593Smuzhiyun					#size-cells = <1>;
179*4882a593Smuzhiyun					spi-max-frequency = <50000000>;
180*4882a593Smuzhiyun					reg = <0>;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun					partition@0 {
183*4882a593Smuzhiyun						label = "RouterBoot";
184*4882a593Smuzhiyun						reg = <0x0 0x40000>;
185*4882a593Smuzhiyun					};
186*4882a593Smuzhiyun				};
187*4882a593Smuzhiyun			};
188*4882a593Smuzhiyun		};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun		gpio_keys {
191*4882a593Smuzhiyun			compatible = "gpio-keys";
192*4882a593Smuzhiyun			pinctrl-0 = <&buttons_pins>;
193*4882a593Smuzhiyun			pinctrl-names = "default";
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun			button@1 {
196*4882a593Smuzhiyun				label = "reset";
197*4882a593Smuzhiyun				linux,code = <KEY_RESTART>;
198*4882a593Smuzhiyun				gpios = <&qcom_pinmux 66 GPIO_ACTIVE_LOW>;
199*4882a593Smuzhiyun				linux,input-type = <1>;
200*4882a593Smuzhiyun				debounce-interval = <60>;
201*4882a593Smuzhiyun			};
202*4882a593Smuzhiyun		};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun		leds {
205*4882a593Smuzhiyun			compatible = "gpio-leds";
206*4882a593Smuzhiyun			pinctrl-0 = <&leds_pins>;
207*4882a593Smuzhiyun			pinctrl-names = "default";
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun			led@7 {
210*4882a593Smuzhiyun				label = "rb3011:green:user";
211*4882a593Smuzhiyun				gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
212*4882a593Smuzhiyun				default-state = "off";
213*4882a593Smuzhiyun			};
214*4882a593Smuzhiyun		};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun	};
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun&gmac0 {
220*4882a593Smuzhiyun	status = "okay";
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun	phy-mode = "rgmii";
223*4882a593Smuzhiyun	qcom,id = <0>;
224*4882a593Smuzhiyun	phy-handle = <&switch0cpu>;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun	fixed-link {
227*4882a593Smuzhiyun		speed = <1000>;
228*4882a593Smuzhiyun		full-duplex;
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun&gmac3 {
233*4882a593Smuzhiyun	status = "okay";
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun	phy-mode = "sgmii";
236*4882a593Smuzhiyun	qcom,id = <3>;
237*4882a593Smuzhiyun	phy-handle = <&switch1cpu>;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun	fixed-link {
240*4882a593Smuzhiyun		speed = <1000>;
241*4882a593Smuzhiyun		full-duplex;
242*4882a593Smuzhiyun	};
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&gsbi7 {
246*4882a593Smuzhiyun	status = "okay";
247*4882a593Smuzhiyun	qcom,mode = <GSBI_PROT_I2C_UART>;
248*4882a593Smuzhiyun};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun&gsbi7_serial {
251*4882a593Smuzhiyun	status = "okay";
252*4882a593Smuzhiyun};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun&qcom_pinmux {
255*4882a593Smuzhiyun	buttons_pins: buttons_pins {
256*4882a593Smuzhiyun		mux {
257*4882a593Smuzhiyun			pins = "gpio66";
258*4882a593Smuzhiyun			drive-strength = <16>;
259*4882a593Smuzhiyun			bias-disable;
260*4882a593Smuzhiyun		};
261*4882a593Smuzhiyun	};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun	leds_pins: leds_pins {
264*4882a593Smuzhiyun		mux {
265*4882a593Smuzhiyun			pins = "gpio33";
266*4882a593Smuzhiyun			drive-strength = <16>;
267*4882a593Smuzhiyun			bias-disable;
268*4882a593Smuzhiyun		};
269*4882a593Smuzhiyun	};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun	mdio0_pins: mdio0_pins {
272*4882a593Smuzhiyun		mux {
273*4882a593Smuzhiyun			pins = "gpio0", "gpio1";
274*4882a593Smuzhiyun			function = "gpio";
275*4882a593Smuzhiyun			drive-strength = <8>;
276*4882a593Smuzhiyun			bias-disable;
277*4882a593Smuzhiyun		};
278*4882a593Smuzhiyun	};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun	mdio1_pins: mdio1_pins {
281*4882a593Smuzhiyun		mux {
282*4882a593Smuzhiyun			pins = "gpio10", "gpio11";
283*4882a593Smuzhiyun			function = "gpio";
284*4882a593Smuzhiyun			drive-strength = <8>;
285*4882a593Smuzhiyun			bias-disable;
286*4882a593Smuzhiyun		};
287*4882a593Smuzhiyun	};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun	sw0_reset_pin: sw0_reset_pin {
290*4882a593Smuzhiyun		mux {
291*4882a593Smuzhiyun			pins = "gpio16";
292*4882a593Smuzhiyun			drive-strength = <16>;
293*4882a593Smuzhiyun			function = "gpio";
294*4882a593Smuzhiyun			bias-disable;
295*4882a593Smuzhiyun			input-disable;
296*4882a593Smuzhiyun		};
297*4882a593Smuzhiyun	};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun	sw1_reset_pin: sw1_reset_pin {
300*4882a593Smuzhiyun		mux {
301*4882a593Smuzhiyun			pins = "gpio17";
302*4882a593Smuzhiyun			drive-strength = <16>;
303*4882a593Smuzhiyun			function = "gpio";
304*4882a593Smuzhiyun			bias-disable;
305*4882a593Smuzhiyun			input-disable;
306*4882a593Smuzhiyun		};
307*4882a593Smuzhiyun	};
308*4882a593Smuzhiyun};
309