xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/pxa300-raumfeld-tuneable-clock.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun#include <dt-bindings/clock/maxim,max9485.h>
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun/ {
6*4882a593Smuzhiyun	xo_27mhz: oscillator-27mhz {
7*4882a593Smuzhiyun		compatible = "fixed-clock";
8*4882a593Smuzhiyun		#clock-cells = <0>;
9*4882a593Smuzhiyun		clock-frequency = <27000000>;
10*4882a593Smuzhiyun		clock-accuracy = <100>;
11*4882a593Smuzhiyun	};
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	sound {
14*4882a593Smuzhiyun		compatible = "simple-audio-card";
15*4882a593Smuzhiyun		simple-audio-card,name = "Raumfeld Speaker";
16*4882a593Smuzhiyun		#address-cells = <1>;
17*4882a593Smuzhiyun		#size-cells = <0>;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun		simple-audio-card,dai-link@0 {
20*4882a593Smuzhiyun			reg = <0>;
21*4882a593Smuzhiyun			format = "i2s";
22*4882a593Smuzhiyun			bitclock-master = <&dailink_master_analog>;
23*4882a593Smuzhiyun			frame-master = <&dailink_master_analog>;
24*4882a593Smuzhiyun			mclk-fs = <256>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun			dailink_master_analog: cpu {
27*4882a593Smuzhiyun				sound-dai = <&ssp_dai0>;
28*4882a593Smuzhiyun			};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun			codec {
31*4882a593Smuzhiyun				sound-dai = <&cs4270>;
32*4882a593Smuzhiyun			};
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun&ssp_dai0 {
38*4882a593Smuzhiyun	clocks = <&max9485 MAX9485_CLKOUT1>;
39*4882a593Smuzhiyun};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun&ssp_dai1 {
42*4882a593Smuzhiyun	clocks = <&max9485 MAX9485_CLKOUT1>;
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&pxai2c1 {
46*4882a593Smuzhiyun	cs4270: codec@48 {
47*4882a593Smuzhiyun		compatible = "cirrus,cs4270";
48*4882a593Smuzhiyun		pinctrl-names = "default";
49*4882a593Smuzhiyun		pinctrl-0 = <&cs4270_pins>;
50*4882a593Smuzhiyun		reg = <0x48>;
51*4882a593Smuzhiyun		va-supply = <&reg_va_5v0>;
52*4882a593Smuzhiyun		vd-supply = <&reg_3v3>;
53*4882a593Smuzhiyun		vlc-supply = <&reg_3v3>;
54*4882a593Smuzhiyun		reset-gpios = <&gpio 120 GPIO_ACTIVE_HIGH>;
55*4882a593Smuzhiyun		#sound-dai-cells = <0>;
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	max9485: clock-generator@63 {
59*4882a593Smuzhiyun		compatible = "maxim,max9485";
60*4882a593Smuzhiyun		pinctrl-names = "default";
61*4882a593Smuzhiyun		pinctrl-0 = <&max9485_pins>;
62*4882a593Smuzhiyun		reg = <0x63>;
63*4882a593Smuzhiyun		vdd-supply = <&reg_3v3>;
64*4882a593Smuzhiyun		clock-names = "xclk";
65*4882a593Smuzhiyun		clocks = <&xo_27mhz>;
66*4882a593Smuzhiyun		reset-gpios = <&gpio 111 GPIO_ACTIVE_HIGH>;
67*4882a593Smuzhiyun		#clock-cells = <1>;
68*4882a593Smuzhiyun	};
69*4882a593Smuzhiyun};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun&pinctrl {
72*4882a593Smuzhiyun	cs4270_pins: cs4270-pins {
73*4882a593Smuzhiyun		pinctrl-single,pins = <
74*4882a593Smuzhiyun			MFP_PIN_PXA300(120) MFP_AF0	/* RESET */
75*4882a593Smuzhiyun		>;
76*4882a593Smuzhiyun		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	max9485_pins: max9485-pins {
80*4882a593Smuzhiyun		pinctrl-single,pins = <
81*4882a593Smuzhiyun			MFP_PIN_PXA300(111) MFP_AF0	/* RESET */
82*4882a593Smuzhiyun		>;
83*4882a593Smuzhiyun		pinctrl-single,low-power-mode = MFP_LPM(MFP_LPM_PULL_LOW);
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun};
86