1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include "rk3128.dtsi" 5*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h> 6*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "Rockchip PX3SE Evaluation Board"; 10*4882a593Smuzhiyun compatible = "rockchip,px3se-evb", "rockchip,rk3128"; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun chosen { 13*4882a593Smuzhiyun bootargs = "loglevel=7 root=PARTUUID=614e0000-0000-4b53-8000-1d28000054a9 rootwait"; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun adc-keys { 17*4882a593Smuzhiyun compatible = "adc-keys"; 18*4882a593Smuzhiyun io-channels = <&saradc 1>; 19*4882a593Smuzhiyun io-channel-names = "buttons"; 20*4882a593Smuzhiyun poll-interval = <100>; 21*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun reserved-key { 24*4882a593Smuzhiyun linux,code = <KEY_RESERVED>; 25*4882a593Smuzhiyun label = "reserved"; 26*4882a593Smuzhiyun press-threshold-microvolt = <1549000>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun home-key { 30*4882a593Smuzhiyun linux,code = <KEY_HOME>; 31*4882a593Smuzhiyun label = "home"; 32*4882a593Smuzhiyun press-threshold-microvolt = <1314000>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun esc-key { 36*4882a593Smuzhiyun linux,code = <KEY_ESC>; 37*4882a593Smuzhiyun label = "esc"; 38*4882a593Smuzhiyun press-threshold-microvolt = <985000>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun menu-key { 42*4882a593Smuzhiyun linux,code = <KEY_MENU>; 43*4882a593Smuzhiyun label = "menu"; 44*4882a593Smuzhiyun press-threshold-microvolt = <623000>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun vol-down-key { 48*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 49*4882a593Smuzhiyun label = "volume down"; 50*4882a593Smuzhiyun press-threshold-microvolt = <300000>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun vol-up-key { 54*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 55*4882a593Smuzhiyun label = "volume up"; 56*4882a593Smuzhiyun press-threshold-microvolt = <18000>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun backlight: backlight { 61*4882a593Smuzhiyun compatible = "pwm-backlight"; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 64*4882a593Smuzhiyun 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 65*4882a593Smuzhiyun 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 66*4882a593Smuzhiyun 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 67*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 68*4882a593Smuzhiyun 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 69*4882a593Smuzhiyun 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 70*4882a593Smuzhiyun 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 71*4882a593Smuzhiyun 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 72*4882a593Smuzhiyun 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 73*4882a593Smuzhiyun 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 74*4882a593Smuzhiyun 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 75*4882a593Smuzhiyun 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 76*4882a593Smuzhiyun 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 77*4882a593Smuzhiyun 245 246 247 248 249 250 251 252 253 254 255>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun default-brightness-level = <128>; 80*4882a593Smuzhiyun pwms = <&pwm0 0 25000 0>; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun fiq-debugger { 86*4882a593Smuzhiyun compatible = "rockchip,fiq-debugger"; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun pinctrl-names = "default"; 89*4882a593Smuzhiyun pinctrl-0 = <&uart1_xfer>; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun rockchip,serial-id = <1>; 92*4882a593Smuzhiyun rockchip,wake-irq = <0>; 93*4882a593Smuzhiyun /* If enable uart uses irq instead of fiq */ 94*4882a593Smuzhiyun rockchip,irq-mode-enable = <0>; 95*4882a593Smuzhiyun rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ 96*4882a593Smuzhiyun /* Choose a reserved/no-in-use irq */ 97*4882a593Smuzhiyun interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>; 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 102*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 103*4882a593Smuzhiyun /* Use external clock power by VCC_RTC */ 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun pinctrl-0 = <&wifi_pwr>; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* 108*4882a593Smuzhiyun * On the module itself this is one of these (depending 109*4882a593Smuzhiyun * on the actual card populated): 110*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 111*4882a593Smuzhiyun * - PDN (power down when low) 112*4882a593Smuzhiyun */ 113*4882a593Smuzhiyun reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun sound-rk312x { 117*4882a593Smuzhiyun compatible = "simple-audio-card"; 118*4882a593Smuzhiyun status = "disabled"; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 121*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 122*4882a593Smuzhiyun simple-audio-card,name = "rockchip,rk312x-codec"; 123*4882a593Smuzhiyun simple-audio-card,cpu { 124*4882a593Smuzhiyun sound-dai = <&i2s_8ch>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun simple-audio-card,codec { 127*4882a593Smuzhiyun sound-dai = <&codec>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun sound-es8396 { 132*4882a593Smuzhiyun compatible = "simple-audio-card"; 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 136*4882a593Smuzhiyun simple-audio-card,name = "rockchip,es8396-codec"; 137*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 138*4882a593Smuzhiyun simple-audio-card,widgets = 139*4882a593Smuzhiyun "Microphone", "Microphone Jack", 140*4882a593Smuzhiyun "Line", "Microphone Headset", 141*4882a593Smuzhiyun "Headphone", "Headphone Jack"; 142*4882a593Smuzhiyun simple-audio-card,routing = 143*4882a593Smuzhiyun "MIC", "Microphone Jack", 144*4882a593Smuzhiyun "DMIC", "Microphone Headset", 145*4882a593Smuzhiyun "Headphone Jack", "LOUTP", 146*4882a593Smuzhiyun "Headphone Jack", "ROUTN"; 147*4882a593Smuzhiyun simple-audio-card,cpu { 148*4882a593Smuzhiyun sound-dai = <&i2s_2ch>; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun simple-audio-card,codec { 151*4882a593Smuzhiyun sound-dai = <&es8396>; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun usb_control { 156*4882a593Smuzhiyun compatible = "rockchip,rk3126-usb-control"; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun otg_drv_gpio = <&gpio2 12 GPIO_ACTIVE_LOW>; 159*4882a593Smuzhiyun rockchip,remote_wakeup; 160*4882a593Smuzhiyun rockchip,usb_irq_wakeup; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun vcc_18: vcc-18 { 164*4882a593Smuzhiyun compatible = "regulator-fixed"; 165*4882a593Smuzhiyun regulator-name = "vcc_18"; 166*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 167*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 168*4882a593Smuzhiyun regulator-always-on; 169*4882a593Smuzhiyun vin-supply = <&pmic_vcc_18>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun /* vcc33_lcd and vcc18_lcd share the same enable pin */ 173*4882a593Smuzhiyun vcc33_lcd: vcc33-lcd { 174*4882a593Smuzhiyun compatible = "regulator-fixed"; 175*4882a593Smuzhiyun pinctrl-names = "default"; 176*4882a593Smuzhiyun pinctrl-0 = <&lcdc_pwr_en>; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; 179*4882a593Smuzhiyun enable-active-high; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun regulator-name = "vcc33_lcd"; 182*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 183*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 184*4882a593Smuzhiyun vin-supply = <&vcc_io>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun vcc_cvbs_33: vcc-cvbs-33 { 188*4882a593Smuzhiyun compatible = "regulator-fixed"; 189*4882a593Smuzhiyun regulator-name= "vcc-cvbs-33"; 190*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 191*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 192*4882a593Smuzhiyun vin-supply = <&pmic_vcc_cvbs_33>; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun vcc_sys: vcc-sys { 196*4882a593Smuzhiyun compatible = "regulator-fixed"; 197*4882a593Smuzhiyun regulator-name = "vcc_sys"; 198*4882a593Smuzhiyun regulator-min-microvolt = <4000000>; 199*4882a593Smuzhiyun regulator-max-microvolt = <4000000>; 200*4882a593Smuzhiyun regulator-always-on; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun vcc_io: vcc-io { 204*4882a593Smuzhiyun compatible = "regulator-fixed"; 205*4882a593Smuzhiyun regulator-name = "vcc_io"; 206*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 207*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 208*4882a593Smuzhiyun regulator-always-on; 209*4882a593Smuzhiyun vin-supply = <&pmic_vcc_io>; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun vcc_sd: vcc-sd { 213*4882a593Smuzhiyun compatible = "regulator-fixed"; 214*4882a593Smuzhiyun gpio = <&gpio1 14 GPIO_ACTIVE_LOW>; 215*4882a593Smuzhiyun pinctrl-names = "default"; 216*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_pwr>; 217*4882a593Smuzhiyun regulator-name = "vcc_sd"; 218*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 219*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 220*4882a593Smuzhiyun vin-supply = <&vcc_io>; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun dvdd_1v8: dvdd-1v8 { 224*4882a593Smuzhiyun compatible = "regulator-fixed"; 225*4882a593Smuzhiyun regulator-name = "dvdd-1v8"; 226*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 227*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 228*4882a593Smuzhiyun vin-supply = <&vcc_18>; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun dvdd_3v3: dvdd-3v3 { 232*4882a593Smuzhiyun compatible = "regulator-fixed"; 233*4882a593Smuzhiyun regulator-name = "dvdd-3v3"; 234*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 235*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 236*4882a593Smuzhiyun vin-supply = <&vcc_cvbs_33>; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun wireless-bluetooth { 240*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun keep_bt_power_on; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun BT,power_gpio = <&gpio3 21 GPIO_ACTIVE_HIGH>; 245*4882a593Smuzhiyun BT,wake_gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>; 246*4882a593Smuzhiyun BT,wake_host_irq = <&gpio3 22 GPIO_ACTIVE_HIGH>; 247*4882a593Smuzhiyun /* TODO: disabled because it doesn't work */ 248*4882a593Smuzhiyun status = "disabled"; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun wireless-wlan { 252*4882a593Smuzhiyun compatible = "wlan-platdata"; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun pinctrl-names = "default"; 255*4882a593Smuzhiyun pinctrl-0 = <&wifi_en>; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun wifi_chip_type = "rtl8723ds"; 258*4882a593Smuzhiyun sdio_vref = <1800>; /*1800mv or 3300mv*/ 259*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio3 23 GPIO_ACTIVE_HIGH>; 260*4882a593Smuzhiyun /* WIFI power controller by sdio pwrseq */ 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun status = "okay"; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun panel { 266*4882a593Smuzhiyun compatible = "samsung,lsl070nl01", "simple-panel"; 267*4882a593Smuzhiyun power-supply = <&vcc33_lcd>; 268*4882a593Smuzhiyun backlight = <&backlight>; 269*4882a593Smuzhiyun /* 270*4882a593Smuzhiyun * MEDIA_BUS_FMT_RGB666_1X7X3_SPWG - "jeida-18" 271*4882a593Smuzhiyun * MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA - "jeida-24" 272*4882a593Smuzhiyun * MEDIA_BUS_FMT_RGB888_1X7X4_SPWG - "vesa-24" 273*4882a593Smuzhiyun */ 274*4882a593Smuzhiyun bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun display-timings { 277*4882a593Smuzhiyun native-mode = <&timing0>; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun timing0: timing0 { 280*4882a593Smuzhiyun clock-frequency = <48000000>; 281*4882a593Smuzhiyun hactive = <1024>; 282*4882a593Smuzhiyun vactive = <600>; 283*4882a593Smuzhiyun hback-porch = <90>; 284*4882a593Smuzhiyun hfront-porch = <90>; 285*4882a593Smuzhiyun vback-porch = <10>; 286*4882a593Smuzhiyun vfront-porch = <10>; 287*4882a593Smuzhiyun hsync-len = <90>; 288*4882a593Smuzhiyun vsync-len = <10>; 289*4882a593Smuzhiyun hsync-active = <0>; 290*4882a593Smuzhiyun vsync-active = <0>; 291*4882a593Smuzhiyun de-active = <0>; 292*4882a593Smuzhiyun pixelclk-active = <0>; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun port { 297*4882a593Smuzhiyun panel_in_lvds: endpoint { 298*4882a593Smuzhiyun remote-endpoint = <&lvds_out_panel>; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&cif_new { 305*4882a593Smuzhiyun status = "okay"; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun port { 308*4882a593Smuzhiyun cif_in: endpoint { 309*4882a593Smuzhiyun remote-endpoint = <&adv7181_out>; 310*4882a593Smuzhiyun vsync-active = <0>; 311*4882a593Smuzhiyun hsync-active = <1>; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun}; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun&codec { 317*4882a593Smuzhiyun #sound-dai-cells = <0>; 318*4882a593Smuzhiyun hp-ctl-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; 319*4882a593Smuzhiyun spk-ctl-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; 320*4882a593Smuzhiyun spk-mute-delay = <200>; 321*4882a593Smuzhiyun hp-mute-delay = <100>; 322*4882a593Smuzhiyun spk_volume = <25>; 323*4882a593Smuzhiyun hp_volume = <25>; 324*4882a593Smuzhiyun capture_volume = <26>; 325*4882a593Smuzhiyun gpio_debug = <1>; 326*4882a593Smuzhiyun codec_hp_det = <1>; 327*4882a593Smuzhiyun status = "disabled"; 328*4882a593Smuzhiyun}; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun&cpu0 { 331*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 332*4882a593Smuzhiyun}; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun&dfi { 335*4882a593Smuzhiyun status = "okay"; 336*4882a593Smuzhiyun}; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun&dmc { 339*4882a593Smuzhiyun center-supply = <&vdd_log>; 340*4882a593Smuzhiyun status = "okay"; 341*4882a593Smuzhiyun}; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun&emmc { 344*4882a593Smuzhiyun clock-frequency = <50000000>; 345*4882a593Smuzhiyun clock-freq-min-max = <400000 50000000>; 346*4882a593Smuzhiyun supports-highspeed; 347*4882a593Smuzhiyun no-sdio; 348*4882a593Smuzhiyun no-sd; 349*4882a593Smuzhiyun bootpart-no-access; 350*4882a593Smuzhiyun supports-DDR_MODE; 351*4882a593Smuzhiyun ignore-pm-notify; 352*4882a593Smuzhiyun keep-power-in-suspend; 353*4882a593Smuzhiyun //poll-hw-reset 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun bus-width = <8>; 356*4882a593Smuzhiyun num-slots = <1>; 357*4882a593Smuzhiyun pinctrl-names = "default"; 358*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 359*4882a593Smuzhiyun status = "okay"; 360*4882a593Smuzhiyun}; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun&display_subsystem { 363*4882a593Smuzhiyun status = "okay"; 364*4882a593Smuzhiyun}; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun&lvds { 367*4882a593Smuzhiyun status = "okay"; 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun ports { 370*4882a593Smuzhiyun port@1 { 371*4882a593Smuzhiyun reg = <1>; 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun lvds_out_panel: endpoint { 374*4882a593Smuzhiyun remote-endpoint = <&panel_in_lvds>; 375*4882a593Smuzhiyun }; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun }; 378*4882a593Smuzhiyun}; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun&gpu { 381*4882a593Smuzhiyun status = "okay"; 382*4882a593Smuzhiyun mali-supply = <&vdd_log>; 383*4882a593Smuzhiyun}; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun&hevc { 386*4882a593Smuzhiyun status = "okay"; 387*4882a593Smuzhiyun}; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun&hevc_mmu { 390*4882a593Smuzhiyun status = "okay"; 391*4882a593Smuzhiyun}; 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun&hdmi { 394*4882a593Smuzhiyun status = "okay"; 395*4882a593Smuzhiyun}; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun&i2c0 { 398*4882a593Smuzhiyun status = "okay"; 399*4882a593Smuzhiyun clock-frequency = <400000>; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun rk816: pmic@1a { 402*4882a593Smuzhiyun compatible = "rockchip,rk816"; 403*4882a593Smuzhiyun status = "okay"; 404*4882a593Smuzhiyun reg = <0x1a>; 405*4882a593Smuzhiyun clock-output-names = "xin32k", "rk816-clkout2"; 406*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 407*4882a593Smuzhiyun interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 408*4882a593Smuzhiyun pinctrl-names = "default"; 409*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 410*4882a593Smuzhiyun rockchip,system-power-controller; 411*4882a593Smuzhiyun wakeup-source; 412*4882a593Smuzhiyun #clock-cells = <1>; 413*4882a593Smuzhiyun gpio-controller; 414*4882a593Smuzhiyun #gpio-cells = <2>; 415*4882a593Smuzhiyun extcon = <&u2phy>; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 418*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 419*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 420*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 421*4882a593Smuzhiyun vcc5-supply = <&vcc_io>; 422*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun gpio { 425*4882a593Smuzhiyun status = "okay"; 426*4882a593Smuzhiyun }; 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun pwrkey { 429*4882a593Smuzhiyun status = "okay"; 430*4882a593Smuzhiyun }; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun rtc { 433*4882a593Smuzhiyun status = "okay"; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun regulators { 437*4882a593Smuzhiyun vdd_arm: DCDC_REG1{ 438*4882a593Smuzhiyun regulator-name= "vdd-arm"; 439*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 440*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 441*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 442*4882a593Smuzhiyun regulator-always-on; 443*4882a593Smuzhiyun regulator-boot-on; 444*4882a593Smuzhiyun regulator-state-mem { 445*4882a593Smuzhiyun regulator-on-in-suspend; 446*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun }; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun vdd_log: DCDC_REG2 { 451*4882a593Smuzhiyun regulator-name= "vdd-logic"; 452*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 453*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 454*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 455*4882a593Smuzhiyun regulator-always-on; 456*4882a593Smuzhiyun regulator-boot-on; 457*4882a593Smuzhiyun regulator-state-mem { 458*4882a593Smuzhiyun regulator-on-in-suspend; 459*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 460*4882a593Smuzhiyun }; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 464*4882a593Smuzhiyun regulator-name = "vcc-ddr"; 465*4882a593Smuzhiyun regulator-always-on; 466*4882a593Smuzhiyun regulator-boot-on; 467*4882a593Smuzhiyun }; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun pmic_vcc_io: DCDC_REG4 { 470*4882a593Smuzhiyun regulator-name = "pmic-vcc-io"; 471*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 472*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 473*4882a593Smuzhiyun regulator-always-on; 474*4882a593Smuzhiyun regulator-boot-on; 475*4882a593Smuzhiyun regulator-state-mem { 476*4882a593Smuzhiyun regulator-on-in-suspend; 477*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 478*4882a593Smuzhiyun }; 479*4882a593Smuzhiyun }; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun pmic_vcc18_codec: LDO_REG1 { 482*4882a593Smuzhiyun regulator-name = "pmic-vcc18-codec"; 483*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 484*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 485*4882a593Smuzhiyun regulator-always-on; 486*4882a593Smuzhiyun regulator-boot-on; 487*4882a593Smuzhiyun regulator-state-mem { 488*4882a593Smuzhiyun regulator-off-in-suspend; 489*4882a593Smuzhiyun }; 490*4882a593Smuzhiyun }; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun pmic_vcc_18: LDO_REG2 { 493*4882a593Smuzhiyun regulator-name = "pmic-vcc_18"; 494*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 495*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 496*4882a593Smuzhiyun regulator-always-on; 497*4882a593Smuzhiyun regulator-boot-on; 498*4882a593Smuzhiyun regulator-state-mem { 499*4882a593Smuzhiyun regulator-off-in-suspend; 500*4882a593Smuzhiyun }; 501*4882a593Smuzhiyun }; 502*4882a593Smuzhiyun 503*4882a593Smuzhiyun pmic_vdd_11: LDO_REG3 { 504*4882a593Smuzhiyun regulator-name = "pmic-vdd-11"; 505*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 506*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 507*4882a593Smuzhiyun regulator-always-on; 508*4882a593Smuzhiyun regulator-boot-on; 509*4882a593Smuzhiyun regulator-state-mem { 510*4882a593Smuzhiyun regulator-on-in-suspend; 511*4882a593Smuzhiyun regulator-suspend-microvolt = <1100000>; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun }; 514*4882a593Smuzhiyun 515*4882a593Smuzhiyun pmic_vcc_cvbs_33: LDO_REG4 { 516*4882a593Smuzhiyun regulator-name= "pmic-vcc-cvbs-33"; 517*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 518*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 519*4882a593Smuzhiyun regulator-state-mem { 520*4882a593Smuzhiyun regulator-off-in-suspend; 521*4882a593Smuzhiyun }; 522*4882a593Smuzhiyun }; 523*4882a593Smuzhiyun 524*4882a593Smuzhiyun pmic_vcca_33: LDO_REG5 { 525*4882a593Smuzhiyun regulator-name= "pmic-vcca-33"; 526*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 527*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 528*4882a593Smuzhiyun regulator-always-on; 529*4882a593Smuzhiyun regulator-boot-on; 530*4882a593Smuzhiyun regulator-state-mem { 531*4882a593Smuzhiyun regulator-off-in-suspend; 532*4882a593Smuzhiyun }; 533*4882a593Smuzhiyun }; 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun pmic_vcc_tp_33: LDO_REG6 { 536*4882a593Smuzhiyun regulator-name= "pmic-vcc-tp-33"; 537*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 538*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 539*4882a593Smuzhiyun regulator-state-mem { 540*4882a593Smuzhiyun regulator-on-in-suspend; 541*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 542*4882a593Smuzhiyun }; 543*4882a593Smuzhiyun }; 544*4882a593Smuzhiyun }; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun}; 547*4882a593Smuzhiyun 548*4882a593Smuzhiyun&i2c2 { 549*4882a593Smuzhiyun status = "okay"; 550*4882a593Smuzhiyun clock-frequency = <400000>; 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun touchscreen: ts@14 { 553*4882a593Smuzhiyun compatible = "goodix,gt9xx"; 554*4882a593Smuzhiyun reg = <0x14>; 555*4882a593Smuzhiyun touch-gpio = <&gpio1 8 IRQ_TYPE_LEVEL_LOW>; 556*4882a593Smuzhiyun reset-gpio = <&gpio0 25 GPIO_ACTIVE_LOW>; 557*4882a593Smuzhiyun //power-gpio = <&gpio0 GPIO_C5 GPIO_ACTIVE_LOW>; 558*4882a593Smuzhiyun max-x = <1024>; 559*4882a593Smuzhiyun max-y = <600>; 560*4882a593Smuzhiyun tp-size = <910>; 561*4882a593Smuzhiyun tp-supply = <&pmic_vcc_tp_33>; 562*4882a593Smuzhiyun status = "okay"; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun camera: adv7181@21 { 566*4882a593Smuzhiyun compatible = "adi,adv7181"; 567*4882a593Smuzhiyun reg = <0x21>; 568*4882a593Smuzhiyun 569*4882a593Smuzhiyun pinctrl-names = "default"; 570*4882a593Smuzhiyun pinctrl-0 = <&cif_rst>; 571*4882a593Smuzhiyun 572*4882a593Smuzhiyun dvdd-supply = <&dvdd_1v8>; 573*4882a593Smuzhiyun dvddio-supply = <&dvdd_3v3>; 574*4882a593Smuzhiyun reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; 575*4882a593Smuzhiyun 576*4882a593Smuzhiyun status = "okay"; 577*4882a593Smuzhiyun 578*4882a593Smuzhiyun port { 579*4882a593Smuzhiyun adv7181_out: endpoint { 580*4882a593Smuzhiyun remote-endpoint = <&cif_in>; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun }; 583*4882a593Smuzhiyun }; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun es8396: es8396@11 { 586*4882a593Smuzhiyun status = "okay"; 587*4882a593Smuzhiyun #sound-dai-cells = <0>; 588*4882a593Smuzhiyun compatible = "es8396"; 589*4882a593Smuzhiyun reg = <0x11>; 590*4882a593Smuzhiyun clock-names = "mclk"; 591*4882a593Smuzhiyun clocks = <&cru SCLK_I2S_OUT>; 592*4882a593Smuzhiyun spk-con-gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; 593*4882a593Smuzhiyun lineout-con-gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; 594*4882a593Smuzhiyun }; 595*4882a593Smuzhiyun}; 596*4882a593Smuzhiyun 597*4882a593Smuzhiyun&i2s_2ch { 598*4882a593Smuzhiyun pinctrl-names = "default"; 599*4882a593Smuzhiyun pinctrl-0 = <&i2s_bus>; 600*4882a593Smuzhiyun #sound-dai-cells = <0>; 601*4882a593Smuzhiyun status = "okay"; 602*4882a593Smuzhiyun}; 603*4882a593Smuzhiyun 604*4882a593Smuzhiyun&i2s_8ch { 605*4882a593Smuzhiyun #sound-dai-cells = <0>; 606*4882a593Smuzhiyun status = "disabled"; 607*4882a593Smuzhiyun}; 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun&pwm0 { 610*4882a593Smuzhiyun status = "okay"; 611*4882a593Smuzhiyun}; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun&saradc { 614*4882a593Smuzhiyun status = "okay"; 615*4882a593Smuzhiyun vref-supply = <&vcc_io>; 616*4882a593Smuzhiyun}; 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun&sdio { 619*4882a593Smuzhiyun cap-mmc-highspeed; 620*4882a593Smuzhiyun cap-sd-highspeed; 621*4882a593Smuzhiyun cap-sdio-irq; 622*4882a593Smuzhiyun clock-frequency = <37500000>; 623*4882a593Smuzhiyun clock-freq-min-max = <200000 37500000>; 624*4882a593Smuzhiyun ignore-pm-notify; 625*4882a593Smuzhiyun keep-power-in-suspend; 626*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 627*4882a593Smuzhiyun non-removable; 628*4882a593Smuzhiyun no-sd; 629*4882a593Smuzhiyun no-mmc; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun status = "okay"; 632*4882a593Smuzhiyun}; 633*4882a593Smuzhiyun 634*4882a593Smuzhiyun&sdmmc { 635*4882a593Smuzhiyun clock-frequency = <37500000>; 636*4882a593Smuzhiyun clock-freq-min-max = <400000 37500000>; 637*4882a593Smuzhiyun supports-highspeed; 638*4882a593Smuzhiyun no-sdio; 639*4882a593Smuzhiyun no-mmc; 640*4882a593Smuzhiyun broken-cd; 641*4882a593Smuzhiyun card-detect-delay = <200>; 642*4882a593Smuzhiyun ignore-pm-notify; 643*4882a593Smuzhiyun keep-power-in-suspend; 644*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 645*4882a593Smuzhiyun cd-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 646*4882a593Smuzhiyun status = "okay"; 647*4882a593Smuzhiyun}; 648*4882a593Smuzhiyun 649*4882a593Smuzhiyun&u2phy { 650*4882a593Smuzhiyun status = "okay"; 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun u2phy_otg: otg-port { 653*4882a593Smuzhiyun status = "okay"; 654*4882a593Smuzhiyun }; 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun u2phy_host: host-port { 657*4882a593Smuzhiyun status = "okay"; 658*4882a593Smuzhiyun }; 659*4882a593Smuzhiyun}; 660*4882a593Smuzhiyun 661*4882a593Smuzhiyun&uart0 { 662*4882a593Smuzhiyun status = "okay"; 663*4882a593Smuzhiyun}; 664*4882a593Smuzhiyun 665*4882a593Smuzhiyun&uart1 { 666*4882a593Smuzhiyun /* disable uart1 explicitly since fiq-debugger is on uart1 */ 667*4882a593Smuzhiyun status = "disabled"; 668*4882a593Smuzhiyun}; 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun&usb_host_ehci { 671*4882a593Smuzhiyun status = "okay"; 672*4882a593Smuzhiyun}; 673*4882a593Smuzhiyun 674*4882a593Smuzhiyun&usb_host_ohci { 675*4882a593Smuzhiyun status = "okay"; 676*4882a593Smuzhiyun}; 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun&usb_otg { 679*4882a593Smuzhiyun status = "okay"; 680*4882a593Smuzhiyun}; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun&vop { 683*4882a593Smuzhiyun status = "okay"; 684*4882a593Smuzhiyun}; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun&vop_mmu { 687*4882a593Smuzhiyun status = "okay"; 688*4882a593Smuzhiyun}; 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun&vpu { 691*4882a593Smuzhiyun status = "okay"; 692*4882a593Smuzhiyun}; 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun&vpu_combo { 695*4882a593Smuzhiyun status = "okay"; 696*4882a593Smuzhiyun}; 697*4882a593Smuzhiyun 698*4882a593Smuzhiyun&vpu_mmu { 699*4882a593Smuzhiyun status = "okay"; 700*4882a593Smuzhiyun}; 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun&pinctrl { 703*4882a593Smuzhiyun camera { 704*4882a593Smuzhiyun cif_rst: cif-rst { 705*4882a593Smuzhiyun rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_default>; 706*4882a593Smuzhiyun }; 707*4882a593Smuzhiyun }; 708*4882a593Smuzhiyun 709*4882a593Smuzhiyun pmic { 710*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 711*4882a593Smuzhiyun rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_default>; 712*4882a593Smuzhiyun }; 713*4882a593Smuzhiyun }; 714*4882a593Smuzhiyun 715*4882a593Smuzhiyun sdmmc { 716*4882a593Smuzhiyun sdmmc_pwr: sdmmc-pwr { 717*4882a593Smuzhiyun rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_default>; 718*4882a593Smuzhiyun }; 719*4882a593Smuzhiyun }; 720*4882a593Smuzhiyun 721*4882a593Smuzhiyun lcdc { 722*4882a593Smuzhiyun lcdc_pwr_en: lcdc-pwr-en { 723*4882a593Smuzhiyun rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_default>; 724*4882a593Smuzhiyun }; 725*4882a593Smuzhiyun }; 726*4882a593Smuzhiyun 727*4882a593Smuzhiyun wifi { 728*4882a593Smuzhiyun wifi_en: wifi-en { 729*4882a593Smuzhiyun rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_output_high>; 730*4882a593Smuzhiyun }; 731*4882a593Smuzhiyun wifi_pwr: wifi-pwr { 732*4882a593Smuzhiyun rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_default>; 733*4882a593Smuzhiyun }; 734*4882a593Smuzhiyun }; 735*4882a593Smuzhiyun}; 736