1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 5*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any 6*4882a593Smuzhiyun * warranty of any kind, whether express or implied. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/* 10*4882a593Smuzhiyun * TODO: add Orion USB device port init when kernel.org support is added. 11*4882a593Smuzhiyun * TODO: add flash write support: see below. 12*4882a593Smuzhiyun * TODO: add power-off support. 13*4882a593Smuzhiyun * TODO: add I2C EEPROM support. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/dts-v1/; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 19*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 20*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 21*4882a593Smuzhiyun#include "orion5x-mv88f5182.dtsi" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun/ { 24*4882a593Smuzhiyun model = "LaCie Ethernet Disk mini V2"; 25*4882a593Smuzhiyun compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x"; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun memory { 28*4882a593Smuzhiyun device_type = "memory"; 29*4882a593Smuzhiyun reg = <0x00000000 0x4000000>; /* 64 MB */ 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun chosen { 33*4882a593Smuzhiyun bootargs = "console=ttyS0,115200n8 earlyprintk"; 34*4882a593Smuzhiyun stdout-path = &uart0; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun soc { 38*4882a593Smuzhiyun ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>, 39*4882a593Smuzhiyun <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, 40*4882a593Smuzhiyun <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun gpio-keys { 44*4882a593Smuzhiyun compatible = "gpio-keys"; 45*4882a593Smuzhiyun pinctrl-0 = <&pmx_power_button>; 46*4882a593Smuzhiyun pinctrl-names = "default"; 47*4882a593Smuzhiyun #address-cells = <1>; 48*4882a593Smuzhiyun #size-cells = <0>; 49*4882a593Smuzhiyun button@1 { 50*4882a593Smuzhiyun label = "Power-on Switch"; 51*4882a593Smuzhiyun linux,code = <KEY_POWER>; 52*4882a593Smuzhiyun gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun gpio-leds { 57*4882a593Smuzhiyun compatible = "gpio-leds"; 58*4882a593Smuzhiyun pinctrl-0 = <&pmx_power_led>; 59*4882a593Smuzhiyun pinctrl-names = "default"; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun led@1 { 62*4882a593Smuzhiyun label = "power:blue"; 63*4882a593Smuzhiyun gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun}; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun&devbus_bootcs { 69*4882a593Smuzhiyun status = "okay"; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* Read parameters */ 72*4882a593Smuzhiyun devbus,bus-width = <8>; 73*4882a593Smuzhiyun devbus,turn-off-ps = <90000>; 74*4882a593Smuzhiyun devbus,badr-skew-ps = <0>; 75*4882a593Smuzhiyun devbus,acc-first-ps = <186000>; 76*4882a593Smuzhiyun devbus,acc-next-ps = <186000>; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* Write parameters */ 79*4882a593Smuzhiyun devbus,wr-high-ps = <90000>; 80*4882a593Smuzhiyun devbus,wr-low-ps = <90000>; 81*4882a593Smuzhiyun devbus,ale-wr-ps = <90000>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun /* 84*4882a593Smuzhiyun * Currently the MTD code does not recognize the MX29LV400CBCT 85*4882a593Smuzhiyun * as a bottom-type device. This could cause risks of 86*4882a593Smuzhiyun * accidentally erasing critical flash sectors. We thus define 87*4882a593Smuzhiyun * a single, write-protected partition covering the whole 88*4882a593Smuzhiyun * flash. TODO: once the flash part TOP/BOTTOM detection 89*4882a593Smuzhiyun * issue is sorted out in the MTD code, break this into at 90*4882a593Smuzhiyun * least three partitions: 'u-boot code', 'u-boot environment' 91*4882a593Smuzhiyun * and 'whatever is left'. 92*4882a593Smuzhiyun */ 93*4882a593Smuzhiyun flash@0 { 94*4882a593Smuzhiyun compatible = "cfi-flash"; 95*4882a593Smuzhiyun reg = <0 0x80000>; 96*4882a593Smuzhiyun bank-width = <1>; 97*4882a593Smuzhiyun #address-cells = <1>; 98*4882a593Smuzhiyun #size-cells = <1>; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun partition@0 { 101*4882a593Smuzhiyun label = "Full512Kb"; 102*4882a593Smuzhiyun reg = <0 0x80000>; 103*4882a593Smuzhiyun read-only; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun}; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun&ehci0 { 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyunð { 113*4882a593Smuzhiyun status = "okay"; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun ethernet-port@0 { 116*4882a593Smuzhiyun phy-handle = <ðphy>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun}; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun&i2c { 121*4882a593Smuzhiyun status = "okay"; 122*4882a593Smuzhiyun clock-frequency = <100000>; 123*4882a593Smuzhiyun #address-cells = <1>; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun rtc@32 { 126*4882a593Smuzhiyun compatible = "ricoh,rs5c372a"; 127*4882a593Smuzhiyun reg = <0x32>; 128*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 129*4882a593Smuzhiyun interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun}; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun&mdio { 134*4882a593Smuzhiyun status = "okay"; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun ethphy: ethernet-phy { 137*4882a593Smuzhiyun reg = <8>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun}; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun&pinctrl { 142*4882a593Smuzhiyun pinctrl-0 = <&pmx_rtc &pmx_power_led_ctrl>; 143*4882a593Smuzhiyun pinctrl-names = "default"; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun pmx_power_button: pmx-power-button { 146*4882a593Smuzhiyun marvell,pins = "mpp18"; 147*4882a593Smuzhiyun marvell,function = "gpio"; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun pmx_power_led: pmx-power-led { 151*4882a593Smuzhiyun marvell,pins = "mpp16"; 152*4882a593Smuzhiyun marvell,function = "gpio"; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun pmx_power_led_ctrl: pmx-power-led-ctrl { 156*4882a593Smuzhiyun marvell,pins = "mpp17"; 157*4882a593Smuzhiyun marvell,function = "gpio"; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun pmx_rtc: pmx-rtc { 161*4882a593Smuzhiyun marvell,pins = "mpp3"; 162*4882a593Smuzhiyun marvell,function = "gpio"; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun}; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun&sata { 167*4882a593Smuzhiyun pinctrl-0 = <&pmx_sata0 &pmx_sata1>; 168*4882a593Smuzhiyun pinctrl-names = "default"; 169*4882a593Smuzhiyun status = "okay"; 170*4882a593Smuzhiyun nr-ports = <2>; 171*4882a593Smuzhiyun}; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun&uart0 { 174*4882a593Smuzhiyun status = "okay"; 175*4882a593Smuzhiyun}; 176