1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 3*4882a593Smuzhiyun * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 6*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any 7*4882a593Smuzhiyun * warranty of any kind, whether express or implied. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/dts-v1/; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 13*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 14*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 15*4882a593Smuzhiyun#include "orion5x-mv88f5182.dtsi" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/ { 18*4882a593Smuzhiyun model = "LaCie d2 Network"; 19*4882a593Smuzhiyun compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x"; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun memory { 22*4882a593Smuzhiyun device_type = "memory"; 23*4882a593Smuzhiyun reg = <0x00000000 0x4000000>; /* 64 MB */ 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun chosen { 27*4882a593Smuzhiyun bootargs = "console=ttyS0,115200n8 earlyprintk"; 28*4882a593Smuzhiyun stdout-path = &uart0; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun soc { 32*4882a593Smuzhiyun ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>, 33*4882a593Smuzhiyun <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, 34*4882a593Smuzhiyun <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun gpio-keys { 38*4882a593Smuzhiyun compatible = "gpio-keys"; 39*4882a593Smuzhiyun pinctrl-0 = <&pmx_buttons>; 40*4882a593Smuzhiyun pinctrl-names = "default"; 41*4882a593Smuzhiyun #address-cells = <1>; 42*4882a593Smuzhiyun #size-cells = <0>; 43*4882a593Smuzhiyun front_button { 44*4882a593Smuzhiyun label = "Front Push Button"; 45*4882a593Smuzhiyun linux,code = <KEY_POWER>; 46*4882a593Smuzhiyun gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun power_rocker_sw_on { 50*4882a593Smuzhiyun label = "Power rocker switch (on|auto)"; 51*4882a593Smuzhiyun linux,input-type = <5>; /* EV_SW */ 52*4882a593Smuzhiyun linux,code = <1>; /* D2NET_SWITCH_POWER_ON */ 53*4882a593Smuzhiyun gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun power_rocker_sw_off { 57*4882a593Smuzhiyun label = "Power rocker switch (auto|off)"; 58*4882a593Smuzhiyun linux,input-type = <5>; /* EV_SW */ 59*4882a593Smuzhiyun linux,code = <2>; /* D2NET_SWITCH_POWER_OFF */ 60*4882a593Smuzhiyun gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun regulators { 65*4882a593Smuzhiyun compatible = "simple-bus"; 66*4882a593Smuzhiyun #address-cells = <1>; 67*4882a593Smuzhiyun #size-cells = <0>; 68*4882a593Smuzhiyun pinctrl-0 = <&pmx_sata0_power &pmx_sata1_power>; 69*4882a593Smuzhiyun pinctrl-names = "default"; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun sata0_power: regulator@0 { 72*4882a593Smuzhiyun compatible = "regulator-fixed"; 73*4882a593Smuzhiyun reg = <0>; 74*4882a593Smuzhiyun regulator-name = "SATA0 Power"; 75*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 76*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 77*4882a593Smuzhiyun enable-active-high; 78*4882a593Smuzhiyun regulator-always-on; 79*4882a593Smuzhiyun regulator-boot-on; 80*4882a593Smuzhiyun gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun sata1_power: regulator@1 { 84*4882a593Smuzhiyun compatible = "regulator-fixed"; 85*4882a593Smuzhiyun reg = <1>; 86*4882a593Smuzhiyun regulator-name = "SATA1 Power"; 87*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 88*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 89*4882a593Smuzhiyun enable-active-high; 90*4882a593Smuzhiyun regulator-always-on; 91*4882a593Smuzhiyun regulator-boot-on; 92*4882a593Smuzhiyun gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun}; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun&devbus_bootcs { 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun devbus,keep-config; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun /* 103*4882a593Smuzhiyun * Currently the MTD code does not recognize the MX29LV400CBCT 104*4882a593Smuzhiyun * as a bottom-type device. This could cause risks of 105*4882a593Smuzhiyun * accidentally erasing critical flash sectors. We thus define 106*4882a593Smuzhiyun * a single, write-protected partition covering the whole 107*4882a593Smuzhiyun * flash. TODO: once the flash part TOP/BOTTOM detection 108*4882a593Smuzhiyun * issue is sorted out in the MTD code, break this into at 109*4882a593Smuzhiyun * least three partitions: 'u-boot code', 'u-boot environment' 110*4882a593Smuzhiyun * and 'whatever is left'. 111*4882a593Smuzhiyun */ 112*4882a593Smuzhiyun flash@0 { 113*4882a593Smuzhiyun compatible = "cfi-flash"; 114*4882a593Smuzhiyun reg = <0 0x80000>; 115*4882a593Smuzhiyun bank-width = <1>; 116*4882a593Smuzhiyun #address-cells = <1>; 117*4882a593Smuzhiyun #size-cells = <1>; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun partition@0 { 120*4882a593Smuzhiyun label = "Full512Kb"; 121*4882a593Smuzhiyun reg = <0 0x80000>; 122*4882a593Smuzhiyun read-only; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&mdio { 128*4882a593Smuzhiyun status = "okay"; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun ethphy: ethernet-phy { 131*4882a593Smuzhiyun reg = <8>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun}; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun&ehci0 { 136*4882a593Smuzhiyun status = "okay"; 137*4882a593Smuzhiyun}; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyunð { 140*4882a593Smuzhiyun status = "okay"; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun ethernet-port@0 { 143*4882a593Smuzhiyun phy-handle = <ðphy>; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun}; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun&i2c { 148*4882a593Smuzhiyun status = "okay"; 149*4882a593Smuzhiyun clock-frequency = <100000>; 150*4882a593Smuzhiyun #address-cells = <1>; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun rtc@32 { 153*4882a593Smuzhiyun compatible = "ricoh,rs5c372b"; 154*4882a593Smuzhiyun reg = <0x32>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun fan@3e { 158*4882a593Smuzhiyun compatible = "gmt,g762"; 159*4882a593Smuzhiyun reg = <0x3e>; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun /* Not enough HW info */ 162*4882a593Smuzhiyun status = "disabled"; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun eeprom@50 { 166*4882a593Smuzhiyun compatible = "atmel,24c08"; 167*4882a593Smuzhiyun reg = <0x50>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun}; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun&pinctrl { 172*4882a593Smuzhiyun pinctrl-0 = <&pmx_leds &pmx_board_id &pmx_fan_fail>; 173*4882a593Smuzhiyun pinctrl-names = "default"; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun pmx_board_id: pmx-board-id { 176*4882a593Smuzhiyun marvell,pins = "mpp0", "mpp1", "mpp2"; 177*4882a593Smuzhiyun marvell,function = "gpio"; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun pmx_buttons: pmx-buttons { 181*4882a593Smuzhiyun marvell,pins = "mpp8", "mpp9", "mpp18"; 182*4882a593Smuzhiyun marvell,function = "gpio"; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun pmx_fan_fail: pmx-fan-fail { 186*4882a593Smuzhiyun marvell,pins = "mpp5"; 187*4882a593Smuzhiyun marvell,function = "gpio"; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun /* 191*4882a593Smuzhiyun * MPP6: Red front LED 192*4882a593Smuzhiyun * MPP16: Blue front LED blink control 193*4882a593Smuzhiyun */ 194*4882a593Smuzhiyun pmx_leds: pmx-leds { 195*4882a593Smuzhiyun marvell,pins = "mpp6", "mpp16"; 196*4882a593Smuzhiyun marvell,function = "gpio"; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun pmx_sata0_led_active: pmx-sata0-led-active { 200*4882a593Smuzhiyun marvell,pins = "mpp14"; 201*4882a593Smuzhiyun marvell,function = "sata0"; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun pmx_sata0_power: pmx-sata0-power { 205*4882a593Smuzhiyun marvell,pins = "mpp3"; 206*4882a593Smuzhiyun marvell,function = "gpio"; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun pmx_sata1_led_active: pmx-sata1-led-active { 210*4882a593Smuzhiyun marvell,pins = "mpp15"; 211*4882a593Smuzhiyun marvell,function = "sata1"; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun pmx_sata1_power: pmx-sata1-power { 215*4882a593Smuzhiyun marvell,pins = "mpp12"; 216*4882a593Smuzhiyun marvell,function = "gpio"; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun /* 220*4882a593Smuzhiyun * Non MPP GPIOs: 221*4882a593Smuzhiyun * GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok) 222*4882a593Smuzhiyun * GPIO 23: Blue front LED off 223*4882a593Smuzhiyun * GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled) 224*4882a593Smuzhiyun */ 225*4882a593Smuzhiyun}; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun&sata { 228*4882a593Smuzhiyun pinctrl-0 = <&pmx_sata0_led_active 229*4882a593Smuzhiyun &pmx_sata1_led_active>; 230*4882a593Smuzhiyun pinctrl-names = "default"; 231*4882a593Smuzhiyun status = "okay"; 232*4882a593Smuzhiyun nr-ports = <2>; 233*4882a593Smuzhiyun}; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun&uart0 { 236*4882a593Smuzhiyun status = "okay"; 237*4882a593Smuzhiyun}; 238