1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Suppport for CompuLab CM-T54 on SB-T54 baseboard 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "omap5-cm-t54.dts" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "CompuLab CM-T54 on SB-T54"; 10*4882a593Smuzhiyun compatible = "compulab,omap5-sbc-t54", "compulab,omap5-cm-t54", "ti,omap5"; 11*4882a593Smuzhiyun}; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun&omap5_pmx_core { 14*4882a593Smuzhiyun i2c4_pins: pinmux_i2c4_pins { 15*4882a593Smuzhiyun pinctrl-single,pins = < 16*4882a593Smuzhiyun OMAP5_IOPAD(0x00f8, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */ 17*4882a593Smuzhiyun OMAP5_IOPAD(0x00fa, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ 18*4882a593Smuzhiyun >; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun mmc1_aux_pins: pinmux_mmc1_aux_pins { 22*4882a593Smuzhiyun pinctrl-single,pins = < 23*4882a593Smuzhiyun OMAP5_IOPAD(0x0174, PIN_INPUT_PULLUP | MUX_MODE6) /* timer5_pwm_evt.gpio8_228 */ 24*4882a593Smuzhiyun OMAP5_IOPAD(0x0176, PIN_INPUT_PULLUP | MUX_MODE6) /* timer6_pwm_evt.gpio8_229 */ 25*4882a593Smuzhiyun >; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&mmc1 { 30*4882a593Smuzhiyun pinctrl-names = "default"; 31*4882a593Smuzhiyun pinctrl-0 = < 32*4882a593Smuzhiyun &mmc1_pins 33*4882a593Smuzhiyun &mmc1_aux_pins 34*4882a593Smuzhiyun >; 35*4882a593Smuzhiyun cd-inverted; 36*4882a593Smuzhiyun wp-inverted; 37*4882a593Smuzhiyun cd-gpios = <&gpio8 4 GPIO_ACTIVE_LOW>; /* gpio8_228 */ 38*4882a593Smuzhiyun wp-gpios = <&gpio8 5 GPIO_ACTIVE_LOW>; /* gpio8_229 */ 39*4882a593Smuzhiyun}; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun&i2c4 { 42*4882a593Smuzhiyun pinctrl-names = "default"; 43*4882a593Smuzhiyun pinctrl-0 = <&i2c4_pins>; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun clock-frequency = <400000>; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun at24@50 { 48*4882a593Smuzhiyun compatible = "atmel,24c02"; 49*4882a593Smuzhiyun pagesize = <16>; 50*4882a593Smuzhiyun reg = <0x50>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun}; 53