xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/omap5-board-common.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun#include "omap5.dtsi"
6*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
7*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/arm-gic.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	aliases {
11*4882a593Smuzhiyun		display0 = &hdmi0;
12*4882a593Smuzhiyun	};
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		stdout-path = &uart3;
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	vmain: fixedregulator-vmain {
19*4882a593Smuzhiyun		compatible = "regulator-fixed";
20*4882a593Smuzhiyun		regulator-name = "vmain";
21*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
22*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	vsys_cobra: fixedregulator-vsys_cobra {
26*4882a593Smuzhiyun		compatible = "regulator-fixed";
27*4882a593Smuzhiyun		regulator-name = "vsys_cobra";
28*4882a593Smuzhiyun		vin-supply = <&vmain>;
29*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
30*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	vmmcsd_fixed: fixedregulator-mmcsd {
34*4882a593Smuzhiyun		compatible = "regulator-fixed";
35*4882a593Smuzhiyun		regulator-name = "vmmcsd_fixed";
36*4882a593Smuzhiyun		regulator-min-microvolt = <3000000>;
37*4882a593Smuzhiyun		regulator-max-microvolt = <3000000>;
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	mmc3_pwrseq: sdhci0_pwrseq {
41*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
42*4882a593Smuzhiyun		clocks = <&clk32kgaudio>;
43*4882a593Smuzhiyun		clock-names = "ext_clock";
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	vmmcsdio_fixed: fixedregulator-mmcsdio {
47*4882a593Smuzhiyun		compatible = "regulator-fixed";
48*4882a593Smuzhiyun		regulator-name = "vmmcsdio_fixed";
49*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
50*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
51*4882a593Smuzhiyun		gpio = <&gpio5 12 GPIO_ACTIVE_HIGH>;	/* gpio140 WLAN_EN */
52*4882a593Smuzhiyun		enable-active-high;
53*4882a593Smuzhiyun		startup-delay-us = <70000>;
54*4882a593Smuzhiyun		pinctrl-names = "default";
55*4882a593Smuzhiyun		pinctrl-0 = <&wlan_pins>;
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	/* HS USB Host PHY on PORT 2 */
59*4882a593Smuzhiyun	hsusb2_phy: hsusb2_phy {
60*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
61*4882a593Smuzhiyun		reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
62*4882a593Smuzhiyun		clocks = <&auxclk1_ck>;
63*4882a593Smuzhiyun		clock-names = "main_clk";
64*4882a593Smuzhiyun		clock-frequency = <19200000>;
65*4882a593Smuzhiyun		#phy-cells = <0>;
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	/* HS USB Host PHY on PORT 3 */
69*4882a593Smuzhiyun	hsusb3_phy: hsusb3_phy {
70*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
71*4882a593Smuzhiyun		reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
72*4882a593Smuzhiyun		#phy-cells = <0>;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	tpd12s015: encoder {
76*4882a593Smuzhiyun		compatible = "ti,tpd12s015";
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		pinctrl-names = "default";
79*4882a593Smuzhiyun		pinctrl-0 = <&tpd12s015_pins>;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		/* gpios defined in the board specific dts */
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		ports {
84*4882a593Smuzhiyun			#address-cells = <1>;
85*4882a593Smuzhiyun			#size-cells = <0>;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun			port@0 {
88*4882a593Smuzhiyun				reg = <0>;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun				tpd12s015_in: endpoint {
91*4882a593Smuzhiyun					remote-endpoint = <&hdmi_out>;
92*4882a593Smuzhiyun				};
93*4882a593Smuzhiyun			};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun			port@1 {
96*4882a593Smuzhiyun				reg = <1>;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun				tpd12s015_out: endpoint {
99*4882a593Smuzhiyun					remote-endpoint = <&hdmi_connector_in>;
100*4882a593Smuzhiyun				};
101*4882a593Smuzhiyun			};
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun	};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	hdmi0: connector {
106*4882a593Smuzhiyun		compatible = "hdmi-connector";
107*4882a593Smuzhiyun		label = "hdmi";
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		type = "b";
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		port {
112*4882a593Smuzhiyun			hdmi_connector_in: endpoint {
113*4882a593Smuzhiyun				remote-endpoint = <&tpd12s015_out>;
114*4882a593Smuzhiyun			};
115*4882a593Smuzhiyun		};
116*4882a593Smuzhiyun	};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	sound: sound {
119*4882a593Smuzhiyun		compatible = "ti,abe-twl6040";
120*4882a593Smuzhiyun		ti,model = "omap5-uevm";
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun		ti,jack-detection;
123*4882a593Smuzhiyun		ti,mclk-freq = <19200000>;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun		ti,mcpdm = <&mcpdm>;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		ti,twl6040 = <&twl6040>;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		/* Audio routing */
130*4882a593Smuzhiyun		ti,audio-routing =
131*4882a593Smuzhiyun			"Headset Stereophone", "HSOL",
132*4882a593Smuzhiyun			"Headset Stereophone", "HSOR",
133*4882a593Smuzhiyun			"Line Out", "AUXL",
134*4882a593Smuzhiyun			"Line Out", "AUXR",
135*4882a593Smuzhiyun			"HSMIC", "Headset Mic",
136*4882a593Smuzhiyun			"Headset Mic", "Headset Mic Bias",
137*4882a593Smuzhiyun			"AFML", "Line In",
138*4882a593Smuzhiyun			"AFMR", "Line In";
139*4882a593Smuzhiyun	};
140*4882a593Smuzhiyun};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun&gpio8 {
143*4882a593Smuzhiyun	/* TI trees use GPIO instead of msecure, see also muxing */
144*4882a593Smuzhiyun	p234 {
145*4882a593Smuzhiyun		gpio-hog;
146*4882a593Smuzhiyun		gpios = <10 GPIO_ACTIVE_HIGH>;
147*4882a593Smuzhiyun		output-high;
148*4882a593Smuzhiyun		line-name = "gpio8_234/msecure";
149*4882a593Smuzhiyun	};
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&omap5_pmx_core {
153*4882a593Smuzhiyun	pinctrl-names = "default";
154*4882a593Smuzhiyun	pinctrl-0 = <
155*4882a593Smuzhiyun			&usbhost_pins
156*4882a593Smuzhiyun			&led_gpio_pins
157*4882a593Smuzhiyun	>;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun	twl6040_pins: pinmux_twl6040_pins {
160*4882a593Smuzhiyun		pinctrl-single,pins = <
161*4882a593Smuzhiyun			OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6)	/* mcspi1_somi.gpio5_141 */
162*4882a593Smuzhiyun		>;
163*4882a593Smuzhiyun	};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun	mcpdm_pins: pinmux_mcpdm_pins {
166*4882a593Smuzhiyun		pinctrl-single,pins = <
167*4882a593Smuzhiyun			OMAP5_IOPAD(0x182, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_clks.abe_clks */
168*4882a593Smuzhiyun			OMAP5_IOPAD(0x19c, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_ul_data.abemcpdm_ul_data */
169*4882a593Smuzhiyun			OMAP5_IOPAD(0x19e, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_dl_data.abemcpdm_dl_data */
170*4882a593Smuzhiyun			OMAP5_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE0)	/* abemcpdm_frame.abemcpdm_frame */
171*4882a593Smuzhiyun			OMAP5_IOPAD(0x1a2, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_lb_clk.abemcpdm_lb_clk */
172*4882a593Smuzhiyun		>;
173*4882a593Smuzhiyun	};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun	mcbsp1_pins: pinmux_mcbsp1_pins {
176*4882a593Smuzhiyun		pinctrl-single,pins = <
177*4882a593Smuzhiyun			OMAP5_IOPAD(0x18c, PIN_INPUT | MUX_MODE1)		/* abedmic_clk2.abemcbsp1_fsx */
178*4882a593Smuzhiyun			OMAP5_IOPAD(0x18e, PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* abedmic_clk3.abemcbsp1_dx */
179*4882a593Smuzhiyun			OMAP5_IOPAD(0x190, PIN_INPUT | MUX_MODE1)		/* abeslimbus1_clock.abemcbsp1_clkx */
180*4882a593Smuzhiyun			OMAP5_IOPAD(0x192, PIN_INPUT_PULLDOWN | MUX_MODE1)	/* abeslimbus1_data.abemcbsp1_dr */
181*4882a593Smuzhiyun		>;
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun	mcbsp2_pins: pinmux_mcbsp2_pins {
185*4882a593Smuzhiyun		pinctrl-single,pins = <
186*4882a593Smuzhiyun			OMAP5_IOPAD(0x194, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dr.abemcbsp2_dr */
187*4882a593Smuzhiyun			OMAP5_IOPAD(0x196, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dx.abemcbsp2_dx */
188*4882a593Smuzhiyun			OMAP5_IOPAD(0x198, PIN_INPUT | MUX_MODE0)		/* abemcbsp2_fsx.abemcbsp2_fsx */
189*4882a593Smuzhiyun			OMAP5_IOPAD(0x19a, PIN_INPUT | MUX_MODE0)		/* abemcbsp2_clkx.abemcbsp2_clkx */
190*4882a593Smuzhiyun		>;
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun	i2c1_pins: pinmux_i2c1_pins {
194*4882a593Smuzhiyun		pinctrl-single,pins = <
195*4882a593Smuzhiyun			OMAP5_IOPAD(0x1f2, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
196*4882a593Smuzhiyun			OMAP5_IOPAD(0x1f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
197*4882a593Smuzhiyun		>;
198*4882a593Smuzhiyun	};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun	mcspi2_pins: pinmux_mcspi2_pins {
201*4882a593Smuzhiyun		pinctrl-single,pins = <
202*4882a593Smuzhiyun			OMAP5_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)		/*  mcspi2_clk */
203*4882a593Smuzhiyun			OMAP5_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)		/*  mcspi2_simo */
204*4882a593Smuzhiyun			OMAP5_IOPAD(0x100, PIN_INPUT_PULLUP | MUX_MODE0)	/*  mcspi2_somi */
205*4882a593Smuzhiyun			OMAP5_IOPAD(0x102, PIN_OUTPUT | MUX_MODE0)		/*  mcspi2_cs0 */
206*4882a593Smuzhiyun		>;
207*4882a593Smuzhiyun	};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun	mcspi3_pins: pinmux_mcspi3_pins {
210*4882a593Smuzhiyun		pinctrl-single,pins = <
211*4882a593Smuzhiyun			OMAP5_IOPAD(0x0b8, PIN_INPUT | MUX_MODE1)		/*  mcspi3_somi */
212*4882a593Smuzhiyun			OMAP5_IOPAD(0x0ba, PIN_INPUT | MUX_MODE1)		/*  mcspi3_cs0 */
213*4882a593Smuzhiyun			OMAP5_IOPAD(0x0bc, PIN_INPUT | MUX_MODE1)		/*  mcspi3_simo */
214*4882a593Smuzhiyun			OMAP5_IOPAD(0x0be, PIN_INPUT | MUX_MODE1)		/*  mcspi3_clk */
215*4882a593Smuzhiyun		>;
216*4882a593Smuzhiyun	};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun	mmc3_pins: pinmux_mmc3_pins {
219*4882a593Smuzhiyun		pinctrl-single,pins = <
220*4882a593Smuzhiyun			OMAP5_IOPAD(0x01a4, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_clk */
221*4882a593Smuzhiyun			OMAP5_IOPAD(0x01a6, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_cmd */
222*4882a593Smuzhiyun			OMAP5_IOPAD(0x01a8, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data0 */
223*4882a593Smuzhiyun			OMAP5_IOPAD(0x01aa, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data1 */
224*4882a593Smuzhiyun			OMAP5_IOPAD(0x01ac, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data2 */
225*4882a593Smuzhiyun			OMAP5_IOPAD(0x01ae, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data3 */
226*4882a593Smuzhiyun		>;
227*4882a593Smuzhiyun	};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun	wlan_pins: pinmux_wlan_pins {
230*4882a593Smuzhiyun		pinctrl-single,pins = <
231*4882a593Smuzhiyun			OMAP5_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE6) /* mcspi1_clk.gpio5_140 */
232*4882a593Smuzhiyun		>;
233*4882a593Smuzhiyun	};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun	/* TI trees use GPIO mode; msecure mode does not work reliably? */
236*4882a593Smuzhiyun	palmas_msecure_pins: palmas_msecure_pins {
237*4882a593Smuzhiyun		pinctrl-single,pins = <
238*4882a593Smuzhiyun			OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
239*4882a593Smuzhiyun		>;
240*4882a593Smuzhiyun	};
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun	usbhost_pins: pinmux_usbhost_pins {
243*4882a593Smuzhiyun		pinctrl-single,pins = <
244*4882a593Smuzhiyun			OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
245*4882a593Smuzhiyun			OMAP5_IOPAD(0x0c6, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun			OMAP5_IOPAD(0x1de, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
248*4882a593Smuzhiyun			OMAP5_IOPAD(0x1e0, PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun			OMAP5_IOPAD(0x0b0, PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
251*4882a593Smuzhiyun			OMAP5_IOPAD(0x0ae, PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
252*4882a593Smuzhiyun		>;
253*4882a593Smuzhiyun	};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun	led_gpio_pins: pinmux_led_gpio_pins {
256*4882a593Smuzhiyun		pinctrl-single,pins = <
257*4882a593Smuzhiyun			OMAP5_IOPAD(0x1d6, PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
258*4882a593Smuzhiyun		>;
259*4882a593Smuzhiyun	};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun	uart1_pins: pinmux_uart1_pins {
262*4882a593Smuzhiyun		pinctrl-single,pins = <
263*4882a593Smuzhiyun			OMAP5_IOPAD(0x0a0, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
264*4882a593Smuzhiyun			OMAP5_IOPAD(0x0a2, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
265*4882a593Smuzhiyun			OMAP5_IOPAD(0x0a4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
266*4882a593Smuzhiyun			OMAP5_IOPAD(0x0a6, PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
267*4882a593Smuzhiyun		>;
268*4882a593Smuzhiyun	};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun	uart3_pins: pinmux_uart3_pins {
271*4882a593Smuzhiyun		pinctrl-single,pins = <
272*4882a593Smuzhiyun			OMAP5_IOPAD(0x1da, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
273*4882a593Smuzhiyun			OMAP5_IOPAD(0x1dc, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
274*4882a593Smuzhiyun		>;
275*4882a593Smuzhiyun	};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun	uart5_pins: pinmux_uart5_pins {
278*4882a593Smuzhiyun		pinctrl-single,pins = <
279*4882a593Smuzhiyun			OMAP5_IOPAD(0x1b0, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
280*4882a593Smuzhiyun			OMAP5_IOPAD(0x1b2, PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
281*4882a593Smuzhiyun			OMAP5_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
282*4882a593Smuzhiyun			OMAP5_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
283*4882a593Smuzhiyun		>;
284*4882a593Smuzhiyun	};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun	dss_hdmi_pins: pinmux_dss_hdmi_pins {
287*4882a593Smuzhiyun		pinctrl-single,pins = <
288*4882a593Smuzhiyun			OMAP5_IOPAD(0x13c, PIN_INPUT | MUX_MODE0)	/* hdmi_cec.hdmi_cec */
289*4882a593Smuzhiyun			OMAP5_IOPAD(0x140, PIN_INPUT | MUX_MODE0)	/* hdmi_ddc_scl.hdmi_ddc_scl */
290*4882a593Smuzhiyun			OMAP5_IOPAD(0x142, PIN_INPUT | MUX_MODE0)	/* hdmi_ddc_sda.hdmi_ddc_sda */
291*4882a593Smuzhiyun		>;
292*4882a593Smuzhiyun	};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun	tpd12s015_pins: pinmux_tpd12s015_pins {
295*4882a593Smuzhiyun		pinctrl-single,pins = <
296*4882a593Smuzhiyun			OMAP5_IOPAD(0x13e, PIN_INPUT_PULLDOWN | MUX_MODE6)	/* hdmi_hpd.gpio7_193 */
297*4882a593Smuzhiyun		>;
298*4882a593Smuzhiyun	};
299*4882a593Smuzhiyun};
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun&omap5_pmx_wkup {
302*4882a593Smuzhiyun	pinctrl-names = "default";
303*4882a593Smuzhiyun	pinctrl-0 = <
304*4882a593Smuzhiyun			&usbhost_wkup_pins
305*4882a593Smuzhiyun	>;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun	palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
308*4882a593Smuzhiyun		pinctrl-single,pins = <
309*4882a593Smuzhiyun			/* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
310*4882a593Smuzhiyun			OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
311*4882a593Smuzhiyun		>;
312*4882a593Smuzhiyun	};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun	usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
315*4882a593Smuzhiyun		pinctrl-single,pins = <
316*4882a593Smuzhiyun			OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
317*4882a593Smuzhiyun		>;
318*4882a593Smuzhiyun	};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun	wlcore_irq_pin: pinmux_wlcore_irq_pin {
321*4882a593Smuzhiyun		pinctrl-single,pins = <
322*4882a593Smuzhiyun			OMAP5_IOPAD(0x40, PIN_INPUT | MUX_MODE6)	/* llia_wakereqin.gpio1_wk14 */
323*4882a593Smuzhiyun		>;
324*4882a593Smuzhiyun	};
325*4882a593Smuzhiyun};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun&mmc1 {
328*4882a593Smuzhiyun	vmmc-supply = <&ldo9_reg>;
329*4882a593Smuzhiyun	bus-width = <4>;
330*4882a593Smuzhiyun};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun&mmc2 {
333*4882a593Smuzhiyun	vmmc-supply = <&vmmcsd_fixed>;
334*4882a593Smuzhiyun	bus-width = <8>;
335*4882a593Smuzhiyun	ti,non-removable;
336*4882a593Smuzhiyun};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun&mmc3 {
339*4882a593Smuzhiyun	vmmc-supply = <&vmmcsdio_fixed>;
340*4882a593Smuzhiyun	mmc-pwrseq = <&mmc3_pwrseq>;
341*4882a593Smuzhiyun	bus-width = <4>;
342*4882a593Smuzhiyun	non-removable;
343*4882a593Smuzhiyun	cap-power-off-card;
344*4882a593Smuzhiyun	pinctrl-names = "default";
345*4882a593Smuzhiyun	pinctrl-0 = <&mmc3_pins>;
346*4882a593Smuzhiyun	interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
347*4882a593Smuzhiyun			       &omap5_pmx_core 0x16a>;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun	#address-cells = <1>;
350*4882a593Smuzhiyun	#size-cells = <0>;
351*4882a593Smuzhiyun	wlcore: wlcore@2 {
352*4882a593Smuzhiyun		compatible = "ti,wl1271";
353*4882a593Smuzhiyun		reg = <2>;
354*4882a593Smuzhiyun		pinctrl-names = "default";
355*4882a593Smuzhiyun		pinctrl-0 = <&wlcore_irq_pin>;
356*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
357*4882a593Smuzhiyun		interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;	/* gpio 14 */
358*4882a593Smuzhiyun		ref-clock-frequency = <26000000>;
359*4882a593Smuzhiyun	};
360*4882a593Smuzhiyun};
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun&mmc4 {
363*4882a593Smuzhiyun	status = "disabled";
364*4882a593Smuzhiyun};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun&mmc5 {
367*4882a593Smuzhiyun	status = "disabled";
368*4882a593Smuzhiyun};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun&i2c1 {
371*4882a593Smuzhiyun	pinctrl-names = "default";
372*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_pins>;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun	clock-frequency = <400000>;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun	palmas: palmas@48 {
377*4882a593Smuzhiyun		compatible = "ti,palmas";
378*4882a593Smuzhiyun		/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
379*4882a593Smuzhiyun		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
380*4882a593Smuzhiyun		reg = <0x48>;
381*4882a593Smuzhiyun		interrupt-controller;
382*4882a593Smuzhiyun		#interrupt-cells = <2>;
383*4882a593Smuzhiyun		ti,system-power-controller;
384*4882a593Smuzhiyun		ti,mux-pad1 = <0xa1>;
385*4882a593Smuzhiyun		ti,mux-pad2 = <0x1b>;
386*4882a593Smuzhiyun		pinctrl-names = "default";
387*4882a593Smuzhiyun		pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun		palmas_gpio: gpio {
390*4882a593Smuzhiyun			compatible = "ti,palmas-gpio";
391*4882a593Smuzhiyun			gpio-controller;
392*4882a593Smuzhiyun			#gpio-cells = <2>;
393*4882a593Smuzhiyun		};
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun		extcon_usb3: palmas_usb {
396*4882a593Smuzhiyun			compatible = "ti,palmas-usb-vid";
397*4882a593Smuzhiyun			ti,enable-vbus-detection;
398*4882a593Smuzhiyun			ti,enable-id-detection;
399*4882a593Smuzhiyun			ti,wakeup;
400*4882a593Smuzhiyun			id-gpios = <&palmas_gpio 0 GPIO_ACTIVE_HIGH>;
401*4882a593Smuzhiyun		};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun		clk32kgaudio: palmas_clk32k@1 {
404*4882a593Smuzhiyun			compatible = "ti,palmas-clk32kgaudio";
405*4882a593Smuzhiyun			#clock-cells = <0>;
406*4882a593Smuzhiyun		};
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun		rtc {
409*4882a593Smuzhiyun			compatible = "ti,palmas-rtc";
410*4882a593Smuzhiyun			interrupt-parent = <&palmas>;
411*4882a593Smuzhiyun			interrupts = <8 IRQ_TYPE_NONE>;
412*4882a593Smuzhiyun			ti,backup-battery-chargeable;
413*4882a593Smuzhiyun			ti,backup-battery-charge-high-current;
414*4882a593Smuzhiyun		};
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun		gpadc: gpadc {
417*4882a593Smuzhiyun			compatible = "ti,palmas-gpadc";
418*4882a593Smuzhiyun			interrupts = <18 0
419*4882a593Smuzhiyun				      16 0
420*4882a593Smuzhiyun				      17 0>;
421*4882a593Smuzhiyun			#io-channel-cells = <1>;
422*4882a593Smuzhiyun			ti,channel0-current-microamp = <5>;
423*4882a593Smuzhiyun			ti,channel3-current-microamp = <10>;
424*4882a593Smuzhiyun		};
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun		palmas_pmic {
427*4882a593Smuzhiyun			compatible = "ti,palmas-pmic";
428*4882a593Smuzhiyun			interrupt-parent = <&palmas>;
429*4882a593Smuzhiyun			interrupts = <14 IRQ_TYPE_NONE>;
430*4882a593Smuzhiyun			interrupt-names = "short-irq";
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun			ti,ldo6-vibrator;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun			smps123-in-supply = <&vsys_cobra>;
435*4882a593Smuzhiyun			smps45-in-supply = <&vsys_cobra>;
436*4882a593Smuzhiyun			smps6-in-supply = <&vsys_cobra>;
437*4882a593Smuzhiyun			smps7-in-supply = <&vsys_cobra>;
438*4882a593Smuzhiyun			smps8-in-supply = <&vsys_cobra>;
439*4882a593Smuzhiyun			smps9-in-supply = <&vsys_cobra>;
440*4882a593Smuzhiyun			smps10_out2-in-supply = <&vsys_cobra>;
441*4882a593Smuzhiyun			smps10_out1-in-supply = <&vsys_cobra>;
442*4882a593Smuzhiyun			ldo1-in-supply = <&vsys_cobra>;
443*4882a593Smuzhiyun			ldo2-in-supply = <&vsys_cobra>;
444*4882a593Smuzhiyun			ldo3-in-supply = <&vdds_1v8_main>;
445*4882a593Smuzhiyun			ldo4-in-supply = <&vdds_1v8_main>;
446*4882a593Smuzhiyun			ldo5-in-supply = <&vsys_cobra>;
447*4882a593Smuzhiyun			ldo6-in-supply = <&vdds_1v8_main>;
448*4882a593Smuzhiyun			ldo7-in-supply = <&vsys_cobra>;
449*4882a593Smuzhiyun			ldo8-in-supply = <&vsys_cobra>;
450*4882a593Smuzhiyun			ldo9-in-supply = <&vmmcsd_fixed>;
451*4882a593Smuzhiyun			ldoln-in-supply = <&vsys_cobra>;
452*4882a593Smuzhiyun			ldousb-in-supply = <&vsys_cobra>;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun			regulators {
455*4882a593Smuzhiyun				smps123_reg: smps123 {
456*4882a593Smuzhiyun					/* VDD_OPP_MPU */
457*4882a593Smuzhiyun					regulator-name = "smps123";
458*4882a593Smuzhiyun					regulator-min-microvolt = < 600000>;
459*4882a593Smuzhiyun					regulator-max-microvolt = <1500000>;
460*4882a593Smuzhiyun					regulator-always-on;
461*4882a593Smuzhiyun					regulator-boot-on;
462*4882a593Smuzhiyun				};
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun				smps45_reg: smps45 {
465*4882a593Smuzhiyun					/* VDD_OPP_MM */
466*4882a593Smuzhiyun					regulator-name = "smps45";
467*4882a593Smuzhiyun					regulator-min-microvolt = < 600000>;
468*4882a593Smuzhiyun					regulator-max-microvolt = <1310000>;
469*4882a593Smuzhiyun					regulator-always-on;
470*4882a593Smuzhiyun					regulator-boot-on;
471*4882a593Smuzhiyun				};
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun				smps6_reg: smps6 {
474*4882a593Smuzhiyun					/* VDD_DDR3 - over VDD_SMPS6 */
475*4882a593Smuzhiyun					regulator-name = "smps6";
476*4882a593Smuzhiyun					regulator-min-microvolt = <1350000>;
477*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
478*4882a593Smuzhiyun					regulator-always-on;
479*4882a593Smuzhiyun					regulator-boot-on;
480*4882a593Smuzhiyun				};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun				vdds_1v8_main:
483*4882a593Smuzhiyun				smps7_reg: smps7 {
484*4882a593Smuzhiyun					/* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
485*4882a593Smuzhiyun					regulator-name = "smps7";
486*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
487*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
488*4882a593Smuzhiyun					regulator-always-on;
489*4882a593Smuzhiyun					regulator-boot-on;
490*4882a593Smuzhiyun				};
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun				smps8_reg: smps8 {
493*4882a593Smuzhiyun					/* VDD_OPP_CORE */
494*4882a593Smuzhiyun					regulator-name = "smps8";
495*4882a593Smuzhiyun					regulator-min-microvolt = < 600000>;
496*4882a593Smuzhiyun					regulator-max-microvolt = <1310000>;
497*4882a593Smuzhiyun					regulator-always-on;
498*4882a593Smuzhiyun					regulator-boot-on;
499*4882a593Smuzhiyun				};
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun				smps9_reg: smps9 {
502*4882a593Smuzhiyun					/* VDDA_2v1_AUD over VDD_2v1 */
503*4882a593Smuzhiyun					regulator-name = "smps9";
504*4882a593Smuzhiyun					regulator-min-microvolt = <2100000>;
505*4882a593Smuzhiyun					regulator-max-microvolt = <2100000>;
506*4882a593Smuzhiyun					ti,smps-range = <0x80>;
507*4882a593Smuzhiyun				};
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun				smps10_out2_reg: smps10_out2 {
510*4882a593Smuzhiyun					/* VBUS_5V_OTG */
511*4882a593Smuzhiyun					regulator-name = "smps10_out2";
512*4882a593Smuzhiyun					regulator-min-microvolt = <5000000>;
513*4882a593Smuzhiyun					regulator-max-microvolt = <5000000>;
514*4882a593Smuzhiyun					regulator-always-on;
515*4882a593Smuzhiyun					regulator-boot-on;
516*4882a593Smuzhiyun				};
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun				smps10_out1_reg: smps10_out1 {
519*4882a593Smuzhiyun					/* VBUS_5V_OTG */
520*4882a593Smuzhiyun					regulator-name = "smps10_out1";
521*4882a593Smuzhiyun					regulator-min-microvolt = <5000000>;
522*4882a593Smuzhiyun					regulator-max-microvolt = <5000000>;
523*4882a593Smuzhiyun				};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun				ldo1_reg: ldo1 {
526*4882a593Smuzhiyun					/* VDDAPHY_CAM: vdda_csiport */
527*4882a593Smuzhiyun					regulator-name = "ldo1";
528*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
529*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
530*4882a593Smuzhiyun				};
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun				ldo2_reg: ldo2 {
533*4882a593Smuzhiyun					/* VCC_2V8_DISP: Does not go anywhere */
534*4882a593Smuzhiyun					regulator-name = "ldo2";
535*4882a593Smuzhiyun					regulator-min-microvolt = <2800000>;
536*4882a593Smuzhiyun					regulator-max-microvolt = <2800000>;
537*4882a593Smuzhiyun					/* Unused */
538*4882a593Smuzhiyun					status = "disabled";
539*4882a593Smuzhiyun				};
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun				ldo3_reg: ldo3 {
542*4882a593Smuzhiyun					/* VDDAPHY_MDM: vdda_lli */
543*4882a593Smuzhiyun					regulator-name = "ldo3";
544*4882a593Smuzhiyun					regulator-min-microvolt = <1500000>;
545*4882a593Smuzhiyun					regulator-max-microvolt = <1500000>;
546*4882a593Smuzhiyun					regulator-boot-on;
547*4882a593Smuzhiyun					/* Only if Modem is used */
548*4882a593Smuzhiyun					status = "disabled";
549*4882a593Smuzhiyun				};
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun				ldo4_reg: ldo4 {
552*4882a593Smuzhiyun					/* VDDAPHY_DISP: vdda_dsiport/hdmi */
553*4882a593Smuzhiyun					regulator-name = "ldo4";
554*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
555*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
556*4882a593Smuzhiyun				};
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun				ldo5_reg: ldo5 {
559*4882a593Smuzhiyun					/* VDDA_1V8_PHY: usb/sata/hdmi.. */
560*4882a593Smuzhiyun					regulator-name = "ldo5";
561*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
562*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
563*4882a593Smuzhiyun					regulator-always-on;
564*4882a593Smuzhiyun					regulator-boot-on;
565*4882a593Smuzhiyun				};
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun				ldo6_reg: ldo6 {
568*4882a593Smuzhiyun					/* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
569*4882a593Smuzhiyun					regulator-name = "ldo6";
570*4882a593Smuzhiyun					regulator-min-microvolt = <1200000>;
571*4882a593Smuzhiyun					regulator-max-microvolt = <1200000>;
572*4882a593Smuzhiyun					regulator-always-on;
573*4882a593Smuzhiyun					regulator-boot-on;
574*4882a593Smuzhiyun				};
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun				ldo7_reg: ldo7 {
577*4882a593Smuzhiyun					/* VDD_VPP: vpp1 */
578*4882a593Smuzhiyun					regulator-name = "ldo7";
579*4882a593Smuzhiyun					regulator-min-microvolt = <2000000>;
580*4882a593Smuzhiyun					regulator-max-microvolt = <2000000>;
581*4882a593Smuzhiyun					/* Only for efuse reprograming! */
582*4882a593Smuzhiyun					status = "disabled";
583*4882a593Smuzhiyun				};
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun				ldo8_reg: ldo8 {
586*4882a593Smuzhiyun					/* VDD_3v0: Does not go anywhere */
587*4882a593Smuzhiyun					regulator-name = "ldo8";
588*4882a593Smuzhiyun					regulator-min-microvolt = <3000000>;
589*4882a593Smuzhiyun					regulator-max-microvolt = <3000000>;
590*4882a593Smuzhiyun					regulator-boot-on;
591*4882a593Smuzhiyun					/* Unused */
592*4882a593Smuzhiyun					status = "disabled";
593*4882a593Smuzhiyun				};
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun				ldo9_reg: ldo9 {
596*4882a593Smuzhiyun					/* VCC_DV_SDIO: vdds_sdcard */
597*4882a593Smuzhiyun					regulator-name = "ldo9";
598*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
599*4882a593Smuzhiyun					regulator-max-microvolt = <3000000>;
600*4882a593Smuzhiyun					regulator-boot-on;
601*4882a593Smuzhiyun				};
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun				ldoln_reg: ldoln {
604*4882a593Smuzhiyun					/* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
605*4882a593Smuzhiyun					regulator-name = "ldoln";
606*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
607*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
608*4882a593Smuzhiyun					regulator-always-on;
609*4882a593Smuzhiyun					regulator-boot-on;
610*4882a593Smuzhiyun				};
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun				ldousb_reg: ldousb {
613*4882a593Smuzhiyun					/* VDDA_3V_USB: VDDA_USBHS33 */
614*4882a593Smuzhiyun					regulator-name = "ldousb";
615*4882a593Smuzhiyun					regulator-min-microvolt = <3250000>;
616*4882a593Smuzhiyun					regulator-max-microvolt = <3250000>;
617*4882a593Smuzhiyun					regulator-always-on;
618*4882a593Smuzhiyun					regulator-boot-on;
619*4882a593Smuzhiyun				};
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun				regen3_reg: regen3 {
622*4882a593Smuzhiyun					/* REGEN3 controls LDO9 supply to card */
623*4882a593Smuzhiyun					regulator-name = "regen3";
624*4882a593Smuzhiyun					regulator-always-on;
625*4882a593Smuzhiyun					regulator-boot-on;
626*4882a593Smuzhiyun				};
627*4882a593Smuzhiyun			};
628*4882a593Smuzhiyun		};
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun		palmas_power_button: palmas_power_button {
631*4882a593Smuzhiyun			compatible = "ti,palmas-pwrbutton";
632*4882a593Smuzhiyun			interrupt-parent = <&palmas>;
633*4882a593Smuzhiyun			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
634*4882a593Smuzhiyun			wakeup-source;
635*4882a593Smuzhiyun		};
636*4882a593Smuzhiyun	};
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun	twl6040: twl@4b {
639*4882a593Smuzhiyun		compatible = "ti,twl6040";
640*4882a593Smuzhiyun		#clock-cells = <0>;
641*4882a593Smuzhiyun		reg = <0x4b>;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun		pinctrl-names = "default";
644*4882a593Smuzhiyun		pinctrl-0 = <&twl6040_pins>;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun		/* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
647*4882a593Smuzhiyun		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_LOW>;
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun		/* audpwron gpio defined in the board specific dts */
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun		vio-supply = <&smps7_reg>;
652*4882a593Smuzhiyun		v2v1-supply = <&smps9_reg>;
653*4882a593Smuzhiyun		enable-active-high;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun		clocks = <&clk32kgaudio>, <&fref_xtal_ck>;
656*4882a593Smuzhiyun		clock-names = "clk32k", "mclk";
657*4882a593Smuzhiyun	};
658*4882a593Smuzhiyun};
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun&mcpdm_module {
661*4882a593Smuzhiyun	/* Module on the SoC needs external clock from the PMIC */
662*4882a593Smuzhiyun	pinctrl-names = "default";
663*4882a593Smuzhiyun	pinctrl-0 = <&mcpdm_pins>;
664*4882a593Smuzhiyun	status = "okay";
665*4882a593Smuzhiyun};
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun&mcpdm {
668*4882a593Smuzhiyun	clocks = <&twl6040>;
669*4882a593Smuzhiyun	clock-names = "pdmclk";
670*4882a593Smuzhiyun};
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun&mcbsp1 {
673*4882a593Smuzhiyun	pinctrl-names = "default";
674*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp1_pins>;
675*4882a593Smuzhiyun	status = "okay";
676*4882a593Smuzhiyun};
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun&mcbsp2 {
679*4882a593Smuzhiyun	pinctrl-names = "default";
680*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp2_pins>;
681*4882a593Smuzhiyun	status = "okay";
682*4882a593Smuzhiyun};
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun&usbhshost {
685*4882a593Smuzhiyun	port2-mode = "ehci-hsic";
686*4882a593Smuzhiyun	port3-mode = "ehci-hsic";
687*4882a593Smuzhiyun};
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun&usbhsehci {
690*4882a593Smuzhiyun	phys = <0 &hsusb2_phy &hsusb3_phy>;
691*4882a593Smuzhiyun};
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun&usb3 {
694*4882a593Smuzhiyun	extcon = <&extcon_usb3>;
695*4882a593Smuzhiyun	vbus-supply = <&smps10_out1_reg>;
696*4882a593Smuzhiyun};
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun&dwc3 {
699*4882a593Smuzhiyun	extcon = <&extcon_usb3>;
700*4882a593Smuzhiyun	dr_mode = "otg";
701*4882a593Smuzhiyun};
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun&mcspi1 {
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun};
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun&mcspi2 {
708*4882a593Smuzhiyun	pinctrl-names = "default";
709*4882a593Smuzhiyun	pinctrl-0 = <&mcspi2_pins>;
710*4882a593Smuzhiyun};
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun&mcspi3 {
713*4882a593Smuzhiyun	pinctrl-names = "default";
714*4882a593Smuzhiyun	pinctrl-0 = <&mcspi3_pins>;
715*4882a593Smuzhiyun};
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun&uart1 {
718*4882a593Smuzhiyun	pinctrl-names = "default";
719*4882a593Smuzhiyun	pinctrl-0 = <&uart1_pins>;
720*4882a593Smuzhiyun};
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun&uart3 {
723*4882a593Smuzhiyun	pinctrl-names = "default";
724*4882a593Smuzhiyun	pinctrl-0 = <&uart3_pins>;
725*4882a593Smuzhiyun	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
726*4882a593Smuzhiyun			      <&omap5_pmx_core 0x19c>;
727*4882a593Smuzhiyun};
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun&uart5 {
730*4882a593Smuzhiyun	pinctrl-names = "default";
731*4882a593Smuzhiyun	pinctrl-0 = <&uart5_pins>;
732*4882a593Smuzhiyun};
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun&cpu0 {
735*4882a593Smuzhiyun	cpu0-supply = <&smps123_reg>;
736*4882a593Smuzhiyun};
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun&dss {
739*4882a593Smuzhiyun	status = "okay";
740*4882a593Smuzhiyun};
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun&hdmi {
743*4882a593Smuzhiyun	status = "okay";
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun	/* vdda-supply populated in board specific dts file */
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun	pinctrl-names = "default";
748*4882a593Smuzhiyun	pinctrl-0 = <&dss_hdmi_pins>;
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun	port {
751*4882a593Smuzhiyun		hdmi_out: endpoint {
752*4882a593Smuzhiyun			remote-endpoint = <&tpd12s015_in>;
753*4882a593Smuzhiyun		};
754*4882a593Smuzhiyun	};
755*4882a593Smuzhiyun};
756