xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/omap4-sdp.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun/dts-v1/;
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "omap443x.dtsi"
8*4882a593Smuzhiyun#include "elpida_ecb240abacn.dtsi"
9*4882a593Smuzhiyun#include "omap4-mcpdm.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "TI OMAP4 SDP board";
13*4882a593Smuzhiyun	compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	memory@80000000 {
16*4882a593Smuzhiyun		device_type = "memory";
17*4882a593Smuzhiyun		reg = <0x80000000 0x40000000>; /* 1 GB */
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	aliases {
21*4882a593Smuzhiyun		display0 = &lcd0;
22*4882a593Smuzhiyun		display1 = &lcd1;
23*4882a593Smuzhiyun		display2 = &hdmi0;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	vdd_eth: fixedregulator-vdd-eth {
27*4882a593Smuzhiyun		pinctrl-names = "default";
28*4882a593Smuzhiyun		pinctrl-0 = <&enet_enable_gpio>;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		compatible = "regulator-fixed";
31*4882a593Smuzhiyun		regulator-name = "VDD_ETH";
32*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
33*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
34*4882a593Smuzhiyun		gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>;  /* gpio line 48 */
35*4882a593Smuzhiyun		enable-active-high;
36*4882a593Smuzhiyun		regulator-boot-on;
37*4882a593Smuzhiyun		startup-delay-us = <25000>;
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	vbat: fixedregulator-vbat {
41*4882a593Smuzhiyun		compatible = "regulator-fixed";
42*4882a593Smuzhiyun		regulator-name = "VBAT";
43*4882a593Smuzhiyun		regulator-min-microvolt = <3750000>;
44*4882a593Smuzhiyun		regulator-max-microvolt = <3750000>;
45*4882a593Smuzhiyun		regulator-boot-on;
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	leds {
49*4882a593Smuzhiyun		compatible = "gpio-leds";
50*4882a593Smuzhiyun		debug0 {
51*4882a593Smuzhiyun			label = "omap4:green:debug0";
52*4882a593Smuzhiyun			gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; /* 61 */
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		debug1 {
56*4882a593Smuzhiyun			label = "omap4:green:debug1";
57*4882a593Smuzhiyun			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; /* 30 */
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		debug2 {
61*4882a593Smuzhiyun			label = "omap4:green:debug2";
62*4882a593Smuzhiyun			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; /* 7 */
63*4882a593Smuzhiyun		};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		debug3 {
66*4882a593Smuzhiyun			label = "omap4:green:debug3";
67*4882a593Smuzhiyun			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* 8 */
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun		debug4 {
71*4882a593Smuzhiyun			label = "omap4:green:debug4";
72*4882a593Smuzhiyun			gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; /* 50 */
73*4882a593Smuzhiyun		};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun		user1 {
76*4882a593Smuzhiyun			label = "omap4:blue:user";
77*4882a593Smuzhiyun			gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* 169 */
78*4882a593Smuzhiyun		};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun		user2 {
81*4882a593Smuzhiyun			label = "omap4:red:user";
82*4882a593Smuzhiyun			gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; /* 170 */
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		user3 {
86*4882a593Smuzhiyun			label = "omap4:green:user";
87*4882a593Smuzhiyun			gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* 139 */
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	pwmleds {
92*4882a593Smuzhiyun		compatible = "pwm-leds";
93*4882a593Smuzhiyun		kpad {
94*4882a593Smuzhiyun			label = "omap4::keypad";
95*4882a593Smuzhiyun			pwms = <&twl_pwm 0 7812500>;
96*4882a593Smuzhiyun			max-brightness = <127>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		charging {
100*4882a593Smuzhiyun			label = "omap4:green:chrg";
101*4882a593Smuzhiyun			pwms = <&twl_pwmled 0 7812500>;
102*4882a593Smuzhiyun			max-brightness = <255>;
103*4882a593Smuzhiyun		};
104*4882a593Smuzhiyun	};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun	backlight {
107*4882a593Smuzhiyun		compatible = "pwm-backlight";
108*4882a593Smuzhiyun		pwms = <&twl_pwm 1 7812500>;
109*4882a593Smuzhiyun		brightness-levels = <
110*4882a593Smuzhiyun				0 10 20 30 40
111*4882a593Smuzhiyun				50 60 70 80 90
112*4882a593Smuzhiyun				100 110 120 127
113*4882a593Smuzhiyun				>;
114*4882a593Smuzhiyun		default-brightness-level = <13>;
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	sound {
118*4882a593Smuzhiyun		compatible = "ti,abe-twl6040";
119*4882a593Smuzhiyun		ti,model = "SDP4430";
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun		ti,jack-detection = <1>;
122*4882a593Smuzhiyun		ti,mclk-freq = <38400000>;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun		ti,mcpdm = <&mcpdm>;
125*4882a593Smuzhiyun		ti,dmic = <&dmic>;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		ti,twl6040 = <&twl6040>;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		/* Audio routing */
130*4882a593Smuzhiyun		ti,audio-routing =
131*4882a593Smuzhiyun			"Headset Stereophone", "HSOL",
132*4882a593Smuzhiyun			"Headset Stereophone", "HSOR",
133*4882a593Smuzhiyun			"Earphone Spk", "EP",
134*4882a593Smuzhiyun			"Ext Spk", "HFL",
135*4882a593Smuzhiyun			"Ext Spk", "HFR",
136*4882a593Smuzhiyun			"Line Out", "AUXL",
137*4882a593Smuzhiyun			"Line Out", "AUXR",
138*4882a593Smuzhiyun			"Vibrator", "VIBRAL",
139*4882a593Smuzhiyun			"Vibrator", "VIBRAR",
140*4882a593Smuzhiyun			"HSMIC", "Headset Mic",
141*4882a593Smuzhiyun			"Headset Mic", "Headset Mic Bias",
142*4882a593Smuzhiyun			"MAINMIC", "Main Handset Mic",
143*4882a593Smuzhiyun			"Main Handset Mic", "Main Mic Bias",
144*4882a593Smuzhiyun			"SUBMIC", "Sub Handset Mic",
145*4882a593Smuzhiyun			"Sub Handset Mic", "Main Mic Bias",
146*4882a593Smuzhiyun			"AFML", "Line In",
147*4882a593Smuzhiyun			"AFMR", "Line In",
148*4882a593Smuzhiyun			"DMic", "Digital Mic",
149*4882a593Smuzhiyun			"Digital Mic", "Digital Mic1 Bias";
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun	/* regulator for wl12xx on sdio5 */
153*4882a593Smuzhiyun	wl12xx_vmmc: wl12xx_vmmc {
154*4882a593Smuzhiyun		pinctrl-names = "default";
155*4882a593Smuzhiyun		pinctrl-0 = <&wl12xx_gpio>;
156*4882a593Smuzhiyun		compatible = "regulator-fixed";
157*4882a593Smuzhiyun		regulator-name = "vwl1271";
158*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
159*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
160*4882a593Smuzhiyun		gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;
161*4882a593Smuzhiyun		startup-delay-us = <70000>;
162*4882a593Smuzhiyun		enable-active-high;
163*4882a593Smuzhiyun	};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun	tpd12s015: encoder {
166*4882a593Smuzhiyun		compatible = "ti,tpd12s015";
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun		gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>,	/* 60, CT CP HPD */
169*4882a593Smuzhiyun			<&gpio2 9 GPIO_ACTIVE_HIGH>,	/* 41, LS OE */
170*4882a593Smuzhiyun			<&gpio2 31 GPIO_ACTIVE_HIGH>;	/* 63, HPD */
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun		ports {
173*4882a593Smuzhiyun			#address-cells = <1>;
174*4882a593Smuzhiyun			#size-cells = <0>;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun			port@0 {
177*4882a593Smuzhiyun				reg = <0>;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun				tpd12s015_in: endpoint {
180*4882a593Smuzhiyun					remote-endpoint = <&hdmi_out>;
181*4882a593Smuzhiyun				};
182*4882a593Smuzhiyun			};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun			port@1 {
185*4882a593Smuzhiyun				reg = <1>;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun				tpd12s015_out: endpoint {
188*4882a593Smuzhiyun					remote-endpoint = <&hdmi_connector_in>;
189*4882a593Smuzhiyun				};
190*4882a593Smuzhiyun			};
191*4882a593Smuzhiyun		};
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun	hdmi0: connector {
195*4882a593Smuzhiyun		compatible = "hdmi-connector";
196*4882a593Smuzhiyun		label = "hdmi";
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun		type = "c";
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun		port {
201*4882a593Smuzhiyun			hdmi_connector_in: endpoint {
202*4882a593Smuzhiyun				remote-endpoint = <&tpd12s015_out>;
203*4882a593Smuzhiyun			};
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&omap4_pmx_core {
209*4882a593Smuzhiyun	pinctrl-names = "default";
210*4882a593Smuzhiyun	pinctrl-0 = <
211*4882a593Smuzhiyun			&dss_hdmi_pins
212*4882a593Smuzhiyun			&tpd12s015_pins
213*4882a593Smuzhiyun	>;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun	uart2_pins: pinmux_uart2_pins {
216*4882a593Smuzhiyun		pinctrl-single,pins = <
217*4882a593Smuzhiyun			OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_cts.uart2_cts */
218*4882a593Smuzhiyun			OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0)		/* uart2_rts.uart2_rts */
219*4882a593Smuzhiyun			OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_rx.uart2_rx */
220*4882a593Smuzhiyun			OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
221*4882a593Smuzhiyun		>;
222*4882a593Smuzhiyun	};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun	uart3_pins: pinmux_uart3_pins {
225*4882a593Smuzhiyun		pinctrl-single,pins = <
226*4882a593Smuzhiyun			OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart3_cts_rctx.uart3_cts_rctx */
227*4882a593Smuzhiyun			OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0)		/* uart3_rts_sd.uart3_rts_sd */
228*4882a593Smuzhiyun			OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0)		/* uart3_rx_irrx.uart3_rx_irrx */
229*4882a593Smuzhiyun			OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx_irtx.uart3_tx_irtx */
230*4882a593Smuzhiyun		>;
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun	uart4_pins: pinmux_uart4_pins {
234*4882a593Smuzhiyun		pinctrl-single,pins = <
235*4882a593Smuzhiyun			OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0)		/* uart4_rx.uart4_rx */
236*4882a593Smuzhiyun			OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0)		/* uart4_tx.uart4_tx */
237*4882a593Smuzhiyun		>;
238*4882a593Smuzhiyun	};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun	twl6040_pins: pinmux_twl6040_pins {
241*4882a593Smuzhiyun		pinctrl-single,pins = <
242*4882a593Smuzhiyun			OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3)		/* hdq_sio.gpio_127 */
243*4882a593Smuzhiyun			OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0)		/* sys_nirq2.sys_nirq2 */
244*4882a593Smuzhiyun		>;
245*4882a593Smuzhiyun	};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun	dmic_pins: pinmux_dmic_pins {
248*4882a593Smuzhiyun		pinctrl-single,pins = <
249*4882a593Smuzhiyun			OMAP4_IOPAD(0x110, PIN_OUTPUT | MUX_MODE0)		/* abe_dmic_clk1.abe_dmic_clk1 */
250*4882a593Smuzhiyun			OMAP4_IOPAD(0x112, PIN_INPUT | MUX_MODE0)		/* abe_dmic_din1.abe_dmic_din1 */
251*4882a593Smuzhiyun			OMAP4_IOPAD(0x114, PIN_INPUT | MUX_MODE0)		/* abe_dmic_din2.abe_dmic_din2 */
252*4882a593Smuzhiyun			OMAP4_IOPAD(0x116, PIN_INPUT | MUX_MODE0)		/* abe_dmic_din3.abe_dmic_din3 */
253*4882a593Smuzhiyun		>;
254*4882a593Smuzhiyun	};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun	mcbsp1_pins: pinmux_mcbsp1_pins {
257*4882a593Smuzhiyun		pinctrl-single,pins = <
258*4882a593Smuzhiyun			OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
259*4882a593Smuzhiyun			OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp1_dr.abe_mcbsp1_dr */
260*4882a593Smuzhiyun			OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp1_dx.abe_mcbsp1_dx */
261*4882a593Smuzhiyun			OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
262*4882a593Smuzhiyun		>;
263*4882a593Smuzhiyun	};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun	mcbsp2_pins: pinmux_mcbsp2_pins {
266*4882a593Smuzhiyun		pinctrl-single,pins = <
267*4882a593Smuzhiyun			OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
268*4882a593Smuzhiyun			OMAP4_IOPAD(0x0f8, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp2_dr.abe_mcbsp2_dr */
269*4882a593Smuzhiyun			OMAP4_IOPAD(0x0fa, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abe_mcbsp2_dx.abe_mcbsp2_dx */
270*4882a593Smuzhiyun			OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)		/* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
271*4882a593Smuzhiyun		>;
272*4882a593Smuzhiyun	};
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun	mcspi1_pins: pinmux_mcspi1_pins {
275*4882a593Smuzhiyun		pinctrl-single,pins = <
276*4882a593Smuzhiyun			OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0)		/*  mcspi1_clk.mcspi1_clk */
277*4882a593Smuzhiyun			OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0)		/*  mcspi1_somi.mcspi1_somi */
278*4882a593Smuzhiyun			OMAP4_IOPAD(0x136, PIN_INPUT | MUX_MODE0)		/*  mcspi1_simo.mcspi1_simo */
279*4882a593Smuzhiyun			OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0)		/*  mcspi1_cs0.mcspi1_cs0 */
280*4882a593Smuzhiyun		>;
281*4882a593Smuzhiyun	};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun	dss_hdmi_pins: pinmux_dss_hdmi_pins {
284*4882a593Smuzhiyun		pinctrl-single,pins = <
285*4882a593Smuzhiyun			OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)		/* hdmi_cec.hdmi_cec */
286*4882a593Smuzhiyun			OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_scl.hdmi_scl */
287*4882a593Smuzhiyun			OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_sda.hdmi_sda */
288*4882a593Smuzhiyun		>;
289*4882a593Smuzhiyun	};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun	tpd12s015_pins: pinmux_tpd12s015_pins {
292*4882a593Smuzhiyun		pinctrl-single,pins = <
293*4882a593Smuzhiyun			OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a17.gpio_41 */
294*4882a593Smuzhiyun			OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)		/* gpmc_nbe1.gpio_60 */
295*4882a593Smuzhiyun			OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* hdmi_hpd.gpio_63 */
296*4882a593Smuzhiyun		>;
297*4882a593Smuzhiyun	};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun	i2c1_pins: pinmux_i2c1_pins {
300*4882a593Smuzhiyun		pinctrl-single,pins = <
301*4882a593Smuzhiyun			OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
302*4882a593Smuzhiyun			OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
303*4882a593Smuzhiyun		>;
304*4882a593Smuzhiyun	};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun	i2c2_pins: pinmux_i2c2_pins {
307*4882a593Smuzhiyun		pinctrl-single,pins = <
308*4882a593Smuzhiyun			OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_scl */
309*4882a593Smuzhiyun			OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_sda */
310*4882a593Smuzhiyun		>;
311*4882a593Smuzhiyun	};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun	i2c3_pins: pinmux_i2c3_pins {
314*4882a593Smuzhiyun		pinctrl-single,pins = <
315*4882a593Smuzhiyun			OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_scl */
316*4882a593Smuzhiyun			OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_sda */
317*4882a593Smuzhiyun		>;
318*4882a593Smuzhiyun	};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun	i2c4_pins: pinmux_i2c4_pins {
321*4882a593Smuzhiyun		pinctrl-single,pins = <
322*4882a593Smuzhiyun			OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c4_scl */
323*4882a593Smuzhiyun			OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c4_sda */
324*4882a593Smuzhiyun		>;
325*4882a593Smuzhiyun	};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun	/* wl12xx GPIO output for WLAN_EN */
328*4882a593Smuzhiyun	wl12xx_gpio: pinmux_wl12xx_gpio {
329*4882a593Smuzhiyun		pinctrl-single,pins = <
330*4882a593Smuzhiyun			OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3)		/* gpmc_nwp.gpio_54 */
331*4882a593Smuzhiyun		>;
332*4882a593Smuzhiyun	};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun	/* wl12xx GPIO inputs and SDIO pins */
335*4882a593Smuzhiyun	wl12xx_pins: pinmux_wl12xx_pins {
336*4882a593Smuzhiyun		pinctrl-single,pins = <
337*4882a593Smuzhiyun			OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)		/* gpmc_ncs3.gpio_53 */
338*4882a593Smuzhiyun			OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_clk.sdmmc5_clk */
339*4882a593Smuzhiyun			OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_cmd.sdmmc5_cmd */
340*4882a593Smuzhiyun			OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat0.sdmmc5_dat0 */
341*4882a593Smuzhiyun			OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat1.sdmmc5_dat1 */
342*4882a593Smuzhiyun			OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat2.sdmmc5_dat2 */
343*4882a593Smuzhiyun			OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc5_dat3.sdmmc5_dat3 */
344*4882a593Smuzhiyun		>;
345*4882a593Smuzhiyun	};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun	/* gpio_48 for ENET_ENABLE */
348*4882a593Smuzhiyun	enet_enable_gpio: pinmux_enet_enable_gpio {
349*4882a593Smuzhiyun		pinctrl-single,pins = <
350*4882a593Smuzhiyun			OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a24.gpio_48 */
351*4882a593Smuzhiyun		>;
352*4882a593Smuzhiyun	};
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun	ks8851_pins: pinmux_ks8851_pins {
355*4882a593Smuzhiyun		pinctrl-single,pins = <
356*4882a593Smuzhiyun			/* ENET_INT */
357*4882a593Smuzhiyun			OMAP4_IOPAD(0x054, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_ad10.gpio_34 */
358*4882a593Smuzhiyun			/*
359*4882a593Smuzhiyun			 * Misterious pin which makes the ethernet working
360*4882a593Smuzhiyun			 * The legacy board file requested this pin on boot
361*4882a593Smuzhiyun			 * (ETH_KS8851_QUART) and set it to high, similarly to
362*4882a593Smuzhiyun			 * the ENET_ENABLE pin.
363*4882a593Smuzhiyun			 * We could use gpio-hog to keep it high, but let's use
364*4882a593Smuzhiyun			 * it as a reset GPIO for ks8851.
365*4882a593Smuzhiyun			 */
366*4882a593Smuzhiyun			OMAP4_IOPAD(0x13a, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* mcspi1_cs1.gpio_138 */
367*4882a593Smuzhiyun		>;
368*4882a593Smuzhiyun	};
369*4882a593Smuzhiyun};
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun&i2c1 {
372*4882a593Smuzhiyun	pinctrl-names = "default";
373*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_pins>;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun	clock-frequency = <400000>;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun	twl: twl@48 {
378*4882a593Smuzhiyun		reg = <0x48>;
379*4882a593Smuzhiyun		/* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
380*4882a593Smuzhiyun		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
381*4882a593Smuzhiyun	};
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun	twl6040: twl@4b {
384*4882a593Smuzhiyun		compatible = "ti,twl6040";
385*4882a593Smuzhiyun		#clock-cells = <0>;
386*4882a593Smuzhiyun		reg = <0x4b>;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun		pinctrl-names = "default";
389*4882a593Smuzhiyun		pinctrl-0 = <&twl6040_pins>;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun		/* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
392*4882a593Smuzhiyun		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
393*4882a593Smuzhiyun		ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>;  /* gpio line 127 */
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun		vio-supply = <&v1v8>;
396*4882a593Smuzhiyun		v2v1-supply = <&v2v1>;
397*4882a593Smuzhiyun		enable-active-high;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun		/* regulators for vibra motor */
400*4882a593Smuzhiyun		vddvibl-supply = <&vbat>;
401*4882a593Smuzhiyun		vddvibr-supply = <&vbat>;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun		vibra {
404*4882a593Smuzhiyun			/* Vibra driver, motor resistance parameters */
405*4882a593Smuzhiyun			ti,vibldrv-res = <8>;
406*4882a593Smuzhiyun			ti,vibrdrv-res = <3>;
407*4882a593Smuzhiyun			ti,viblmotor-res = <10>;
408*4882a593Smuzhiyun			ti,vibrmotor-res = <10>;
409*4882a593Smuzhiyun		};
410*4882a593Smuzhiyun	};
411*4882a593Smuzhiyun};
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun#include "twl6030.dtsi"
414*4882a593Smuzhiyun#include "twl6030_omap4.dtsi"
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun&i2c2 {
417*4882a593Smuzhiyun	pinctrl-names = "default";
418*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins>;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun	clock-frequency = <400000>;
421*4882a593Smuzhiyun};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun&i2c3 {
424*4882a593Smuzhiyun	pinctrl-names = "default";
425*4882a593Smuzhiyun	pinctrl-0 = <&i2c3_pins>;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun	clock-frequency = <400000>;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun	/*
430*4882a593Smuzhiyun	 * Temperature Sensor
431*4882a593Smuzhiyun	 * https://www.ti.com/lit/ds/symlink/tmp105.pdf
432*4882a593Smuzhiyun	 */
433*4882a593Smuzhiyun	tmp105@48 {
434*4882a593Smuzhiyun		compatible = "ti,tmp105";
435*4882a593Smuzhiyun		reg = <0x48>;
436*4882a593Smuzhiyun	};
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun	/*
439*4882a593Smuzhiyun	 * Ambient Light Sensor
440*4882a593Smuzhiyun	 * http://www.rohm.com/products/databook/sensor/pdf/bh1780gli-e.pdf
441*4882a593Smuzhiyun	 */
442*4882a593Smuzhiyun	bh1780@29 {
443*4882a593Smuzhiyun		compatible = "rohm,bh1780";
444*4882a593Smuzhiyun		reg = <0x29>;
445*4882a593Smuzhiyun	};
446*4882a593Smuzhiyun};
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun&i2c4 {
449*4882a593Smuzhiyun	pinctrl-names = "default";
450*4882a593Smuzhiyun	pinctrl-0 = <&i2c4_pins>;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun	clock-frequency = <400000>;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun	/*
455*4882a593Smuzhiyun	 * 3-Axis Digital Compass
456*4882a593Smuzhiyun	 * https://www.sparkfun.com/datasheets/Sensors/Magneto/HMC5843.pdf
457*4882a593Smuzhiyun	 */
458*4882a593Smuzhiyun	hmc5843@1e {
459*4882a593Smuzhiyun		compatible = "honeywell,hmc5843";
460*4882a593Smuzhiyun		reg = <0x1e>;
461*4882a593Smuzhiyun	};
462*4882a593Smuzhiyun};
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun&mcspi1 {
465*4882a593Smuzhiyun	pinctrl-names = "default";
466*4882a593Smuzhiyun	pinctrl-0 = <&mcspi1_pins>;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun	eth@0 {
469*4882a593Smuzhiyun		pinctrl-names = "default";
470*4882a593Smuzhiyun		pinctrl-0 = <&ks8851_pins>;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun		compatible = "ks8851";
473*4882a593Smuzhiyun		spi-max-frequency = <24000000>;
474*4882a593Smuzhiyun		reg = <0>;
475*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
476*4882a593Smuzhiyun		interrupts = <2 IRQ_TYPE_LEVEL_LOW>; /* gpio line 34 */
477*4882a593Smuzhiyun		vdd-supply = <&vdd_eth>;
478*4882a593Smuzhiyun		reset-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
479*4882a593Smuzhiyun	};
480*4882a593Smuzhiyun};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun&mmc1 {
483*4882a593Smuzhiyun	vmmc-supply = <&vmmc>;
484*4882a593Smuzhiyun	bus-width = <8>;
485*4882a593Smuzhiyun};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun&mmc2 {
488*4882a593Smuzhiyun	vmmc-supply = <&vaux1>;
489*4882a593Smuzhiyun	bus-width = <8>;
490*4882a593Smuzhiyun	ti,non-removable;
491*4882a593Smuzhiyun};
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun&mmc3 {
494*4882a593Smuzhiyun	status = "disabled";
495*4882a593Smuzhiyun};
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun&mmc4 {
498*4882a593Smuzhiyun	status = "disabled";
499*4882a593Smuzhiyun};
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun&mmc5 {
502*4882a593Smuzhiyun	pinctrl-names = "default";
503*4882a593Smuzhiyun	pinctrl-0 = <&wl12xx_pins>;
504*4882a593Smuzhiyun	vmmc-supply = <&wl12xx_vmmc>;
505*4882a593Smuzhiyun	non-removable;
506*4882a593Smuzhiyun	bus-width = <4>;
507*4882a593Smuzhiyun	cap-power-off-card;
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun	#address-cells = <1>;
510*4882a593Smuzhiyun	#size-cells = <0>;
511*4882a593Smuzhiyun	wlcore: wlcore@2 {
512*4882a593Smuzhiyun		compatible = "ti,wl1281";
513*4882a593Smuzhiyun		reg = <2>;
514*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
515*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */
516*4882a593Smuzhiyun		ref-clock-frequency = <26000000>;
517*4882a593Smuzhiyun		tcxo-clock-frequency = <26000000>;
518*4882a593Smuzhiyun	};
519*4882a593Smuzhiyun};
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun&emif1 {
522*4882a593Smuzhiyun	cs1-used;
523*4882a593Smuzhiyun	device-handle = <&elpida_ECB240ABACN>;
524*4882a593Smuzhiyun};
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun&emif2 {
527*4882a593Smuzhiyun	cs1-used;
528*4882a593Smuzhiyun	device-handle = <&elpida_ECB240ABACN>;
529*4882a593Smuzhiyun};
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun&keypad {
532*4882a593Smuzhiyun	keypad,num-rows = <8>;
533*4882a593Smuzhiyun	keypad,num-columns = <8>;
534*4882a593Smuzhiyun	linux,keymap = <0x00000012	/* KEY_E */
535*4882a593Smuzhiyun			0x00010013	/* KEY_R */
536*4882a593Smuzhiyun			0x00020014	/* KEY_T */
537*4882a593Smuzhiyun			0x00030066	/* KEY_HOME */
538*4882a593Smuzhiyun			0x0004003f	/* KEY_F5 */
539*4882a593Smuzhiyun			0x000500f0	/* KEY_UNKNOWN */
540*4882a593Smuzhiyun			0x00060017	/* KEY_I */
541*4882a593Smuzhiyun			0x0007002a	/* KEY_LEFTSHIFT */
542*4882a593Smuzhiyun			0x01000020	/* KEY_D*/
543*4882a593Smuzhiyun			0x01010021	/* KEY_F */
544*4882a593Smuzhiyun			0x01020022	/* KEY_G */
545*4882a593Smuzhiyun			0x010300e7	/* KEY_SEND */
546*4882a593Smuzhiyun			0x01040040	/* KEY_F6 */
547*4882a593Smuzhiyun			0x010500f0	/* KEY_UNKNOWN */
548*4882a593Smuzhiyun			0x01060025	/* KEY_K */
549*4882a593Smuzhiyun			0x0107001c	/* KEY_ENTER */
550*4882a593Smuzhiyun			0x0200002d	/* KEY_X */
551*4882a593Smuzhiyun			0x0201002e	/* KEY_C */
552*4882a593Smuzhiyun			0x0202002f	/* KEY_V */
553*4882a593Smuzhiyun			0x0203006b	/* KEY_END */
554*4882a593Smuzhiyun			0x02040041	/* KEY_F7 */
555*4882a593Smuzhiyun			0x020500f0	/* KEY_UNKNOWN */
556*4882a593Smuzhiyun			0x02060034	/* KEY_DOT */
557*4882a593Smuzhiyun			0x0207003a	/* KEY_CAPSLOCK */
558*4882a593Smuzhiyun			0x0300002c	/* KEY_Z */
559*4882a593Smuzhiyun			0x0301004e	/* KEY_KPLUS */
560*4882a593Smuzhiyun			0x03020030	/* KEY_B */
561*4882a593Smuzhiyun			0x0303003b	/* KEY_F1 */
562*4882a593Smuzhiyun			0x03040042	/* KEY_F8 */
563*4882a593Smuzhiyun			0x030500f0	/* KEY_UNKNOWN */
564*4882a593Smuzhiyun			0x03060018	/* KEY_O */
565*4882a593Smuzhiyun			0x03070039	/* KEY_SPACE */
566*4882a593Smuzhiyun			0x04000011	/* KEY_W */
567*4882a593Smuzhiyun			0x04010015	/* KEY_Y */
568*4882a593Smuzhiyun			0x04020016	/* KEY_U */
569*4882a593Smuzhiyun			0x0403003c	/* KEY_F2 */
570*4882a593Smuzhiyun			0x04040073	/* KEY_VOLUMEUP */
571*4882a593Smuzhiyun			0x040500f0	/* KEY_UNKNOWN */
572*4882a593Smuzhiyun			0x04060026	/* KEY_L */
573*4882a593Smuzhiyun			0x04070069	/* KEY_LEFT */
574*4882a593Smuzhiyun			0x0500001f	/* KEY_S */
575*4882a593Smuzhiyun			0x05010023	/* KEY_H */
576*4882a593Smuzhiyun			0x05020024	/* KEY_J */
577*4882a593Smuzhiyun			0x0503003d	/* KEY_F3 */
578*4882a593Smuzhiyun			0x05040043	/* KEY_F9 */
579*4882a593Smuzhiyun			0x05050072	/* KEY_VOLUMEDOWN */
580*4882a593Smuzhiyun			0x05060032	/* KEY_M */
581*4882a593Smuzhiyun			0x0507006a	/* KEY_RIGHT */
582*4882a593Smuzhiyun			0x06000010	/* KEY_Q */
583*4882a593Smuzhiyun			0x0601001e	/* KEY_A */
584*4882a593Smuzhiyun			0x06020031	/* KEY_N */
585*4882a593Smuzhiyun			0x0603009e	/* KEY_BACK */
586*4882a593Smuzhiyun			0x0604000e	/* KEY_BACKSPACE */
587*4882a593Smuzhiyun			0x060500f0	/* KEY_UNKNOWN */
588*4882a593Smuzhiyun			0x06060019	/* KEY_P */
589*4882a593Smuzhiyun			0x06070067	/* KEY_UP */
590*4882a593Smuzhiyun			0x07000094	/* KEY_PROG1 */
591*4882a593Smuzhiyun			0x07010095	/* KEY_PROG2 */
592*4882a593Smuzhiyun			0x070200ca	/* KEY_PROG3 */
593*4882a593Smuzhiyun			0x070300cb	/* KEY_PROG4 */
594*4882a593Smuzhiyun			0x0704003e	/* KEY_F4 */
595*4882a593Smuzhiyun			0x070500f0	/* KEY_UNKNOWN */
596*4882a593Smuzhiyun			0x07060160	/* KEY_OK */
597*4882a593Smuzhiyun			0x0707006c>;	/* KEY_DOWN */
598*4882a593Smuzhiyun	linux,input-no-autorepeat;
599*4882a593Smuzhiyun};
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun&uart2 {
602*4882a593Smuzhiyun	interrupts-extended = <&wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
603*4882a593Smuzhiyun			       &omap4_pmx_core OMAP4_UART2_RX>;
604*4882a593Smuzhiyun	pinctrl-names = "default";
605*4882a593Smuzhiyun	pinctrl-0 = <&uart2_pins>;
606*4882a593Smuzhiyun};
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun&uart3 {
609*4882a593Smuzhiyun	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
610*4882a593Smuzhiyun			       &omap4_pmx_core OMAP4_UART3_RX>;
611*4882a593Smuzhiyun	pinctrl-names = "default";
612*4882a593Smuzhiyun	pinctrl-0 = <&uart3_pins>;
613*4882a593Smuzhiyun};
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun&uart4 {
616*4882a593Smuzhiyun	interrupts-extended = <&wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
617*4882a593Smuzhiyun			       &omap4_pmx_core OMAP4_UART4_RX>;
618*4882a593Smuzhiyun	pinctrl-names = "default";
619*4882a593Smuzhiyun	pinctrl-0 = <&uart4_pins>;
620*4882a593Smuzhiyun};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun&mcbsp1 {
623*4882a593Smuzhiyun	pinctrl-names = "default";
624*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp1_pins>;
625*4882a593Smuzhiyun	status = "okay";
626*4882a593Smuzhiyun};
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun&mcbsp2 {
629*4882a593Smuzhiyun	pinctrl-names = "default";
630*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp2_pins>;
631*4882a593Smuzhiyun	status = "okay";
632*4882a593Smuzhiyun};
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun&dmic {
635*4882a593Smuzhiyun	pinctrl-names = "default";
636*4882a593Smuzhiyun	pinctrl-0 = <&dmic_pins>;
637*4882a593Smuzhiyun	status = "okay";
638*4882a593Smuzhiyun};
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun&twl_usb_comparator {
641*4882a593Smuzhiyun	usb-supply = <&vusb>;
642*4882a593Smuzhiyun};
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun&usb_otg_hs {
645*4882a593Smuzhiyun	interface-type = <1>;
646*4882a593Smuzhiyun	mode = <3>;
647*4882a593Smuzhiyun	power = <50>;
648*4882a593Smuzhiyun};
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun&dss {
651*4882a593Smuzhiyun	status = "okay";
652*4882a593Smuzhiyun};
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun&dsi1 {
655*4882a593Smuzhiyun	status = "okay";
656*4882a593Smuzhiyun	vdd-supply = <&vcxio>;
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun	port {
659*4882a593Smuzhiyun		dsi1_out_ep: endpoint {
660*4882a593Smuzhiyun			remote-endpoint = <&lcd0_in>;
661*4882a593Smuzhiyun			lanes = <0 1 2 3 4 5>;
662*4882a593Smuzhiyun		};
663*4882a593Smuzhiyun	};
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun	lcd0: panel@0 {
666*4882a593Smuzhiyun		compatible = "tpo,taal", "panel-dsi-cm";
667*4882a593Smuzhiyun		reg = <0>;
668*4882a593Smuzhiyun		label = "lcd0";
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun		reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;	/* 102 */
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun		port {
673*4882a593Smuzhiyun			lcd0_in: endpoint {
674*4882a593Smuzhiyun				remote-endpoint = <&dsi1_out_ep>;
675*4882a593Smuzhiyun			};
676*4882a593Smuzhiyun		};
677*4882a593Smuzhiyun	};
678*4882a593Smuzhiyun};
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun&dsi2 {
681*4882a593Smuzhiyun	status = "okay";
682*4882a593Smuzhiyun	vdd-supply = <&vcxio>;
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun	port {
685*4882a593Smuzhiyun		dsi2_out_ep: endpoint {
686*4882a593Smuzhiyun			remote-endpoint = <&lcd1_in>;
687*4882a593Smuzhiyun			lanes = <0 1 2 3 4 5>;
688*4882a593Smuzhiyun		};
689*4882a593Smuzhiyun	};
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun	lcd1: panel@0 {
692*4882a593Smuzhiyun		compatible = "tpo,taal", "panel-dsi-cm";
693*4882a593Smuzhiyun		reg = <0>;
694*4882a593Smuzhiyun		label = "lcd1";
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun		reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;	/* 104 */
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun		port {
699*4882a593Smuzhiyun			lcd1_in: endpoint {
700*4882a593Smuzhiyun				remote-endpoint = <&dsi2_out_ep>;
701*4882a593Smuzhiyun			};
702*4882a593Smuzhiyun		};
703*4882a593Smuzhiyun	};
704*4882a593Smuzhiyun};
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun&hdmi {
707*4882a593Smuzhiyun	status = "okay";
708*4882a593Smuzhiyun	vdda-supply = <&vdac>;
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun	port {
711*4882a593Smuzhiyun		hdmi_out: endpoint {
712*4882a593Smuzhiyun			remote-endpoint = <&tpd12s015_in>;
713*4882a593Smuzhiyun		};
714*4882a593Smuzhiyun	};
715*4882a593Smuzhiyun};
716