1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2011-2013 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 6*4882a593Smuzhiyun#include "elpida_ecb240abacn.dtsi" 7*4882a593Smuzhiyun#include "omap4-mcpdm.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun memory@80000000 { 11*4882a593Smuzhiyun device_type = "memory"; 12*4882a593Smuzhiyun reg = <0x80000000 0x40000000>; /* 1 GB */ 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun reserved-memory { 16*4882a593Smuzhiyun #address-cells = <1>; 17*4882a593Smuzhiyun #size-cells = <1>; 18*4882a593Smuzhiyun ranges; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun dsp_memory_region: dsp-memory@98000000 { 21*4882a593Smuzhiyun compatible = "shared-dma-pool"; 22*4882a593Smuzhiyun reg = <0x98000000 0x800000>; 23*4882a593Smuzhiyun reusable; 24*4882a593Smuzhiyun status = "okay"; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun ipu_memory_region: ipu-memory@98800000 { 28*4882a593Smuzhiyun compatible = "shared-dma-pool"; 29*4882a593Smuzhiyun reg = <0x98800000 0x7000000>; 30*4882a593Smuzhiyun reusable; 31*4882a593Smuzhiyun status = "okay"; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun chosen { 36*4882a593Smuzhiyun stdout-path = &uart3; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun aliases { 40*4882a593Smuzhiyun display0 = &dvi0; 41*4882a593Smuzhiyun display1 = &hdmi0; 42*4882a593Smuzhiyun ethernet = ðernet; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun leds: leds { 46*4882a593Smuzhiyun compatible = "gpio-leds"; 47*4882a593Smuzhiyun pinctrl-names = "default"; 48*4882a593Smuzhiyun pinctrl-0 = < 49*4882a593Smuzhiyun &led_wkgpio_pins 50*4882a593Smuzhiyun >; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun heartbeat { 53*4882a593Smuzhiyun label = "pandaboard::status1"; 54*4882a593Smuzhiyun gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 55*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun mmc { 59*4882a593Smuzhiyun label = "pandaboard::status2"; 60*4882a593Smuzhiyun gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun linux,default-trigger = "mmc0"; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun gpio_keys: gpio_keys { 66*4882a593Smuzhiyun compatible = "gpio-keys"; 67*4882a593Smuzhiyun pinctrl-names = "default"; 68*4882a593Smuzhiyun pinctrl-0 = < 69*4882a593Smuzhiyun &button_pins 70*4882a593Smuzhiyun >; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun buttonS2 { 73*4882a593Smuzhiyun label = "button S2"; 74*4882a593Smuzhiyun gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; /* gpio_121 */ 75*4882a593Smuzhiyun linux,code = <BTN_0>; 76*4882a593Smuzhiyun wakeup-source; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun sound: sound { 81*4882a593Smuzhiyun compatible = "ti,abe-twl6040"; 82*4882a593Smuzhiyun ti,model = "PandaBoard"; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun ti,mclk-freq = <38400000>; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun ti,mcpdm = <&mcpdm>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun ti,twl6040 = <&twl6040>; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* Audio routing */ 91*4882a593Smuzhiyun ti,audio-routing = 92*4882a593Smuzhiyun "Headset Stereophone", "HSOL", 93*4882a593Smuzhiyun "Headset Stereophone", "HSOR", 94*4882a593Smuzhiyun "Ext Spk", "HFL", 95*4882a593Smuzhiyun "Ext Spk", "HFR", 96*4882a593Smuzhiyun "Line Out", "AUXL", 97*4882a593Smuzhiyun "Line Out", "AUXR", 98*4882a593Smuzhiyun "HSMIC", "Headset Mic", 99*4882a593Smuzhiyun "Headset Mic", "Headset Mic Bias", 100*4882a593Smuzhiyun "AFML", "Line In", 101*4882a593Smuzhiyun "AFMR", "Line In"; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* HS USB Port 1 Power */ 105*4882a593Smuzhiyun hsusb1_power: hsusb1_power_reg { 106*4882a593Smuzhiyun compatible = "regulator-fixed"; 107*4882a593Smuzhiyun regulator-name = "hsusb1_vbus"; 108*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 109*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 110*4882a593Smuzhiyun gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>; /* gpio_1 */ 111*4882a593Smuzhiyun startup-delay-us = <70000>; 112*4882a593Smuzhiyun enable-active-high; 113*4882a593Smuzhiyun /* 114*4882a593Smuzhiyun * boot-on is required along with always-on as the 115*4882a593Smuzhiyun * regulator framework doesn't enable the regulator 116*4882a593Smuzhiyun * if boot-on is not there. 117*4882a593Smuzhiyun */ 118*4882a593Smuzhiyun regulator-always-on; 119*4882a593Smuzhiyun regulator-boot-on; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /* HS USB Host PHY on PORT 1 */ 123*4882a593Smuzhiyun hsusb1_phy: hsusb1_phy { 124*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 125*4882a593Smuzhiyun reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */ 126*4882a593Smuzhiyun #phy-cells = <0>; 127*4882a593Smuzhiyun vcc-supply = <&hsusb1_power>; 128*4882a593Smuzhiyun clocks = <&auxclk3_ck>; 129*4882a593Smuzhiyun clock-names = "main_clk"; 130*4882a593Smuzhiyun clock-frequency = <19200000>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* regulator for wl12xx on sdio5 */ 134*4882a593Smuzhiyun wl12xx_vmmc: wl12xx_vmmc { 135*4882a593Smuzhiyun pinctrl-names = "default"; 136*4882a593Smuzhiyun pinctrl-0 = <&wl12xx_gpio>; 137*4882a593Smuzhiyun compatible = "regulator-fixed"; 138*4882a593Smuzhiyun regulator-name = "vwl1271"; 139*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 140*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 141*4882a593Smuzhiyun gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; 142*4882a593Smuzhiyun startup-delay-us = <70000>; 143*4882a593Smuzhiyun enable-active-high; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun tfp410: encoder0 { 147*4882a593Smuzhiyun compatible = "ti,tfp410"; 148*4882a593Smuzhiyun powerdown-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* gpio_0 */ 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun ports { 151*4882a593Smuzhiyun #address-cells = <1>; 152*4882a593Smuzhiyun #size-cells = <0>; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun port@0 { 155*4882a593Smuzhiyun reg = <0>; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun tfp410_in: endpoint { 158*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun port@1 { 163*4882a593Smuzhiyun reg = <1>; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun tfp410_out: endpoint { 166*4882a593Smuzhiyun remote-endpoint = <&dvi_connector_in>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun dvi0: connector0 { 173*4882a593Smuzhiyun compatible = "dvi-connector"; 174*4882a593Smuzhiyun label = "dvi"; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun digital; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun ddc-i2c-bus = <&i2c3>; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun port { 181*4882a593Smuzhiyun dvi_connector_in: endpoint { 182*4882a593Smuzhiyun remote-endpoint = <&tfp410_out>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun tpd12s015: encoder1 { 188*4882a593Smuzhiyun compatible = "ti,tpd12s015"; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */ 191*4882a593Smuzhiyun <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */ 192*4882a593Smuzhiyun <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */ 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun ports { 195*4882a593Smuzhiyun #address-cells = <1>; 196*4882a593Smuzhiyun #size-cells = <0>; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun port@0 { 199*4882a593Smuzhiyun reg = <0>; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun tpd12s015_in: endpoint { 202*4882a593Smuzhiyun remote-endpoint = <&hdmi_out>; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun port@1 { 207*4882a593Smuzhiyun reg = <1>; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun tpd12s015_out: endpoint { 210*4882a593Smuzhiyun remote-endpoint = <&hdmi_connector_in>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun hdmi0: connector1 { 217*4882a593Smuzhiyun compatible = "hdmi-connector"; 218*4882a593Smuzhiyun label = "hdmi"; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun type = "a"; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun port { 223*4882a593Smuzhiyun hdmi_connector_in: endpoint { 224*4882a593Smuzhiyun remote-endpoint = <&tpd12s015_out>; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun}; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun&omap4_pmx_core { 231*4882a593Smuzhiyun pinctrl-names = "default"; 232*4882a593Smuzhiyun pinctrl-0 = < 233*4882a593Smuzhiyun &dss_dpi_pins 234*4882a593Smuzhiyun &tfp410_pins 235*4882a593Smuzhiyun &dss_hdmi_pins 236*4882a593Smuzhiyun &tpd12s015_pins 237*4882a593Smuzhiyun &hsusbb1_pins 238*4882a593Smuzhiyun >; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun twl6040_pins: pinmux_twl6040_pins { 241*4882a593Smuzhiyun pinctrl-single,pins = < 242*4882a593Smuzhiyun OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ 243*4882a593Smuzhiyun OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */ 244*4882a593Smuzhiyun >; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun mcbsp1_pins: pinmux_mcbsp1_pins { 248*4882a593Smuzhiyun pinctrl-single,pins = < 249*4882a593Smuzhiyun OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */ 250*4882a593Smuzhiyun OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */ 251*4882a593Smuzhiyun OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */ 252*4882a593Smuzhiyun OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */ 253*4882a593Smuzhiyun >; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun dss_dpi_pins: pinmux_dss_dpi_pins { 257*4882a593Smuzhiyun pinctrl-single,pins = < 258*4882a593Smuzhiyun OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5) /* dispc2_data23 */ 259*4882a593Smuzhiyun OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5) /* dispc2_data22 */ 260*4882a593Smuzhiyun OMAP4_IOPAD(0x166, PIN_OUTPUT | MUX_MODE5) /* dispc2_data21 */ 261*4882a593Smuzhiyun OMAP4_IOPAD(0x168, PIN_OUTPUT | MUX_MODE5) /* dispc2_data20 */ 262*4882a593Smuzhiyun OMAP4_IOPAD(0x16a, PIN_OUTPUT | MUX_MODE5) /* dispc2_data19 */ 263*4882a593Smuzhiyun OMAP4_IOPAD(0x16c, PIN_OUTPUT | MUX_MODE5) /* dispc2_data18 */ 264*4882a593Smuzhiyun OMAP4_IOPAD(0x16e, PIN_OUTPUT | MUX_MODE5) /* dispc2_data15 */ 265*4882a593Smuzhiyun OMAP4_IOPAD(0x170, PIN_OUTPUT | MUX_MODE5) /* dispc2_data14 */ 266*4882a593Smuzhiyun OMAP4_IOPAD(0x172, PIN_OUTPUT | MUX_MODE5) /* dispc2_data13 */ 267*4882a593Smuzhiyun OMAP4_IOPAD(0x174, PIN_OUTPUT | MUX_MODE5) /* dispc2_data12 */ 268*4882a593Smuzhiyun OMAP4_IOPAD(0x176, PIN_OUTPUT | MUX_MODE5) /* dispc2_data11 */ 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data10 */ 271*4882a593Smuzhiyun OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE5) /* dispc2_data9 */ 272*4882a593Smuzhiyun OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE5) /* dispc2_data16 */ 273*4882a593Smuzhiyun OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE5) /* dispc2_data17 */ 274*4882a593Smuzhiyun OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE5) /* dispc2_hsync */ 275*4882a593Smuzhiyun OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE5) /* dispc2_pclk */ 276*4882a593Smuzhiyun OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE5) /* dispc2_vsync */ 277*4882a593Smuzhiyun OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE5) /* dispc2_de */ 278*4882a593Smuzhiyun OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data8 */ 279*4882a593Smuzhiyun OMAP4_IOPAD(0x1c6, PIN_OUTPUT | MUX_MODE5) /* dispc2_data7 */ 280*4882a593Smuzhiyun OMAP4_IOPAD(0x1c8, PIN_OUTPUT | MUX_MODE5) /* dispc2_data6 */ 281*4882a593Smuzhiyun OMAP4_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE5) /* dispc2_data5 */ 282*4882a593Smuzhiyun OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE5) /* dispc2_data4 */ 283*4882a593Smuzhiyun OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE5) /* dispc2_data3 */ 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE5) /* dispc2_data2 */ 286*4882a593Smuzhiyun OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE5) /* dispc2_data1 */ 287*4882a593Smuzhiyun OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data0 */ 288*4882a593Smuzhiyun >; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun tfp410_pins: pinmux_tfp410_pins { 292*4882a593Smuzhiyun pinctrl-single,pins = < 293*4882a593Smuzhiyun OMAP4_IOPAD(0x184, PIN_OUTPUT | MUX_MODE3) /* gpio_0 */ 294*4882a593Smuzhiyun >; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun dss_hdmi_pins: pinmux_dss_hdmi_pins { 298*4882a593Smuzhiyun pinctrl-single,pins = < 299*4882a593Smuzhiyun OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */ 300*4882a593Smuzhiyun OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */ 301*4882a593Smuzhiyun OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */ 302*4882a593Smuzhiyun >; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun tpd12s015_pins: pinmux_tpd12s015_pins { 306*4882a593Smuzhiyun pinctrl-single,pins = < 307*4882a593Smuzhiyun OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */ 308*4882a593Smuzhiyun OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */ 309*4882a593Smuzhiyun OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */ 310*4882a593Smuzhiyun >; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun hsusbb1_pins: pinmux_hsusbb1_pins { 314*4882a593Smuzhiyun pinctrl-single,pins = < 315*4882a593Smuzhiyun OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */ 316*4882a593Smuzhiyun OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */ 317*4882a593Smuzhiyun OMAP4_IOPAD(0x0c6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */ 318*4882a593Smuzhiyun OMAP4_IOPAD(0x0c8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */ 319*4882a593Smuzhiyun OMAP4_IOPAD(0x0ca, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */ 320*4882a593Smuzhiyun OMAP4_IOPAD(0x0cc, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */ 321*4882a593Smuzhiyun OMAP4_IOPAD(0x0ce, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */ 322*4882a593Smuzhiyun OMAP4_IOPAD(0x0d0, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */ 323*4882a593Smuzhiyun OMAP4_IOPAD(0x0d2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */ 324*4882a593Smuzhiyun OMAP4_IOPAD(0x0d4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */ 325*4882a593Smuzhiyun OMAP4_IOPAD(0x0d6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */ 326*4882a593Smuzhiyun OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */ 327*4882a593Smuzhiyun >; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun i2c1_pins: pinmux_i2c1_pins { 331*4882a593Smuzhiyun pinctrl-single,pins = < 332*4882a593Smuzhiyun OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ 333*4882a593Smuzhiyun OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ 334*4882a593Smuzhiyun >; 335*4882a593Smuzhiyun }; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun i2c2_pins: pinmux_i2c2_pins { 338*4882a593Smuzhiyun pinctrl-single,pins = < 339*4882a593Smuzhiyun OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ 340*4882a593Smuzhiyun OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ 341*4882a593Smuzhiyun >; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun i2c3_pins: pinmux_i2c3_pins { 345*4882a593Smuzhiyun pinctrl-single,pins = < 346*4882a593Smuzhiyun OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ 347*4882a593Smuzhiyun OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ 348*4882a593Smuzhiyun >; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun i2c4_pins: pinmux_i2c4_pins { 352*4882a593Smuzhiyun pinctrl-single,pins = < 353*4882a593Smuzhiyun OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */ 354*4882a593Smuzhiyun OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ 355*4882a593Smuzhiyun >; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun /* 359*4882a593Smuzhiyun * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP 360*4882a593Smuzhiyun * REVISIT: Are the pull-ups needed for GPIO 48 and 49? 361*4882a593Smuzhiyun */ 362*4882a593Smuzhiyun wl12xx_gpio: pinmux_wl12xx_gpio { 363*4882a593Smuzhiyun pinctrl-single,pins = < 364*4882a593Smuzhiyun OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */ 365*4882a593Smuzhiyun OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */ 366*4882a593Smuzhiyun OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48 */ 367*4882a593Smuzhiyun OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */ 368*4882a593Smuzhiyun >; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun /* wl12xx GPIO inputs and SDIO pins */ 372*4882a593Smuzhiyun wl12xx_pins: pinmux_wl12xx_pins { 373*4882a593Smuzhiyun pinctrl-single,pins = < 374*4882a593Smuzhiyun OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */ 375*4882a593Smuzhiyun OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ 376*4882a593Smuzhiyun OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */ 377*4882a593Smuzhiyun OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */ 378*4882a593Smuzhiyun OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */ 379*4882a593Smuzhiyun OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */ 380*4882a593Smuzhiyun OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */ 381*4882a593Smuzhiyun OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */ 382*4882a593Smuzhiyun >; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun button_pins: pinmux_button_pins { 386*4882a593Smuzhiyun pinctrl-single,pins = < 387*4882a593Smuzhiyun OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_121 */ 388*4882a593Smuzhiyun >; 389*4882a593Smuzhiyun }; 390*4882a593Smuzhiyun}; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun&omap4_pmx_wkup { 393*4882a593Smuzhiyun led_wkgpio_pins: pinmux_leds_wkpins { 394*4882a593Smuzhiyun pinctrl-single,pins = < 395*4882a593Smuzhiyun OMAP4_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */ 396*4882a593Smuzhiyun OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ 397*4882a593Smuzhiyun >; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun}; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun&i2c1 { 402*4882a593Smuzhiyun pinctrl-names = "default"; 403*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins>; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun clock-frequency = <400000>; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun twl: twl@48 { 408*4882a593Smuzhiyun reg = <0x48>; 409*4882a593Smuzhiyun /* IRQ# = 7 */ 410*4882a593Smuzhiyun interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ 411*4882a593Smuzhiyun }; 412*4882a593Smuzhiyun 413*4882a593Smuzhiyun twl6040: twl@4b { 414*4882a593Smuzhiyun compatible = "ti,twl6040"; 415*4882a593Smuzhiyun #clock-cells = <0>; 416*4882a593Smuzhiyun reg = <0x4b>; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun pinctrl-names = "default"; 419*4882a593Smuzhiyun pinctrl-0 = <&twl6040_pins>; 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun /* IRQ# = 119 */ 422*4882a593Smuzhiyun interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 423*4882a593Smuzhiyun ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio line 127 */ 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun vio-supply = <&v1v8>; 426*4882a593Smuzhiyun v2v1-supply = <&v2v1>; 427*4882a593Smuzhiyun enable-active-high; 428*4882a593Smuzhiyun }; 429*4882a593Smuzhiyun}; 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun#include "twl6030.dtsi" 432*4882a593Smuzhiyun#include "twl6030_omap4.dtsi" 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun&i2c2 { 435*4882a593Smuzhiyun pinctrl-names = "default"; 436*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins>; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun clock-frequency = <400000>; 439*4882a593Smuzhiyun}; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun&i2c3 { 442*4882a593Smuzhiyun pinctrl-names = "default"; 443*4882a593Smuzhiyun pinctrl-0 = <&i2c3_pins>; 444*4882a593Smuzhiyun 445*4882a593Smuzhiyun clock-frequency = <100000>; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun /* 448*4882a593Smuzhiyun * Display monitor features are burnt in their EEPROM as EDID data. 449*4882a593Smuzhiyun * The EEPROM is connected as I2C slave device. 450*4882a593Smuzhiyun */ 451*4882a593Smuzhiyun eeprom@50 { 452*4882a593Smuzhiyun compatible = "ti,eeprom"; 453*4882a593Smuzhiyun reg = <0x50>; 454*4882a593Smuzhiyun }; 455*4882a593Smuzhiyun}; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun&i2c4 { 458*4882a593Smuzhiyun pinctrl-names = "default"; 459*4882a593Smuzhiyun pinctrl-0 = <&i2c4_pins>; 460*4882a593Smuzhiyun 461*4882a593Smuzhiyun clock-frequency = <400000>; 462*4882a593Smuzhiyun}; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun&mmc1 { 465*4882a593Smuzhiyun vmmc-supply = <&vmmc>; 466*4882a593Smuzhiyun bus-width = <8>; 467*4882a593Smuzhiyun}; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun&mmc2 { 470*4882a593Smuzhiyun status = "disabled"; 471*4882a593Smuzhiyun}; 472*4882a593Smuzhiyun 473*4882a593Smuzhiyun&mmc3 { 474*4882a593Smuzhiyun status = "disabled"; 475*4882a593Smuzhiyun}; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun&mmc4 { 478*4882a593Smuzhiyun status = "disabled"; 479*4882a593Smuzhiyun}; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun&mmc5 { 482*4882a593Smuzhiyun pinctrl-names = "default"; 483*4882a593Smuzhiyun pinctrl-0 = <&wl12xx_pins>; 484*4882a593Smuzhiyun vmmc-supply = <&wl12xx_vmmc>; 485*4882a593Smuzhiyun interrupts-extended = <&wakeupgen GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 486*4882a593Smuzhiyun &omap4_pmx_core 0x10e>; 487*4882a593Smuzhiyun non-removable; 488*4882a593Smuzhiyun bus-width = <4>; 489*4882a593Smuzhiyun cap-power-off-card; 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun #address-cells = <1>; 492*4882a593Smuzhiyun #size-cells = <0>; 493*4882a593Smuzhiyun wlcore: wlcore@2 { 494*4882a593Smuzhiyun compatible = "ti,wl1271"; 495*4882a593Smuzhiyun reg = <2>; 496*4882a593Smuzhiyun /* gpio_53 with gpmc_ncs3 pad as wakeup */ 497*4882a593Smuzhiyun interrupts-extended = <&gpio2 21 IRQ_TYPE_LEVEL_HIGH>, 498*4882a593Smuzhiyun <&omap4_pmx_core 0x3a>; 499*4882a593Smuzhiyun interrupt-names = "irq", "wakeup"; 500*4882a593Smuzhiyun ref-clock-frequency = <38400000>; 501*4882a593Smuzhiyun }; 502*4882a593Smuzhiyun}; 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun&emif1 { 505*4882a593Smuzhiyun cs1-used; 506*4882a593Smuzhiyun device-handle = <&elpida_ECB240ABACN>; 507*4882a593Smuzhiyun}; 508*4882a593Smuzhiyun 509*4882a593Smuzhiyun&emif2 { 510*4882a593Smuzhiyun cs1-used; 511*4882a593Smuzhiyun device-handle = <&elpida_ECB240ABACN>; 512*4882a593Smuzhiyun}; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun&mcbsp1 { 515*4882a593Smuzhiyun pinctrl-names = "default"; 516*4882a593Smuzhiyun pinctrl-0 = <&mcbsp1_pins>; 517*4882a593Smuzhiyun status = "okay"; 518*4882a593Smuzhiyun}; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun&twl_usb_comparator { 521*4882a593Smuzhiyun usb-supply = <&vusb>; 522*4882a593Smuzhiyun}; 523*4882a593Smuzhiyun 524*4882a593Smuzhiyun&uart2 { 525*4882a593Smuzhiyun interrupts-extended = <&wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH 526*4882a593Smuzhiyun &omap4_pmx_core OMAP4_UART2_RX>; 527*4882a593Smuzhiyun}; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun&uart3 { 530*4882a593Smuzhiyun interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH 531*4882a593Smuzhiyun &omap4_pmx_core OMAP4_UART3_RX>; 532*4882a593Smuzhiyun}; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun&uart4 { 535*4882a593Smuzhiyun interrupts-extended = <&wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH 536*4882a593Smuzhiyun &omap4_pmx_core OMAP4_UART4_RX>; 537*4882a593Smuzhiyun}; 538*4882a593Smuzhiyun 539*4882a593Smuzhiyun&usb_otg_hs { 540*4882a593Smuzhiyun interface-type = <1>; 541*4882a593Smuzhiyun mode = <3>; 542*4882a593Smuzhiyun power = <50>; 543*4882a593Smuzhiyun}; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun&usbhshost { 546*4882a593Smuzhiyun port1-mode = "ehci-phy"; 547*4882a593Smuzhiyun}; 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun&usbhsehci { 550*4882a593Smuzhiyun phys = <&hsusb1_phy>; 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun #address-cells = <1>; 553*4882a593Smuzhiyun #size-cells = <0>; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun hub@1 { 556*4882a593Smuzhiyun compatible = "usb424,9514"; 557*4882a593Smuzhiyun reg = <1>; 558*4882a593Smuzhiyun #address-cells = <1>; 559*4882a593Smuzhiyun #size-cells = <0>; 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun ethernet: usbether@1 { 562*4882a593Smuzhiyun compatible = "usb424,ec00"; 563*4882a593Smuzhiyun reg = <1>; 564*4882a593Smuzhiyun }; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun}; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun&dss { 569*4882a593Smuzhiyun status = "okay"; 570*4882a593Smuzhiyun 571*4882a593Smuzhiyun port { 572*4882a593Smuzhiyun dpi_out: endpoint { 573*4882a593Smuzhiyun remote-endpoint = <&tfp410_in>; 574*4882a593Smuzhiyun data-lines = <24>; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun }; 577*4882a593Smuzhiyun}; 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun&dsi2 { 580*4882a593Smuzhiyun status = "okay"; 581*4882a593Smuzhiyun vdd-supply = <&vcxio>; 582*4882a593Smuzhiyun}; 583*4882a593Smuzhiyun 584*4882a593Smuzhiyun&hdmi { 585*4882a593Smuzhiyun status = "okay"; 586*4882a593Smuzhiyun vdda-supply = <&vdac>; 587*4882a593Smuzhiyun 588*4882a593Smuzhiyun port { 589*4882a593Smuzhiyun hdmi_out: endpoint { 590*4882a593Smuzhiyun remote-endpoint = <&tpd12s015_in>; 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun}; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun&dsp { 596*4882a593Smuzhiyun status = "okay"; 597*4882a593Smuzhiyun memory-region = <&dsp_memory_region>; 598*4882a593Smuzhiyun ti,timers = <&timer5>; 599*4882a593Smuzhiyun ti,watchdog-timers = <&timer6>; 600*4882a593Smuzhiyun}; 601*4882a593Smuzhiyun 602*4882a593Smuzhiyun&ipu { 603*4882a593Smuzhiyun status = "okay"; 604*4882a593Smuzhiyun memory-region = <&ipu_memory_region>; 605*4882a593Smuzhiyun ti,timers = <&timer3>; 606*4882a593Smuzhiyun ti,watchdog-timers = <&timer9>, <&timer11>; 607*4882a593Smuzhiyun}; 608