xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/omap4-duovero-parlor.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun/dts-v1/;
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "omap4-duovero.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "OMAP4430 Gumstix Duovero on Parlor";
13*4882a593Smuzhiyun	compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	aliases {
16*4882a593Smuzhiyun		display0 = &hdmi0;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	leds {
20*4882a593Smuzhiyun		compatible = "gpio-leds";
21*4882a593Smuzhiyun		led0 {
22*4882a593Smuzhiyun			label = "duovero:blue:led0";
23*4882a593Smuzhiyun			gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;	/* gpio_122 */
24*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
25*4882a593Smuzhiyun		};
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	gpio_keys {
29*4882a593Smuzhiyun		compatible = "gpio-keys";
30*4882a593Smuzhiyun		#address-cells = <1>;
31*4882a593Smuzhiyun		#size-cells = <0>;
32*4882a593Smuzhiyun		button0 {
33*4882a593Smuzhiyun			label = "button0";
34*4882a593Smuzhiyun			linux,code = <BTN_0>;
35*4882a593Smuzhiyun			gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;	/* gpio_121 */
36*4882a593Smuzhiyun			/* Value above 7.95ms for no GPIO hardware debounce */
37*4882a593Smuzhiyun			debounce-interval = <10>;
38*4882a593Smuzhiyun			wakeup-source;
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	hdmi0: connector {
43*4882a593Smuzhiyun		compatible = "hdmi-connector";
44*4882a593Smuzhiyun		label = "hdmi";
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		type = "d";
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;	/* gpio_63 */
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun		port {
51*4882a593Smuzhiyun			hdmi_connector_in: endpoint {
52*4882a593Smuzhiyun				remote-endpoint = <&hdmi_out>;
53*4882a593Smuzhiyun			};
54*4882a593Smuzhiyun		};
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun&omap4_pmx_core {
59*4882a593Smuzhiyun	pinctrl-0 = <
60*4882a593Smuzhiyun			&led_pins
61*4882a593Smuzhiyun			&button_pins
62*4882a593Smuzhiyun			&smsc_pins
63*4882a593Smuzhiyun	>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	led_pins: pinmux_led_pins {
66*4882a593Smuzhiyun		pinctrl-single,pins = <
67*4882a593Smuzhiyun			OMAP4_IOPAD(0x116, PIN_OUTPUT | MUX_MODE3)		/* abe_dmic_din3.gpio_122 */
68*4882a593Smuzhiyun		>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	button_pins: pinmux_button_pins {
72*4882a593Smuzhiyun		pinctrl-single,pins = <
73*4882a593Smuzhiyun			OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3)	/* abe_dmic_din2.gpio_121 */
74*4882a593Smuzhiyun		>;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	i2c2_pins: pinmux_i2c2_pins {
78*4882a593Smuzhiyun		pinctrl-single,pins = <
79*4882a593Smuzhiyun			OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_scl */
80*4882a593Smuzhiyun			OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c2_sda */
81*4882a593Smuzhiyun		>;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	i2c3_pins: pinmux_i2c3_pins {
85*4882a593Smuzhiyun		pinctrl-single,pins = <
86*4882a593Smuzhiyun			OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_scl */
87*4882a593Smuzhiyun			OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_sda */
88*4882a593Smuzhiyun		>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	smsc_pins: pinmux_smsc_pins {
92*4882a593Smuzhiyun		pinctrl-single,pins = <
93*4882a593Smuzhiyun			OMAP4_IOPAD(0x068, PIN_INPUT | MUX_MODE3)		/* gpmc_a20.gpio_44: IRQ */
94*4882a593Smuzhiyun			OMAP4_IOPAD(0x06a, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a21.gpio_45: nReset */
95*4882a593Smuzhiyun			OMAP4_IOPAD(0x070, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a24.gpio_48: amdix enabled */
96*4882a593Smuzhiyun		>;
97*4882a593Smuzhiyun	};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun	dss_hdmi_pins: pinmux_dss_hdmi_pins {
100*4882a593Smuzhiyun		pinctrl-single,pins = <
101*4882a593Smuzhiyun			OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)		/* hdmi_hpd.gpio_63 */
102*4882a593Smuzhiyun			OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)		/* hdmi_cec.hdmi_cec */
103*4882a593Smuzhiyun			OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_ddc_scl.hdmi_ddc_scl */
104*4882a593Smuzhiyun			OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0)	/* hdmi_ddc_sda.hdmi_ddc_sda */
105*4882a593Smuzhiyun		>;
106*4882a593Smuzhiyun	};
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&i2c2 {
110*4882a593Smuzhiyun	pinctrl-names = "default";
111*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins>;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	clock-frequency = <400000>;
114*4882a593Smuzhiyun};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun&i2c3 {
117*4882a593Smuzhiyun	pinctrl-names = "default";
118*4882a593Smuzhiyun	pinctrl-0 = <&i2c3_pins>;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun	clock-frequency = <100000>;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun	/* optional 1K EEPROM with revision information */
123*4882a593Smuzhiyun	eeprom@51 {
124*4882a593Smuzhiyun		compatible = "atmel,24c01";
125*4882a593Smuzhiyun		reg = <0x51>;
126*4882a593Smuzhiyun		pagesize = <8>;
127*4882a593Smuzhiyun	};
128*4882a593Smuzhiyun};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun&mmc3 {
131*4882a593Smuzhiyun	status = "disabled";
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun#include "omap-gpmc-smsc911x.dtsi"
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun&gpmc {
137*4882a593Smuzhiyun	ranges = <5 0 0x2c000000 0x1000000>;			/* CS5 */
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	ethernet@gpmc {
140*4882a593Smuzhiyun		reg = <5 0 0xff>;
141*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
142*4882a593Smuzhiyun		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;		/* gpio_44 */
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun		phy-mode = "mii";
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun		gpmc,cs-on-ns = <10>;
147*4882a593Smuzhiyun		gpmc,cs-rd-off-ns = <50>;
148*4882a593Smuzhiyun		gpmc,cs-wr-off-ns = <50>;
149*4882a593Smuzhiyun		gpmc,adv-on-ns = <0>;
150*4882a593Smuzhiyun		gpmc,adv-rd-off-ns = <10>;
151*4882a593Smuzhiyun		gpmc,adv-wr-off-ns = <10>;
152*4882a593Smuzhiyun		gpmc,oe-on-ns = <15>;
153*4882a593Smuzhiyun		gpmc,oe-off-ns = <50>;
154*4882a593Smuzhiyun		gpmc,we-on-ns = <15>;
155*4882a593Smuzhiyun		gpmc,we-off-ns = <50>;
156*4882a593Smuzhiyun		gpmc,rd-cycle-ns = <50>;
157*4882a593Smuzhiyun		gpmc,wr-cycle-ns = <50>;
158*4882a593Smuzhiyun		gpmc,access-ns = <50>;
159*4882a593Smuzhiyun		gpmc,page-burst-access-ns = <0>;
160*4882a593Smuzhiyun		gpmc,bus-turnaround-ns = <35>;
161*4882a593Smuzhiyun		gpmc,cycle2cycle-delay-ns = <35>;
162*4882a593Smuzhiyun		gpmc,wr-data-mux-bus-ns = <35>;
163*4882a593Smuzhiyun		gpmc,wr-access-ns = <50>;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun		gpmc,mux-add-data = <2>;
166*4882a593Smuzhiyun		gpmc,sync-read;
167*4882a593Smuzhiyun		gpmc,sync-write;
168*4882a593Smuzhiyun		gpmc,clk-activation-ns = <5>;
169*4882a593Smuzhiyun		gpmc,sync-clk-ps = <20000>;
170*4882a593Smuzhiyun	};
171*4882a593Smuzhiyun};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun&dss {
174*4882a593Smuzhiyun	status = "okay";
175*4882a593Smuzhiyun};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun&hdmi {
178*4882a593Smuzhiyun	status = "okay";
179*4882a593Smuzhiyun	vdda-supply = <&vdac>;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun	pinctrl-names = "default";
182*4882a593Smuzhiyun	pinctrl-0 = <&dss_hdmi_pins>;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun	port {
185*4882a593Smuzhiyun		hdmi_out: endpoint {
186*4882a593Smuzhiyun			remote-endpoint = <&hdmi_connector_in>;
187*4882a593Smuzhiyun		};
188*4882a593Smuzhiyun	};
189*4882a593Smuzhiyun};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun&uart3 {
192*4882a593Smuzhiyun	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
193*4882a593Smuzhiyun			       &omap4_pmx_core OMAP4_UART3_RX>;
194*4882a593Smuzhiyun};
195