1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2015-2016 Paul Kocialkowski <contact@paulk.fr> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "omap36xx.dtsi" 8*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "LG Optimus Black"; 12*4882a593Smuzhiyun compatible = "lg,omap3-sniper", "ti,omap3630", "ti,omap36xx", "ti,omap3"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun cpus { 15*4882a593Smuzhiyun cpu@0 { 16*4882a593Smuzhiyun cpu0-supply = <&vcc>; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@80000000 { 21*4882a593Smuzhiyun device_type = "memory"; 22*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; /* 512 MB */ 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun}; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun&omap3_pmx_core { 27*4882a593Smuzhiyun pinctrl-names = "default"; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun uart3_pins: pinmux_uart3_pins { 30*4882a593Smuzhiyun pinctrl-single,pins = < 31*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx */ 32*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx */ 33*4882a593Smuzhiyun >; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun dp3t_sel_pins: pinmux_dp3t_sel_pins { 37*4882a593Smuzhiyun pinctrl-single,pins = < 38*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE4) /* gpio_161 */ 39*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* gpio_162 */ 40*4882a593Smuzhiyun >; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun i2c1_pins: pinmux_i2c1_pins { 44*4882a593Smuzhiyun pinctrl-single,pins = < 45*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */ 46*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */ 47*4882a593Smuzhiyun >; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun i2c2_pins: pinmux_i2c2_pins { 51*4882a593Smuzhiyun pinctrl-single,pins = < 52*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ 53*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ 54*4882a593Smuzhiyun >; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun i2c3_pins: pinmux_i2c3_pins { 58*4882a593Smuzhiyun pinctrl-single,pins = < 59*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ 60*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ 61*4882a593Smuzhiyun >; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun lp8720_en_pin: pinmux_lp8720_en_pin { 65*4882a593Smuzhiyun pinctrl-single,pins = < 66*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2080, PIN_OUTPUT | MUX_MODE4) /* gpio_37 */ 67*4882a593Smuzhiyun >; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun mmc1_pins: pinmux_mmc1_pins { 71*4882a593Smuzhiyun pinctrl-single,pins = < 72*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT | MUX_MODE0) /* sdmmc1_clk */ 73*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd */ 74*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0 */ 75*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1 */ 76*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2 */ 77*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3 */ 78*4882a593Smuzhiyun >; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun mmc2_pins: pinmux_mmc2_pins { 82*4882a593Smuzhiyun pinctrl-single,pins = < 83*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT | MUX_MODE0) /* sdmmc2_clk */ 84*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT | MUX_MODE0) /* sdmmc2_cmd */ 85*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0 */ 86*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1 */ 87*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2 */ 88*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3 */ 89*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4 */ 90*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5 */ 91*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6 */ 92*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7 */ 93*4882a593Smuzhiyun >; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun usb_otg_hs_pins: pinmux_usb_otg_hs_pins { 97*4882a593Smuzhiyun pinctrl-single,pins = < 98*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk */ 99*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp */ 100*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir */ 101*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt */ 102*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0 */ 103*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1 */ 104*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2 */ 105*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3 */ 106*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4 */ 107*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5 */ 108*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6 */ 109*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7 */ 110*4882a593Smuzhiyun >; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun}; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun&omap3_pmx_wkup { 115*4882a593Smuzhiyun pinctrl-names = "default"; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun mmc1_cd_pin: pinmux_mmc1_cd_pin { 118*4882a593Smuzhiyun pinctrl-single,pins = < 119*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | MUX_MODE4) /* gpio_10 */ 120*4882a593Smuzhiyun >; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun}; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun&gpio2 { 125*4882a593Smuzhiyun ti,no-reset-on-init; 126*4882a593Smuzhiyun}; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun&gpio5 { 129*4882a593Smuzhiyun ti,no-reset-on-init; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&gpio6 { 133*4882a593Smuzhiyun ti,no-reset-on-init; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun&uart3 { 137*4882a593Smuzhiyun pinctrl-names = "default"; 138*4882a593Smuzhiyun pinctrl-0 = <&uart3_pins &dp3t_sel_pins>; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&i2c1 { 144*4882a593Smuzhiyun pinctrl-names = "default"; 145*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins>; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun clock-frequency = <2600000>; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun twl: twl@48 { 150*4882a593Smuzhiyun reg = <0x48>; 151*4882a593Smuzhiyun interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 152*4882a593Smuzhiyun interrupt-parent = <&intc>; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun power { 155*4882a593Smuzhiyun compatible = "ti,twl4030-power"; 156*4882a593Smuzhiyun ti,use_poweroff; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun}; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun&i2c2 { 162*4882a593Smuzhiyun pinctrl-names = "default"; 163*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins>; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun clock-frequency = <400000>; 166*4882a593Smuzhiyun}; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun&i2c3 { 169*4882a593Smuzhiyun pinctrl-names = "default"; 170*4882a593Smuzhiyun pinctrl-0 = <&i2c3_pins>; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun clock-frequency = <400000>; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun lp8720@7d { 175*4882a593Smuzhiyun pinctrl-names = "default"; 176*4882a593Smuzhiyun pinctrl-0 = <&lp8720_en_pin>; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun compatible = "ti,lp8720"; 179*4882a593Smuzhiyun reg = <0x7d>; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* gpio_37 */ 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun lp8720_ldo1: ldo1 { 184*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 185*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun}; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun&mmc1 { 191*4882a593Smuzhiyun pinctrl-names = "default"; 192*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins &mmc1_cd_pin>; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun vmmc-supply = <&lp8720_ldo1>; 195*4882a593Smuzhiyun cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* gpio 10 */ 196*4882a593Smuzhiyun bus-width = <4>; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&mmc2 { 200*4882a593Smuzhiyun pinctrl-names = "default"; 201*4882a593Smuzhiyun pinctrl-0 = <&mmc2_pins>; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun vmmc-supply = <&vmmc2>; 204*4882a593Smuzhiyun ti,non-removable; 205*4882a593Smuzhiyun bus-width = <8>; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&mmc3 { 209*4882a593Smuzhiyun status = "disabled"; 210*4882a593Smuzhiyun}; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun&usb_otg_hs { 213*4882a593Smuzhiyun pinctrl-names = "default"; 214*4882a593Smuzhiyun pinctrl-0 = <&usb_otg_hs_pins>; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun interface-type = <0>; 217*4882a593Smuzhiyun usb-phy = <&usb2_phy>; 218*4882a593Smuzhiyun phys = <&usb2_phy>; 219*4882a593Smuzhiyun phy-names = "usb2-phy"; 220*4882a593Smuzhiyun mode = <3>; 221*4882a593Smuzhiyun power = <50>; 222*4882a593Smuzhiyun}; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun#include "twl4030.dtsi" 225*4882a593Smuzhiyun#include "twl4030_omap3.dtsi" 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun&twl_keypad { 228*4882a593Smuzhiyun linux,keymap = < 229*4882a593Smuzhiyun MATRIX_KEY(0x00, 0x00, KEY_VOLUMEUP) 230*4882a593Smuzhiyun MATRIX_KEY(0x01, 0x00, KEY_VOLUMEDOWN) 231*4882a593Smuzhiyun MATRIX_KEY(0x02, 0x00, KEY_SELECT) 232*4882a593Smuzhiyun >; 233*4882a593Smuzhiyun}; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun/* 236*4882a593Smuzhiyun * The TWL4030 VAUX2 and VDAC regulators power sensors that are slaves on I2C3. 237*4882a593Smuzhiyun * When not powered, these sensors cause the I2C3 clock to stay low at all times, 238*4882a593Smuzhiyun * making it impossible to reach other devices on I2C3. 239*4882a593Smuzhiyun */ 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun&vaux2 { 242*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 243*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 244*4882a593Smuzhiyun regulator-always-on; 245*4882a593Smuzhiyun}; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun&vdac { 248*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 249*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 250*4882a593Smuzhiyun regulator-always-on; 251*4882a593Smuzhiyun}; 252