xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/omap3-overo-common-lcd43.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/*
7*4882a593Smuzhiyun * 4.3'' LCD panel output for some Gumstix Overo boards (Gallop43, Chestnut43)
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun&omap3_pmx_core {
11*4882a593Smuzhiyun	dss_dpi_pins: pinmux_dss_dpi_pins {
12*4882a593Smuzhiyun		pinctrl-single,pins = <
13*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
14*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
15*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
16*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
17*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
18*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
19*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
20*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
21*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
22*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
23*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
24*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
25*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
26*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
27*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
28*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
29*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
30*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
31*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
32*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
33*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
34*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
35*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
36*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
37*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
38*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
39*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
40*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
41*4882a593Smuzhiyun		>;
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun	lte430_pins: pinmux_lte430_pins {
45*4882a593Smuzhiyun		pinctrl-single,pins = <
46*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2174, PIN_OUTPUT | MUX_MODE4)	/* uart2_cts.gpio_144 */
47*4882a593Smuzhiyun		>;
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	backlight_pins: pinmux_backlight_pins {
51*4882a593Smuzhiyun		pinctrl-single,pins = <
52*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE4)	/* uart2_rts.gpio_145 */
53*4882a593Smuzhiyun		>;
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	mcspi1_pins: pinmux_mcspi1_pins {
57*4882a593Smuzhiyun		pinctrl-single,pins = <
58*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)	/* mcspi1_clk.mcspi1_clk */
59*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0)	/* mcspi1_simo.mcspi1_simo */
60*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0)	/* mcspi1_somi.mcspi1_somi */
61*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT | MUX_MODE0)	/* mcspi1_cs0.mcspi1_cs0 */
62*4882a593Smuzhiyun		>;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	ads7846_pins: pinmux_ads7846_pins {
66*4882a593Smuzhiyun		pinctrl-single,pins = <
67*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2138, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* csi2_dx1.gpio_114 */
68*4882a593Smuzhiyun		>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun/* Needed to power the DPI pins */
73*4882a593Smuzhiyun&vpll2 {
74*4882a593Smuzhiyun	regulator-always-on;
75*4882a593Smuzhiyun};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun&dss {
78*4882a593Smuzhiyun	status = "okay";
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	pinctrl-names = "default";
81*4882a593Smuzhiyun	pinctrl-0 = <&dss_dpi_pins>;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	port {
84*4882a593Smuzhiyun		dpi_out: endpoint {
85*4882a593Smuzhiyun			remote-endpoint = <&lcd_in>;
86*4882a593Smuzhiyun			data-lines = <24>;
87*4882a593Smuzhiyun		};
88*4882a593Smuzhiyun	};
89*4882a593Smuzhiyun};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun/ {
92*4882a593Smuzhiyun	aliases {
93*4882a593Smuzhiyun		display0 = &lcd0;
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	lcd0: display {
97*4882a593Smuzhiyun		compatible = "samsung,lte430wq-f0c", "panel-dpi";
98*4882a593Smuzhiyun		label = "lcd43";
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun		pinctrl-names = "default";
101*4882a593Smuzhiyun		pinctrl-0 = <&lte430_pins>;
102*4882a593Smuzhiyun		enable-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>;		/* gpio_144 */
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun		port {
105*4882a593Smuzhiyun			lcd_in: endpoint {
106*4882a593Smuzhiyun				remote-endpoint = <&dpi_out>;
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		panel-timing {
111*4882a593Smuzhiyun			clock-frequency = <9200000>;
112*4882a593Smuzhiyun			hactive = <480>;
113*4882a593Smuzhiyun			vactive = <272>;
114*4882a593Smuzhiyun			hfront-porch = <8>;
115*4882a593Smuzhiyun			hback-porch = <4>;
116*4882a593Smuzhiyun			hsync-len = <41>;
117*4882a593Smuzhiyun			vback-porch = <2>;
118*4882a593Smuzhiyun			vfront-porch = <4>;
119*4882a593Smuzhiyun			vsync-len = <10>;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun			hsync-active = <0>;
122*4882a593Smuzhiyun			vsync-active = <0>;
123*4882a593Smuzhiyun			de-active = <1>;
124*4882a593Smuzhiyun			pixelclk-active = <1>;
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun	};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun	ads7846reg: ads7846-reg {
129*4882a593Smuzhiyun		compatible = "regulator-fixed";
130*4882a593Smuzhiyun		regulator-name = "ads7846-reg";
131*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
132*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	backlight {
136*4882a593Smuzhiyun		compatible = "gpio-backlight";
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun		pinctrl-names = "default";
139*4882a593Smuzhiyun		pinctrl-0 = <&backlight_pins>;
140*4882a593Smuzhiyun		gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;		/* gpio_145 */
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun		default-on;
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun&mcspi1 {
147*4882a593Smuzhiyun	pinctrl-names = "default";
148*4882a593Smuzhiyun	pinctrl-0 = <&mcspi1_pins>;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun	/* touch controller */
151*4882a593Smuzhiyun	ads7846@0 {
152*4882a593Smuzhiyun		pinctrl-names = "default";
153*4882a593Smuzhiyun		pinctrl-0 = <&ads7846_pins>;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun		compatible = "ti,ads7846";
156*4882a593Smuzhiyun		vcc-supply = <&ads7846reg>;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun		reg = <0>;				/* CS0 */
159*4882a593Smuzhiyun		spi-max-frequency = <1500000>;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun		interrupt-parent = <&gpio4>;
162*4882a593Smuzhiyun		interrupts = <18 0>;			/* gpio_114 */
163*4882a593Smuzhiyun		pendown-gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun		ti,x-min = /bits/ 16 <0x0>;
166*4882a593Smuzhiyun		ti,x-max = /bits/ 16 <0x0fff>;
167*4882a593Smuzhiyun		ti,y-min = /bits/ 16 <0x0>;
168*4882a593Smuzhiyun		ti,y-max = /bits/ 16 <0x0fff>;
169*4882a593Smuzhiyun		ti,x-plate-ohms = /bits/ 16 <180>;
170*4882a593Smuzhiyun		ti,pressure-max = /bits/ 16 <255>;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun		wakeup-source;
173*4882a593Smuzhiyun	};
174*4882a593Smuzhiyun};
175*4882a593Smuzhiyun
176