1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2014 Florian Vaussard, EPFL Mobots group 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/* 7*4882a593Smuzhiyun * DVI output for some Gumstix Overo boards (Tobi and Summit) 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun&omap3_pmx_core { 11*4882a593Smuzhiyun dss_dpi_pins: pinmux_dss_dpi_pins { 12*4882a593Smuzhiyun pinctrl-single,pins = < 13*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 14*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 15*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 16*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 17*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ 18*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ 19*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ 20*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ 21*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ 22*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ 23*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 24*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 25*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 26*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 27*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 28*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 29*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 30*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 31*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 32*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 33*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ 34*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ 35*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ 36*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ 37*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ 38*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ 39*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ 40*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ 41*4882a593Smuzhiyun >; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun}; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun/* Needed to power the DPI pins */ 46*4882a593Smuzhiyun&vpll2 { 47*4882a593Smuzhiyun regulator-always-on; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&dss { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun pinctrl-names = "default"; 54*4882a593Smuzhiyun pinctrl-0 = <&dss_dpi_pins>; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun port { 57*4882a593Smuzhiyun dpi_out: endpoint { 58*4882a593Smuzhiyun remote-endpoint = <&tfp410_in>; 59*4882a593Smuzhiyun data-lines = <24>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun}; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun/ { 65*4882a593Smuzhiyun aliases { 66*4882a593Smuzhiyun display0 = &dvi0; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun tfp410: encoder { 70*4882a593Smuzhiyun compatible = "ti,tfp410"; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun ports { 73*4882a593Smuzhiyun #address-cells = <1>; 74*4882a593Smuzhiyun #size-cells = <0>; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun port@0 { 77*4882a593Smuzhiyun reg = <0>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun tfp410_in: endpoint { 80*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun port@1 { 85*4882a593Smuzhiyun reg = <1>; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun tfp410_out: endpoint { 88*4882a593Smuzhiyun remote-endpoint = <&dvi_connector_in>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun dvi0: connector { 95*4882a593Smuzhiyun compatible = "dvi-connector"; 96*4882a593Smuzhiyun label = "dvi"; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun digital; 99*4882a593Smuzhiyun ddc-i2c-bus = <&i2c3>; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun port { 102*4882a593Smuzhiyun dvi_connector_in: endpoint { 103*4882a593Smuzhiyun remote-endpoint = <&tfp410_out>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun}; 108*4882a593Smuzhiyun 109