1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 8*4882a593Smuzhiyun#include "omap34xx.dtsi" 9*4882a593Smuzhiyun#include "omap-gpmc-smsc911x.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "TI OMAP3430 LDP (Zoom1 Labrador)"; 13*4882a593Smuzhiyun compatible = "ti,omap3-ldp", "ti,omap3430", "ti,omap3"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun memory@80000000 { 16*4882a593Smuzhiyun device_type = "memory"; 17*4882a593Smuzhiyun reg = <0x80000000 0x8000000>; /* 128 MB */ 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun cpus { 21*4882a593Smuzhiyun cpu@0 { 22*4882a593Smuzhiyun cpu0-supply = <&vcc>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun gpio_keys { 27*4882a593Smuzhiyun compatible = "gpio-keys"; 28*4882a593Smuzhiyun pinctrl-names = "default"; 29*4882a593Smuzhiyun pinctrl-0 = <&gpio_key_pins>; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun key_enter { 32*4882a593Smuzhiyun label = "enter"; 33*4882a593Smuzhiyun gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* gpio101 */ 34*4882a593Smuzhiyun linux,code = <KEY_ENTER>; 35*4882a593Smuzhiyun wakeup-source; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun key_f1 { 39*4882a593Smuzhiyun label = "f1"; 40*4882a593Smuzhiyun gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; /* gpio102 */ 41*4882a593Smuzhiyun linux,code = <KEY_F1>; 42*4882a593Smuzhiyun wakeup-source; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun key_f2 { 46*4882a593Smuzhiyun label = "f2"; 47*4882a593Smuzhiyun gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; /* gpio103 */ 48*4882a593Smuzhiyun linux,code = <KEY_F2>; 49*4882a593Smuzhiyun wakeup-source; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun key_f3 { 53*4882a593Smuzhiyun label = "f3"; 54*4882a593Smuzhiyun gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; /* gpio104 */ 55*4882a593Smuzhiyun linux,code = <KEY_F3>; 56*4882a593Smuzhiyun wakeup-source; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun key_f4 { 60*4882a593Smuzhiyun label = "f4"; 61*4882a593Smuzhiyun gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; /* gpio105 */ 62*4882a593Smuzhiyun linux,code = <KEY_F4>; 63*4882a593Smuzhiyun wakeup-source; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun key_left { 67*4882a593Smuzhiyun label = "left"; 68*4882a593Smuzhiyun gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */ 69*4882a593Smuzhiyun linux,code = <KEY_LEFT>; 70*4882a593Smuzhiyun wakeup-source; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun key_right { 74*4882a593Smuzhiyun label = "right"; 75*4882a593Smuzhiyun gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* gpio107 */ 76*4882a593Smuzhiyun linux,code = <KEY_RIGHT>; 77*4882a593Smuzhiyun wakeup-source; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun key_up { 81*4882a593Smuzhiyun label = "up"; 82*4882a593Smuzhiyun gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; /* gpio108 */ 83*4882a593Smuzhiyun linux,code = <KEY_UP>; 84*4882a593Smuzhiyun wakeup-source; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun key_down { 88*4882a593Smuzhiyun label = "down"; 89*4882a593Smuzhiyun gpios = <&gpio4 13 GPIO_ACTIVE_LOW>; /* gpio109 */ 90*4882a593Smuzhiyun linux,code = <KEY_DOWN>; 91*4882a593Smuzhiyun wakeup-source; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun}; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun&gpmc { 97*4882a593Smuzhiyun ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */ 98*4882a593Smuzhiyun <1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */ 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun nand@0,0 { 101*4882a593Smuzhiyun compatible = "ti,omap2-nand"; 102*4882a593Smuzhiyun reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 103*4882a593Smuzhiyun interrupt-parent = <&gpmc>; 104*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 105*4882a593Smuzhiyun <1 IRQ_TYPE_NONE>; /* termcount */ 106*4882a593Smuzhiyun linux,mtd-name= "micron,nand"; 107*4882a593Smuzhiyun nand-bus-width = <16>; 108*4882a593Smuzhiyun gpmc,device-width = <2>; 109*4882a593Smuzhiyun ti,nand-ecc-opt = "bch8"; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun gpmc,sync-clk-ps = <0>; 112*4882a593Smuzhiyun gpmc,cs-on-ns = <0>; 113*4882a593Smuzhiyun gpmc,cs-rd-off-ns = <44>; 114*4882a593Smuzhiyun gpmc,cs-wr-off-ns = <44>; 115*4882a593Smuzhiyun gpmc,adv-on-ns = <6>; 116*4882a593Smuzhiyun gpmc,adv-rd-off-ns = <34>; 117*4882a593Smuzhiyun gpmc,adv-wr-off-ns = <44>; 118*4882a593Smuzhiyun gpmc,we-off-ns = <40>; 119*4882a593Smuzhiyun gpmc,oe-off-ns = <54>; 120*4882a593Smuzhiyun gpmc,access-ns = <64>; 121*4882a593Smuzhiyun gpmc,rd-cycle-ns = <82>; 122*4882a593Smuzhiyun gpmc,wr-cycle-ns = <82>; 123*4882a593Smuzhiyun gpmc,wr-access-ns = <40>; 124*4882a593Smuzhiyun gpmc,wr-data-mux-bus-ns = <0>; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #address-cells = <1>; 127*4882a593Smuzhiyun #size-cells = <1>; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun partition@0 { 130*4882a593Smuzhiyun label = "X-Loader"; 131*4882a593Smuzhiyun reg = <0 0x80000>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun partition@80000 { 134*4882a593Smuzhiyun label = "U-Boot"; 135*4882a593Smuzhiyun reg = <0x80000 0x140000>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun partition@1c0000 { 138*4882a593Smuzhiyun label = "Environment"; 139*4882a593Smuzhiyun reg = <0x1c0000 0x40000>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun partition@200000 { 142*4882a593Smuzhiyun label = "Kernel"; 143*4882a593Smuzhiyun reg = <0x200000 0x1e00000>; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun partition@2000000 { 146*4882a593Smuzhiyun label = "Filesystem"; 147*4882a593Smuzhiyun reg = <0x2000000 0x6000000>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun ethernet@gpmc { 152*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 153*4882a593Smuzhiyun interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 154*4882a593Smuzhiyun reg = <1 0 0xff>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun}; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun&i2c1 { 159*4882a593Smuzhiyun clock-frequency = <2600000>; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun twl: twl@48 { 162*4882a593Smuzhiyun reg = <0x48>; 163*4882a593Smuzhiyun interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 164*4882a593Smuzhiyun interrupt-parent = <&intc>; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun twl_power: power { 167*4882a593Smuzhiyun compatible = "ti,twl4030-power-idle"; 168*4882a593Smuzhiyun ti,use_poweroff; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun}; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun#include "twl4030.dtsi" 174*4882a593Smuzhiyun#include "twl4030_omap3.dtsi" 175*4882a593Smuzhiyun#include "omap3-panel-sharp-ls037v7dw01.dtsi" 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun&backlight0 { 178*4882a593Smuzhiyun gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>; 179*4882a593Smuzhiyun}; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun&i2c2 { 182*4882a593Smuzhiyun clock-frequency = <400000>; 183*4882a593Smuzhiyun}; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun&i2c3 { 186*4882a593Smuzhiyun clock-frequency = <400000>; 187*4882a593Smuzhiyun}; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun/* tps61130rsa enabled by twl4030 regen */ 190*4882a593Smuzhiyun&lcd_3v3 { 191*4882a593Smuzhiyun regulator-always-on; 192*4882a593Smuzhiyun}; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun&lcd0 { 195*4882a593Smuzhiyun enable-gpios = <&twl_gpio 15 GPIO_ACTIVE_HIGH>; /* lcd INI */ 196*4882a593Smuzhiyun reset-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>; /* gpio55, lcd RESB */ 197*4882a593Smuzhiyun mode-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio56, lcd MO */ 198*4882a593Smuzhiyun}; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun&mcspi1 { 201*4882a593Smuzhiyun tsc2046@0 { 202*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 203*4882a593Smuzhiyun interrupts = <22 0>; /* gpio54 */ 204*4882a593Smuzhiyun pendown-gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&mmc1 { 209*4882a593Smuzhiyun /* See 35xx errata 2.1.1.128 in SPRZ278F */ 210*4882a593Smuzhiyun compatible = "ti,omap3-pre-es3-hsmmc"; 211*4882a593Smuzhiyun vmmc-supply = <&vmmc1>; 212*4882a593Smuzhiyun bus-width = <4>; 213*4882a593Smuzhiyun pinctrl-names = "default"; 214*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins>; 215*4882a593Smuzhiyun}; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun&mmc2 { 218*4882a593Smuzhiyun status="disabled"; 219*4882a593Smuzhiyun}; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun&mmc3 { 222*4882a593Smuzhiyun status="disabled"; 223*4882a593Smuzhiyun}; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun&omap3_pmx_core { 226*4882a593Smuzhiyun gpio_key_pins: pinmux_gpio_key_pins { 227*4882a593Smuzhiyun pinctrl-single,pins = < 228*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE4) /* cam_d2.gpio_101 */ 229*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE4) /* cam_d3.gpio_102 */ 230*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE4) /* cam_d4.gpio_103 */ 231*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE4) /* cam_d5.gpio_104 */ 232*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE4) /* cam_d6.gpio_105 */ 233*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE4) /* cam_d7.gpio_106 */ 234*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE4) /* cam_d8.gpio_107 */ 235*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE4) /* cam_d9.gpio_108 */ 236*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT | MUX_MODE4) /* cam_d10.gpio_109 */ 237*4882a593Smuzhiyun >; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun musb_pins: pinmux_musb_pins { 241*4882a593Smuzhiyun pinctrl-single,pins = < 242*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ 243*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */ 244*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ 245*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ 246*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */ 247*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */ 248*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */ 249*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */ 250*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ 251*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ 252*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ 253*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ 254*4882a593Smuzhiyun >; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun mmc1_pins: pinmux_mmc1_pins { 258*4882a593Smuzhiyun pinctrl-single,pins = < 259*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */ 260*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */ 261*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */ 262*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214A, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */ 263*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214C, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */ 264*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ 265*4882a593Smuzhiyun >; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun}; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun&twl_keypad { 270*4882a593Smuzhiyun linux,keymap = <MATRIX_KEY(0, 0, KEY_1) 271*4882a593Smuzhiyun MATRIX_KEY(0, 1, KEY_2) 272*4882a593Smuzhiyun MATRIX_KEY(0, 2, KEY_3) 273*4882a593Smuzhiyun MATRIX_KEY(1, 0, KEY_4) 274*4882a593Smuzhiyun MATRIX_KEY(1, 1, KEY_5) 275*4882a593Smuzhiyun MATRIX_KEY(1, 2, KEY_6) 276*4882a593Smuzhiyun MATRIX_KEY(1, 3, KEY_F5) 277*4882a593Smuzhiyun MATRIX_KEY(2, 0, KEY_7) 278*4882a593Smuzhiyun MATRIX_KEY(2, 1, KEY_8) 279*4882a593Smuzhiyun MATRIX_KEY(2, 2, KEY_9) 280*4882a593Smuzhiyun MATRIX_KEY(2, 3, KEY_F6) 281*4882a593Smuzhiyun MATRIX_KEY(3, 0, KEY_F7) 282*4882a593Smuzhiyun MATRIX_KEY(3, 1, KEY_0) 283*4882a593Smuzhiyun MATRIX_KEY(3, 2, KEY_F8) 284*4882a593Smuzhiyun MATRIX_KEY(5, 4, KEY_RESERVED) 285*4882a593Smuzhiyun MATRIX_KEY(4, 4, KEY_VOLUMEUP) 286*4882a593Smuzhiyun MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)>; 287*4882a593Smuzhiyun}; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun&uart3 { 290*4882a593Smuzhiyun interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; 291*4882a593Smuzhiyun}; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun&usb_otg_hs { 294*4882a593Smuzhiyun pinctrl-names = "default"; 295*4882a593Smuzhiyun pinctrl-0 = <&musb_pins>; 296*4882a593Smuzhiyun interface-type = <0>; 297*4882a593Smuzhiyun usb-phy = <&usb2_phy>; 298*4882a593Smuzhiyun mode = <3>; 299*4882a593Smuzhiyun power = <50>; 300*4882a593Smuzhiyun}; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun&vaux1 { 303*4882a593Smuzhiyun /* Needed for ads7846 */ 304*4882a593Smuzhiyun regulator-name = "vcc"; 305*4882a593Smuzhiyun}; 306