1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Common Device Tree Source for IGEPv2 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com> 6*4882a593Smuzhiyun * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include "omap3-igep.dtsi" 10*4882a593Smuzhiyun#include "omap-gpmc-smsc9221.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun leds { 15*4882a593Smuzhiyun pinctrl-names = "default"; 16*4882a593Smuzhiyun pinctrl-0 = <&leds_pins>; 17*4882a593Smuzhiyun compatible = "gpio-leds"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun boot { 20*4882a593Smuzhiyun label = "omap3:green:boot"; 21*4882a593Smuzhiyun gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 22*4882a593Smuzhiyun default-state = "on"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun user0 { 26*4882a593Smuzhiyun label = "omap3:red:user0"; 27*4882a593Smuzhiyun gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; 28*4882a593Smuzhiyun default-state = "off"; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun user1 { 32*4882a593Smuzhiyun label = "omap3:red:user1"; 33*4882a593Smuzhiyun gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 34*4882a593Smuzhiyun default-state = "off"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun user2 { 38*4882a593Smuzhiyun label = "omap3:green:user1"; 39*4882a593Smuzhiyun gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* HS USB Port 1 Power */ 44*4882a593Smuzhiyun hsusb1_power: hsusb1_power_reg { 45*4882a593Smuzhiyun compatible = "regulator-fixed"; 46*4882a593Smuzhiyun regulator-name = "hsusb1_vbus"; 47*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 48*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 49*4882a593Smuzhiyun gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */ 50*4882a593Smuzhiyun startup-delay-us = <70000>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* HS USB Host PHY on PORT 1 */ 54*4882a593Smuzhiyun hsusb1_phy: hsusb1_phy { 55*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 56*4882a593Smuzhiyun reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ 57*4882a593Smuzhiyun vcc-supply = <&hsusb1_power>; 58*4882a593Smuzhiyun #phy-cells = <0>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun tfp410: encoder { 62*4882a593Smuzhiyun compatible = "ti,tfp410"; 63*4882a593Smuzhiyun powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun ports { 66*4882a593Smuzhiyun #address-cells = <1>; 67*4882a593Smuzhiyun #size-cells = <0>; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun port@0 { 70*4882a593Smuzhiyun reg = <0>; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun tfp410_in: endpoint { 73*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun port@1 { 78*4882a593Smuzhiyun reg = <1>; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun tfp410_out: endpoint { 81*4882a593Smuzhiyun remote-endpoint = <&dvi_connector_in>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun dvi0: connector { 88*4882a593Smuzhiyun compatible = "dvi-connector"; 89*4882a593Smuzhiyun label = "dvi"; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun digital; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun ddc-i2c-bus = <&i2c3>; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun port { 96*4882a593Smuzhiyun dvi_connector_in: endpoint { 97*4882a593Smuzhiyun remote-endpoint = <&tfp410_out>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&omap3_pmx_core { 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun pinctrl-0 = < 106*4882a593Smuzhiyun &tfp410_pins 107*4882a593Smuzhiyun &dss_dpi_pins 108*4882a593Smuzhiyun >; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun tfp410_pins: pinmux_tfp410_pins { 111*4882a593Smuzhiyun pinctrl-single,pins = < 112*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ 113*4882a593Smuzhiyun >; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun dss_dpi_pins: pinmux_dss_dpi_pins { 117*4882a593Smuzhiyun pinctrl-single,pins = < 118*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 119*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 120*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 121*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 122*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ 123*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ 124*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ 125*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ 126*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ 127*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ 128*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 129*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 130*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 131*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 132*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 133*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 134*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 135*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 136*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 137*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 138*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ 139*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ 140*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ 141*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ 142*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ 143*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ 144*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ 145*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ 146*4882a593Smuzhiyun >; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun uart2_pins: pinmux_uart2_pins { 150*4882a593Smuzhiyun pinctrl-single,pins = < 151*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ 152*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ 153*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ 154*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 155*4882a593Smuzhiyun >; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun smsc9221_pins: pinmux_smsc9221_pins { 159*4882a593Smuzhiyun pinctrl-single,pins = < 160*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ 161*4882a593Smuzhiyun >; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun}; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun&omap3_pmx_core2 { 166*4882a593Smuzhiyun pinctrl-names = "default"; 167*4882a593Smuzhiyun pinctrl-0 = < 168*4882a593Smuzhiyun &hsusbb1_pins 169*4882a593Smuzhiyun >; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun hsusbb1_pins: pinmux_hsusbb1_pins { 172*4882a593Smuzhiyun pinctrl-single,pins = < 173*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ 174*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ 175*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */ 176*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */ 177*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */ 178*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */ 179*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */ 180*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */ 181*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */ 182*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */ 183*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */ 184*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ 185*4882a593Smuzhiyun >; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun leds_pins: pinmux_leds_pins { 189*4882a593Smuzhiyun pinctrl-single,pins = < 190*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */ 191*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */ 192*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */ 193*4882a593Smuzhiyun >; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun mmc1_wp_pins: pinmux_mmc1_cd_pins { 197*4882a593Smuzhiyun pinctrl-single,pins = < 198*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT | MUX_MODE4) /* etk_d15.gpio_29 */ 199*4882a593Smuzhiyun >; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&i2c3 { 204*4882a593Smuzhiyun clock-frequency = <100000>; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun /* 207*4882a593Smuzhiyun * Display monitor features are burnt in the EEPROM 208*4882a593Smuzhiyun * as EDID data. 209*4882a593Smuzhiyun */ 210*4882a593Smuzhiyun eeprom@50 { 211*4882a593Smuzhiyun compatible = "ti,eeprom"; 212*4882a593Smuzhiyun reg = <0x50>; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun}; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun&gpmc { 217*4882a593Smuzhiyun ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */ 218*4882a593Smuzhiyun <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */ 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun ethernet@gpmc { 221*4882a593Smuzhiyun pinctrl-names = "default"; 222*4882a593Smuzhiyun pinctrl-0 = <&smsc9221_pins>; 223*4882a593Smuzhiyun reg = <5 0 0xff>; 224*4882a593Smuzhiyun interrupt-parent = <&gpio6>; 225*4882a593Smuzhiyun interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun}; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun&uart2 { 230*4882a593Smuzhiyun pinctrl-names = "default"; 231*4882a593Smuzhiyun pinctrl-0 = <&uart2_pins>; 232*4882a593Smuzhiyun}; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun&usbhshost { 235*4882a593Smuzhiyun port1-mode = "ehci-phy"; 236*4882a593Smuzhiyun}; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun&usbhsehci { 239*4882a593Smuzhiyun phys = <&hsusb1_phy>; 240*4882a593Smuzhiyun}; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun&vpll2 { 243*4882a593Smuzhiyun /* Needed for DSS */ 244*4882a593Smuzhiyun regulator-name = "vdds_dsi"; 245*4882a593Smuzhiyun}; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun&dss { 248*4882a593Smuzhiyun status = "okay"; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun port { 251*4882a593Smuzhiyun dpi_out: endpoint { 252*4882a593Smuzhiyun remote-endpoint = <&tfp410_in>; 253*4882a593Smuzhiyun data-lines = <24>; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun}; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun&mmc1 { 259*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins &mmc1_wp_pins>; 260*4882a593Smuzhiyun wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; /* gpio_29 */ 261*4882a593Smuzhiyun}; 262