1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun * Copyright (C) 2014 Stefan Roese <sr@denx.de> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "omap3-tao3530.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun gpio_poweroff { 11*4882a593Smuzhiyun pinctrl-names = "default"; 12*4882a593Smuzhiyun pinctrl-0 = <&poweroff_pins>; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun compatible = "gpio-poweroff"; 15*4882a593Smuzhiyun gpios = <&gpio6 8 GPIO_ACTIVE_LOW>; /* GPIO 168 */ 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun}; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun&omap3_pmx_core { 20*4882a593Smuzhiyun sound2_pins: pinmux_sound2_pins { 21*4882a593Smuzhiyun pinctrl-single,pins = < 22*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x209e, PIN_OUTPUT | MUX_MODE4) /* gpmc_d8 gpio_44 */ 23*4882a593Smuzhiyun >; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun led_blue_pins: pinmux_led_blue_pins { 27*4882a593Smuzhiyun pinctrl-single,pins = < 28*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE4) /* cam_xclka gpio_96, LED blue */ 29*4882a593Smuzhiyun >; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun led_green_pins: pinmux_led_green_pins { 33*4882a593Smuzhiyun pinctrl-single,pins = < 34*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2126, PIN_OUTPUT | MUX_MODE4) /* cam_d8 gpio_107, LED green */ 35*4882a593Smuzhiyun >; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun led_red_pins: pinmux_led_red_pins { 39*4882a593Smuzhiyun pinctrl-single,pins = < 40*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT_PULLUP | MUX_MODE4) /* cam_xclkb gpio_111, LED red */ 41*4882a593Smuzhiyun >; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun poweroff_pins: pinmux_poweroff_pins { 45*4882a593Smuzhiyun pinctrl-single,pins = < 46*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT_PULLUP | MUX_MODE4) /* i2c2_scl gpio_168 */ 47*4882a593Smuzhiyun >; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun powerdown_input_pins: pinmux_powerdown_input_pins { 51*4882a593Smuzhiyun pinctrl-single,pins = < 52*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT_PULLUP | MUX_MODE4) /* i2c2_sda gpio_183 */ 53*4882a593Smuzhiyun >; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun fpga_boot0_pins: fpga_boot0_pins { 57*4882a593Smuzhiyun pinctrl-single,pins = < 58*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE4) /* cam_d2 gpio_101 */ 59*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211c, PIN_OUTPUT | MUX_MODE4) /* cam_d3 gpio_102 */ 60*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE4) /* cam_d4 gpio_103 */ 61*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_d5 gpio_104 */ 62*4882a593Smuzhiyun >; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun fpga_boot1_pins: fpga_boot1_pins { 66*4882a593Smuzhiyun pinctrl-single,pins = < 67*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE4) /* gpmc_d10 gpio_46 */ 68*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20a4, PIN_OUTPUT | MUX_MODE4) /* gpmc_d11 gpio_47 */ 69*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20a6, PIN_OUTPUT | MUX_MODE4) /* gpmc_d12 gpio_48 */ 70*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_d13 gpio_49 */ 71*4882a593Smuzhiyun >; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun/* I2C2: mux'ed with GPIO168 which is connected to nKILL_POWER */ 76*4882a593Smuzhiyun&i2c2 { 77*4882a593Smuzhiyun status = "disabled"; 78*4882a593Smuzhiyun}; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun&i2c3 { 81*4882a593Smuzhiyun clock-frequency = <100000>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun pinctrl-names = "default"; 84*4882a593Smuzhiyun pinctrl-0 = <&i2c3_pins>; 85*4882a593Smuzhiyun}; 86